seg7_1a.hier_info

数码管扫描显示控制器,同时显示0、1、2、3、4、5这6个不同的数字图形到6个数码管上。复位时所有数码管全灭。

|main
clk => count[1].CLK
clk => count[0].CLK
clk => count1[2].CLK
clk => count1[1].CLK
clk => count1[0].CLK
clk => n0[2].CLK
clk => n0[1].CLK
clk => n0[0].CLK
clk => n1[2].CLK
clk => n1[1].CLK
clk => n1[0].CLK
clk => n2[2].CLK
clk => n2[1].CLK
clk => n2[0].CLK
clk => n3[2].CLK
clk => n3[1].CLK
clk => n3[0].CLK
clk => n4[2].CLK
clk => n4[1].CLK
clk => n4[0].CLK
clk => n5[2].CLK
clk => n5[1].CLK
clk => n5[0].CLK
clk => cat[5]~reg0.CLK
clk => cat[4]~reg0.CLK
clk => cat[3]~reg0.CLK
clk => cat[2]~reg0.CLK
clk => cat[1]~reg0.CLK
clk => cat[0]~reg0.CLK
clk => num[2].CLK
clk => num[1].CLK
clk => num[0].CLK
clk => count[2].CLK
cat[0] <= cat[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
cat[1] <= cat[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
cat[2] <= cat[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
cat[3] <= cat[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
cat[4] <= cat[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
cat[5] <= cat[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
lcd[0] <= seg7_1a:u1.i[0]
lcd[1] <= seg7_1a:u1.i[1]
lcd[2] <= seg7_1a:u1.i[2]
lcd[3] <= seg7_1a:u1.i[3]
lcd[4] <= seg7_1a:u1.i[4]
lcd[5] <= seg7_1a:u1.i[5]
lcd[6] <= seg7_1a:u1.i[6]
btn2 => count[1].PRESET
btn2 => count[0].ACLR
btn2 => n0[2].ACLR
btn2 => n0[1].ACLR
btn2 => n0[0].ACLR
btn2 => n1[2].ACLR
btn2 => n1[1].ACLR
btn2 => n1[0].PRESET
btn2 => n2[2].ACLR
btn2 => n2[1].PRESET
btn2 => n2[0].ACLR
btn2 => n3[2].ACLR
btn2 => n3[1].PRESET
btn2 => n3[0].PRESET
btn2 => n4[2].PRESET
btn2 => n4[1].ACLR
btn2 => n4[0].ACLR
btn2 => n5[2].PRESET
btn2 => n5[1].ACLR
btn2 => n5[0].PRESET
btn2 => count1~3.OUTPUTSELECT
btn2 => count1~4.OUTPUTSELECT
btn2 => count1~5.OUTPUTSELECT
btn2 => cat~0.OUTPUTSELECT
btn2 => cat~1.OUTPUTSELECT
btn2 => cat~2.OUTPUTSELECT
btn2 => cat~3.OUTPUTSELECT
btn2 => cat~4.OUTPUTSELECT
btn2 => cat~5.OUTPUTSELECT
btn2 => num~0.OUTPUTSELECT
btn2 => num~1.OUTPUTSELECT
btn2 => num~2.OUTPUTSELECT
btn2 => count[2].PRESET


|main|seg7_1a:u1
h[0] => Mux~0.IN19
h[0] => Mux~1.IN19
h[0] => Mux~2.IN19
h[0] => Mux~3.IN10
h[0] => Mux~4.IN19
h[1] => Mux~0.IN18
h[1] => Mux~1.IN18
h[1] => Mux~2.IN18
h[1] => Mux~4.IN18
h[1] => Mux~5.IN10
h[2] => Mux~0.IN17
h[2] => Mux~1.IN17
h[2] => Mux~2.IN17
h[2] => Mux~3.IN9
h[2] => Mux~4.IN17
h[2] => Mux~5.IN9
h[3] => Mux~0.IN16
h[3] => Mux~1.IN16
h[3] => Mux~2.IN16
h[3] => Mux~3.IN8
h[3] => Mux~4.IN16
h[3] => Mux~5.IN8
i[0] <= Mux~5.DB_MAX_OUTPUT_PORT_TYPE
i[1] <= Mux~4.DB_MAX_OUTPUT_PORT_TYPE
i[2] <= Mux~3.DB_MAX_OUTPUT_PORT_TYPE
i[3] <= Mux~0.DB_MAX_OUTPUT_PORT_TYPE
i[4] <= Mux~2.DB_MAX_OUTPUT_PORT_TYPE
i[5] <= Mux~1.DB_MAX_OUTPUT_PORT_TYPE
i[6] <= Mux~0.DB_MAX_OUTPUT_PORT_TYPE