seg7_1a.vhd

来自「数码管扫描显示控制器,同时显示0、1、2、3、4、5这6个不同的数字图形到6个数」· VHDL 代码 · 共 24 行

library ieee;
use ieee.std_logic_1164.all;
entity seg7_1a is
port(h:in std_logic_vector(3 downto 0);
     i:out std_logic_vector(6 downto 0)
     
    ); 
end seg7_1a;
architecture seg7_1a_arch of seg7_1a is
begin 
  process(h)
  begin
     case h is
     when"0000"=>i<="1111110";--0
     when"0001"=>i<="0110000";--1  
     when"0010"=>i<="1101101";--2
     when"0011"=>i<="1111001";--3
     when"0100"=>i<="0110011";--4
     when"0101"=>i<="1011011";--5
    when others=>i<="0000000";
    end case;
  end process;
end;