📄 tda7540.map
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PROGRAM "TDA7540.abs"
******************************************************
TARGET SECTION
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Processor : STMicroelectronics ST7
Memory Model: LARGE
File Format : HIWARE
Linker : HI-CROSS+ SmartLinker V-5.0.9, Sep 8 1999
******************************************************
FILE SECTION
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start.o LARGE ANSI-C
+ st72321.o LARGE ANSI-C
libr.o LARGE ANSI-C
key.o LARGE ANSI-C
disp.o LARGE ANSI-C
inter.o LARGE ANSI-C
adc_drv.o LARGE ANSI-C
TDA7540.o LARGE ANSI-C
power.o LARGE ANSI-C
I2c_user.o LARGE ANSI-C
eeprom_24C02.o LARGE ANSI-C
Aud_main.o LARGE ANSI-C
tuner.o LARGE ANSI-C
radio.o LARGE ANSI-C
Radio_pll.o LARGE ANSI-C
rtsst7.o (ansi.lib ) LARGE ANSI-C
******************************************************
STARTUP SECTION
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Entry point: 0x16B4
_startupData is allocated at 1000 and uses 38 Bytes
extern struct _tagStartup{
unsigned flags 0
_PFunc main 16B4 (_main)
unsigned dataPage 0
long stackOffset 1FE
int nofZeroOuts 1
_Range pZeroOut -> 200 107
long toCopyDownBeg 1026
_PFunc mInits -> NONE
void * libInits -> NONE
} _startupData;
******************************************************
SEGMENT-ALLOCATION SECTION
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Segmentname Size Type From To Name
ROM_VAR 21C R 2E16 3031 USER_ROM
FUNCS 1DE4 R 1032 2E15 USER_ROM
COPY C R 1026 1031 USER_ROM
STARTUP 26 R 1000 1025 USER_ROM
ST7_PWMART B N/I 73 7D (none)
ST7_ADC 3 N/I 70 72 (none)
ST7_SCI 8 N/I 50 57 (none)
ST7_TIMB F N/I 41 4F (none)
ST7_TIMA F N/I 31 3F (none)
ST7_MCC 2 N/I 2C 2D (none)
ST7_WDG 2 N/I 2A 2B (none)
ST7_FLASH 1 N/I 29 29 (none)
ST7_ITC 5 N/I 24 28 (none)
ST7_SPI 3 N/I 21 23 (none)
ST7_I2C 7 N/I 18 1E (none)
ST7_PF 3 N/I F 11 (none)
ST7_PE 3 N/I C E (none)
ST7_PD 3 N/I 9 B (none)
ST7_PC 3 N/I 6 8 (none)
ST7_PB 3 N/I 3 5 (none)
ST7_PA 3 N/I 0 2 (none)
SSTACK FF R/W 100 1FE MYSTACK
_OVERLAP C R/W 9B A6 BITS_RAM
_ZEROPAGE 1B R/W 80 9A BITS_RAM
_STARTUP B R/W 2FC 306 BYTE_RAM
DEFAULT_RAM FC R/W 200 2FB BYTE_RAM
ROM size: 2032 (dec: 8242)
RAM size: 287 (dec: 647)
******************************************************
OBJECT-ALLOCATION SECTION
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Type: Name: Address: Size: Stack:
VECTOR:
&_Startup FFFE 2
&dummy_rt FFFC 2
&dummy_rt FFFA 2
&dummy_rt FFF8 2
&dummy_rt FFF6 2
&dummy_rt FFF4 2
&dummy_rt FFF2 2
&dummy_rt FFF0 2
&dummy_rt FFEE 2
&dummy_rt FFEC 2
&INT_Timer1 FFEA 2
&dummy_rt FFE8 2
&dummy_rt FFE6 2
&dummy_rt FFE4 2
&dummy_rt FFE2 2
&dummy_rt FFE0 2
MODULE: -- start.o --
- PROCEDURES:
Init 1032 6C 0 ( 1) FUNCS
Copy 109E 62 0 ( 1) FUNCS
_Startup 1100 15 0 ( 1) FUNCS
- VARIABLES:
_startupData 1000 26 ( 8) STARTUP
p A2 2 ( 10) _OVERLAP
n 9E 2 ( 6) _OVERLAP
nofZeroOuts A0 2 ( 7) _OVERLAP
q 9C 2 ( 5) _OVERLAP
_spill_0 9B 1 ( 2) _OVERLAP
p A3 2 ( 9) _OVERLAP
m 9B 2 ( 1) _OVERLAP
n 9D 2 ( 10) _OVERLAP
q A1 2 ( 5) _OVERLAP
r 9F 2 ( 7) _OVERLAP
MODULE: -- st72321.o --
- VARIABLES:
VolTable 2E16 60 ( 0) ROM_VAR
VolChangeTable 2E76 2F ( 0) ROM_VAR
SourceTable 2EA5 2 ( 0) ROM_VAR
LoudTable 2EA7 4 ( 0) ROM_VAR
SubwTable 2EAB E ( 0) ROM_VAR
BasMidTreTable 2EB9 D ( 0) ROM_VAR
BalFadTable 2EC6 D ( 0) ROM_VAR
FM_INIT_FREQ 2ED3 6 ( 0) ROM_VAR
FM_OIRT_FREQ 2ED9 6 ( 0) ROM_VAR
AM_INIT_FREQ 2EDF 6 ( 0) ROM_VAR
LW_INIT_FREQ 2EE5 6 ( 0) ROM_VAR
I2CCR 18 1 ( 0) ST7_I2C
I2CSR1 19 1 ( 0) ST7_I2C
I2CSR2 1A 1 ( 0) ST7_I2C
I2CCCR 1B 1 ( 0) ST7_I2C
I2COAR1 1C 1 ( 0) ST7_I2C
I2COAR2 1D 1 ( 0) ST7_I2C
I2CDR 1E 1 ( 0) ST7_I2C
SPI1_DR 21 1 ( 0) ST7_SPI
SPI1_CR 22 1 ( 1) ST7_SPI
SPI1_SR 23 1 ( 0) ST7_SPI
ISPR0 24 1 ( 0) ST7_ITC
ISPR1 25 1 ( 0) ST7_ITC
ISPR2 26 1 ( 0) ST7_ITC
ISPR3 27 1 ( 0) ST7_ITC
EICR 28 1 ( 1) ST7_ITC
FCSR 29 1 ( 0) ST7_FLASH
WDGCR 2A 1 ( 0) ST7_WDG
SICSR 2B 1 ( 0) ST7_WDG
MCCSR 2C 1 ( 1) ST7_MCC
MCCBCR 2D 1 ( 0) ST7_MCC
TIM1_CR2 31 1 ( 1) ST7_TIMA
TIM1_CR1 32 1 ( 1) ST7_TIMA
TIM1_SR 33 1 ( 0) ST7_TIMA
TIM1_IC1H 34 1 ( 0) ST7_TIMA
TIM1_IC1L 35 1 ( 0) ST7_TIMA
TIM1_OC1H 36 1 ( 2) ST7_TIMA
TIM1_OC1L 37 1 ( 2) ST7_TIMA
TIM1_CNT 38 1 ( 0) ST7_TIMA
TIM1_CNTL 39 1 ( 0) ST7_TIMA
TIM1_ACH 3A 1 ( 0) ST7_TIMA
TIM1_ACL 3B 1 ( 0) ST7_TIMA
TIM1_IC2H 3C 1 ( 0) ST7_TIMA
TIM1_IC2L 3D 1 ( 0) ST7_TIMA
TIM1_OC2H 3E 1 ( 0) ST7_TIMA
TIM1_OC2L 3F 1 ( 1) ST7_TIMA
TIM2_CR2 41 1 ( 0) ST7_TIMB
TIM2_CR1 42 1 ( 0) ST7_TIMB
TIM2_SR 43 1 ( 0) ST7_TIMB
TIM2_IC1H 44 1 ( 0) ST7_TIMB
TIM2_IC1L 45 1 ( 0) ST7_TIMB
TIM2_OC1H 46 1 ( 0) ST7_TIMB
TIM2_OC1L 47 1 ( 0) ST7_TIMB
TIM2_CNT 48 1 ( 0) ST7_TIMB
TIM2_CNTL 49 1 ( 0) ST7_TIMB
TIM2_ACH 4A 1 ( 0) ST7_TIMB
TIM2_ACL 4B 1 ( 0) ST7_TIMB
TIM2_IC2H 4C 1 ( 0) ST7_TIMB
TIM2_IC2L 4D 1 ( 0) ST7_TIMB
TIM2_OC2H 4E 1 ( 0) ST7_TIMB
TIM2_OC2L 4F 1 ( 0) ST7_TIMB
SCI_SCSR 50 1 ( 0) ST7_SCI
SCI_SCDR 51 1 ( 0) ST7_SCI
SCI_SCBRR 52 1 ( 0) ST7_SCI
SCI_SCCR1 53 1 ( 0) ST7_SCI
SCI_SCCR2 54 1 ( 0) ST7_SCI
SCI_PSCBRR 55 1 ( 0) ST7_SCI
SCI_PRETEST 56 1 ( 0) ST7_SCI
SCI_PSCBRT 57 1 ( 0) ST7_SCI
ADC_CR 70 1 ( 5) ST7_ADC
ADC_DR 71 1 ( 3) ST7_ADC
ADCDRL 72 1 ( 0) ST7_ADC
PWMDCR3 73 1 ( 0) ST7_PWMART
PWMDCR2 74 1 ( 0) ST7_PWMART
PWMDCR1 75 1 ( 0) ST7_PWMART
PWMDCR0 76 1 ( 0) ST7_PWMART
PWMCR 77 1 ( 0) ST7_PWMART
ARTCSR 78 1 ( 0) ST7_PWMART
ARTCAR 79 1 ( 0) ST7_PWMART
ARTARR 7A 1 ( 0) ST7_PWMART
ARTICCSR 7B 1 ( 0) ST7_PWMART
ARTICR1 7C 1 ( 0) ST7_PWMART
ARTICR2 7D 1 ( 0) ST7_PWMART
MODULE: -- libr.o --
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