fet410_ta01.c

来自「110,120140,210,4 30,440 C语言,汇编源程序」· C语言 代码 · 共 47 行

//******************************************************************************
//  MSP-FET430P410 Demo - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK  
//
//  Description; Toggle P5.1 using using software and TA_0 ISR. Toggle rate is 
//  set at 50000 DCO/SMCLK cycles. Default DCO frequency used for TACLK. 
//  Durring the TA_0 ISR P5.1 is toggled and 50000 clock cycles are added to 
//  CCR0.  TA_0 ISR is triggered exactly 50000 cycles. CPU is normally off and
//  used only durring TA_ISR. 
//  ACLK = n/a, MCLK = SMCLK = TACLK = Default DCO
//
//           MSP430F413
//         ---------------
//     /|\|            XIN|-  
//      | |               |
//      --|RST        XOUT|-
//        |               |
//        |           P5.1|-->LED
//
//  M.Buccini
//  Texas Instruments, Inc
//  October 2003
//  Built with IAR Embedded Workbench Version: 1.26B
//  Janaury 2004
//  Updated for IAR Embedded Workbench Version: 2.21B
//******************************************************************************

#include <msp430x41x.h>

void main(void)
{ 
  WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
  P5DIR |= 0x02;                        // P5.1 output
  CCTL0 = CCIE;                         // CCR0 interrupt enabled
  CCR0 = 50000;
  TACTL = TASSEL_2 + MC_2;              // SMCLK, contmode
  _BIS_SR(LPM0_bits + GIE);             // Enter LPM0 w/ interrupt
}

// Timer A0 interrupt service routine
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
  P5OUT ^= 0x02;                        // Toggle P5.1
  CCR0 += 50000;                        // Add Offset to CCR0
}