📄 io_map.h
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.H
** Project : dy
** Processor : MC9S08QD4CSC
** Beantype : IO_Map
** Version : Driver 01.06
** Compiler : CodeWarrior HCS08 C Compiler
** Date/Time : 2008-2-26, 9:12
** Abstract :
** IO_Map.h - implements an IO device's mapping.
** This module contains symbol definitions of all peripheral
** registers and bits.
** Settings :
**
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2006
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef _IO_MAP_H
#define _IO_MAP_H
/* Based on CPU DB MC9S08QD4_8, version 2.87.049 (RegistersPrg V2.15) */
/* DataSheet : MC9S08QD4 Rev. 2 Draft B (Release Candidate) 11/2006 */
#include "PE_Types.h"
#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */
/*********************************************/
/* */
/* PE I/O map */
/* */
/*********************************************/
/**************** interrupt vector numbers ****************/
#define VectorNumber_Vrti 23
#define VectorNumber_Reserved1 22
#define VectorNumber_Reserved2 21
#define VectorNumber_Reserved3 20
#define VectorNumber_Vadc1 19
#define VectorNumber_Vkeyboard1 18
#define VectorNumber_Reserved6 17
#define VectorNumber_Reserved7 16
#define VectorNumber_Reserved8 15
#define VectorNumber_Reserved9 14
#define VectorNumber_Reserved10 13
#define VectorNumber_Reserved11 12
#define VectorNumber_Reserved12 11
#define VectorNumber_Vtpm2ovf 10
#define VectorNumber_Reserved14 9
#define VectorNumber_Vtpm2ch0 8
#define VectorNumber_Vtpm1ovf 7
#define VectorNumber_Vtpm1ch1 6
#define VectorNumber_Vtpm1ch0 5
#define VectorNumber_Reserved19 4
#define VectorNumber_Virq 3
#define VectorNumber_Vlvd 2
#define VectorNumber_Vswi 1
#define VectorNumber_Vreset 0
/**************** interrupt vector table ****************/
#define Vrti 0x0000FFD0
#define Reserved1 0x0000FFD2
#define Reserved2 0x0000FFD4
#define Reserved3 0x0000FFD6
#define Vadc1 0x0000FFD8
#define Vkeyboard1 0x0000FFDA
#define Reserved6 0x0000FFDC
#define Reserved7 0x0000FFDE
#define Reserved8 0x0000FFE0
#define Reserved9 0x0000FFE2
#define Reserved10 0x0000FFE4
#define Reserved11 0x0000FFE6
#define Reserved12 0x0000FFE8
#define Vtpm2ovf 0x0000FFEA
#define Reserved14 0x0000FFEC
#define Vtpm2ch0 0x0000FFEE
#define Vtpm1ovf 0x0000FFF0
#define Vtpm1ch1 0x0000FFF2
#define Vtpm1ch0 0x0000FFF4
#define Reserved19 0x0000FFF6
#define Virq 0x0000FFF8
#define Vlvd 0x0000FFFA
#define Vswi 0x0000FFFC
#define Vreset 0x0000FFFE
/**************** registers I/O map ****************/
/*** PTAD - Port A Data Register; 0x00000000 ***/
typedef union {
byte Byte;
struct {
byte PTAD0 :1; /* Port A Data Register Bit 0 */
byte PTAD1 :1; /* Port A Data Register Bit 1 */
byte PTAD2 :1; /* Port A Data Register Bit 2 */
byte PTAD3 :1; /* Port A Data Register Bit 3 */
byte PTAD4 :1; /* Port A Data Register Bit 4 */
byte PTAD5 :1; /* Port A Data Register Bit 5 */
byte :1;
byte :1;
} Bits;
struct {
byte grpPTAD :6;
byte :1;
byte :1;
} MergedBits;
} PTADSTR;
extern volatile PTADSTR _PTAD @0x00000000;
#define PTAD _PTAD.Byte
#define PTAD_PTAD0 _PTAD.Bits.PTAD0
#define PTAD_PTAD1 _PTAD.Bits.PTAD1
#define PTAD_PTAD2 _PTAD.Bits.PTAD2
#define PTAD_PTAD3 _PTAD.Bits.PTAD3
#define PTAD_PTAD4 _PTAD.Bits.PTAD4
#define PTAD_PTAD5 _PTAD.Bits.PTAD5
#define PTAD_PTAD _PTAD.MergedBits.grpPTAD
#define PTAD_PTAD0_MASK 0x01
#define PTAD_PTAD1_MASK 0x02
#define PTAD_PTAD2_MASK 0x04
#define PTAD_PTAD3_MASK 0x08
#define PTAD_PTAD4_MASK 0x10
#define PTAD_PTAD5_MASK 0x20
#define PTAD_PTAD_MASK 0x3F
#define PTAD_PTAD_BITNUM 0x00
/*** PTADD - Data Direction Register A; 0x00000001 ***/
typedef union {
byte Byte;
struct {
byte PTADD0 :1; /* Data Direction for Port A Bit 0 */
byte PTADD1 :1; /* Data Direction for Port A Bit 1 */
byte PTADD2 :1; /* Data Direction for Port A Bit 2 */
byte PTADD3 :1; /* Data Direction for Port A Bit 3 */
byte PTADD4 :1; /* Data Direction for Port A Bit 4 */
byte PTADD5 :1; /* Data Direction for Port A Bit 5 */
byte :1;
byte :1;
} Bits;
struct {
byte grpPTADD :6;
byte :1;
byte :1;
} MergedBits;
} PTADDSTR;
extern volatile PTADDSTR _PTADD @0x00000001;
#define PTADD _PTADD.Byte
#define PTADD_PTADD0 _PTADD.Bits.PTADD0
#define PTADD_PTADD1 _PTADD.Bits.PTADD1
#define PTADD_PTADD2 _PTADD.Bits.PTADD2
#define PTADD_PTADD3 _PTADD.Bits.PTADD3
#define PTADD_PTADD4 _PTADD.Bits.PTADD4
#define PTADD_PTADD5 _PTADD.Bits.PTADD5
#define PTADD_PTADD _PTADD.MergedBits.grpPTADD
#define PTADD_PTADD0_MASK 0x01
#define PTADD_PTADD1_MASK 0x02
#define PTADD_PTADD2_MASK 0x04
#define PTADD_PTADD3_MASK 0x08
#define PTADD_PTADD4_MASK 0x10
#define PTADD_PTADD5_MASK 0x20
#define PTADD_PTADD_MASK 0x3F
#define PTADD_PTADD_BITNUM 0x00
/*** KBISC - KBI Status and Control; 0x0000000C ***/
typedef union {
byte Byte;
struct {
byte KBIMOD :1; /* Keyboard Detection Mode */
byte KBIE :1; /* Keyboard Interrupt Enable */
byte KBACK :1; /* Keyboard Interrupt Acknowledge */
byte KBF :1; /* Keyboard Interrupt Flag */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} KBISCSTR;
extern volatile KBISCSTR _KBISC @0x0000000C;
#define KBISC _KBISC.Byte
#define KBISC_KBIMOD _KBISC.Bits.KBIMOD
#define KBISC_KBIE _KBISC.Bits.KBIE
#define KBISC_KBACK _KBISC.Bits.KBACK
#define KBISC_KBF _KBISC.Bits.KBF
#define KBISC_KBIMOD_MASK 0x01
#define KBISC_KBIE_MASK 0x02
#define KBISC_KBACK_MASK 0x04
#define KBISC_KBF_MASK 0x08
/*** KBIPE - KBI Pin Enable Register; 0x0000000D ***/
typedef union {
byte Byte;
struct {
byte KBIPE0 :1; /* Keyboard Pin Enable for Port A Bit 0 */
byte KBIPE1 :1; /* Keyboard Pin Enable for Port A Bit 1 */
byte KBIPE2 :1; /* Keyboard Pin Enable for Port A Bit 2 */
byte KBIPE3 :1; /* Keyboard Pin Enable for Port A Bit 3 */
byte KBIPE4 :1; /* Keyboard Pin Enable for Port A Bit 4 */
byte KBIPE5 :1; /* Keyboard Pin Enable for Port A Bit 5 */
byte KBIPE6 :1; /* Keyboard Pin Enable for Port A Bit 6 */
byte KBIPE7 :1; /* Keyboard Pin Enable for Port A Bit 7 */
} Bits;
} KBIPESTR;
extern volatile KBIPESTR _KBIPE @0x0000000D;
#define KBIPE _KBIPE.Byte
#define KBIPE_KBIPE0 _KBIPE.Bits.KBIPE0
#define KBIPE_KBIPE1 _KBIPE.Bits.KBIPE1
#define KBIPE_KBIPE2 _KBIPE.Bits.KBIPE2
#define KBIPE_KBIPE3 _KBIPE.Bits.KBIPE3
#define KBIPE_KBIPE4 _KBIPE.Bits.KBIPE4
#define KBIPE_KBIPE5 _KBIPE.Bits.KBIPE5
#define KBIPE_KBIPE6 _KBIPE.Bits.KBIPE6
#define KBIPE_KBIPE7 _KBIPE.Bits.KBIPE7
#define KBIPE_KBIPE0_MASK 0x01
#define KBIPE_KBIPE1_MASK 0x02
#define KBIPE_KBIPE2_MASK 0x04
#define KBIPE_KBIPE3_MASK 0x08
#define KBIPE_KBIPE4_MASK 0x10
#define KBIPE_KBIPE5_MASK 0x20
#define KBIPE_KBIPE6_MASK 0x40
#define KBIPE_KBIPE7_MASK 0x80
/*** KBIES - KBI Edge Select Register; 0x0000000E ***/
typedef union {
byte Byte;
struct {
byte KBEDG0 :1; /* Keyboard Edge Select Bit 0 */
byte KBEDG1 :1; /* Keyboard Edge Select Bit 1 */
byte KBEDG2 :1; /* Keyboard Edge Select Bit 2 */
byte KBEDG3 :1; /* Keyboard Edge Select Bit 3 */
byte KBEDG4 :1; /* Keyboard Edge Select Bit 4 */
byte KBEDG5 :1; /* Keyboard Edge Select Bit 5 */
byte KBEDG6 :1; /* Keyboard Edge Select Bit 6 */
byte KBEDG7 :1; /* Keyboard Edge Select Bit 7 */
} Bits;
} KBIESSTR;
extern volatile KBIESSTR _KBIES @0x0000000E;
#define KBIES _KBIES.Byte
#define KBIES_KBEDG0 _KBIES.Bits.KBEDG0
#define KBIES_KBEDG1 _KBIES.Bits.KBEDG1
#define KBIES_KBEDG2 _KBIES.Bits.KBEDG2
#define KBIES_KBEDG3 _KBIES.Bits.KBEDG3
#define KBIES_KBEDG4 _KBIES.Bits.KBEDG4
#define KBIES_KBEDG5 _KBIES.Bits.KBEDG5
#define KBIES_KBEDG6 _KBIES.Bits.KBEDG6
#define KBIES_KBEDG7 _KBIES.Bits.KBEDG7
#define KBIES_KBEDG0_MASK 0x01
#define KBIES_KBEDG1_MASK 0x02
#define KBIES_KBEDG2_MASK 0x04
#define KBIES_KBEDG3_MASK 0x08
#define KBIES_KBEDG4_MASK 0x10
#define KBIES_KBEDG5_MASK 0x20
#define KBIES_KBEDG6_MASK 0x40
#define KBIES_KBEDG7_MASK 0x80
/*** IRQSC - Interrupt Request Status and Control Register; 0x0000000F ***/
typedef union {
byte Byte;
struct {
byte IRQMOD :1; /* IRQ Detection Mode */
byte IRQIE :1; /* IRQ Interrupt Enable */
byte IRQACK :1; /* IRQ Acknowledge */
byte IRQF :1; /* IRQ Flag */
byte IRQPE :1; /* IRQ Pin Enable */
byte IRQEDG :1; /* Interrupt Request (IRQ) Edge Select */
byte IRQPDD :1; /* Interrupt Request (IRQ) Pull Device Disable */
byte :1;
} Bits;
} IRQSCSTR;
extern volatile IRQSCSTR _IRQSC @0x0000000F;
#define IRQSC _IRQSC.Byte
#define IRQSC_IRQMOD _IRQSC.Bits.IRQMOD
#define IRQSC_IRQIE _IRQSC.Bits.IRQIE
#define IRQSC_IRQACK _IRQSC.Bits.IRQACK
#define IRQSC_IRQF _IRQSC.Bits.IRQF
#define IRQSC_IRQPE _IRQSC.Bits.IRQPE
#define IRQSC_IRQEDG _IRQSC.Bits.IRQEDG
#define IRQSC_IRQPDD _IRQSC.Bits.IRQPDD
#define IRQSC_IRQMOD_MASK 0x01
#define IRQSC_IRQIE_MASK 0x02
#define IRQSC_IRQACK_MASK 0x04
#define IRQSC_IRQF_MASK 0x08
#define IRQSC_IRQPE_MASK 0x10
#define IRQSC_IRQEDG_MASK 0x20
#define IRQSC_IRQPDD_MASK 0x40
/*** ADCSC1 - Status and Control Register; 0x00000010 ***/
typedef union {
byte Byte;
struct {
byte ADCH0 :1; /* Input Channel Select Bit 0 */
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