📄 bsp_pcf8563.txt
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0004f8 e12fff1e BX lr
|L1.1276|
0004fc e5d43003 LDRB r3,[r4,#3] ;223
000500 e203300f AND r3,r3,#0xf ;223
000504 e5d4c003 LDRB r12,[r4,#3] ;223
000508 e1a0c24c ASR r12,r12,#4 ;223
00050c e08cc10c ADD r12,r12,r12,LSL #2 ;223
000510 e083208c ADD r2,r3,r12,LSL #1 ;223
000514 e5d43004 LDRB r3,[r4,#4] ;223
000518 e203300f AND r3,r3,#0xf ;223
00051c e5d4c004 LDRB r12,[r4,#4] ;223
000520 e1a0c24c ASR r12,r12,#4 ;223
000524 e08cc10c ADD r12,r12,r12,LSL #2 ;223
000528 e083108c ADD r1,r3,r12,LSL #1 ;223
00052c e5d43005 LDRB r3,[r4,#5] ;223
000530 e203300f AND r3,r3,#0xf ;223
000534 e5d4c005 LDRB r12,[r4,#5] ;223
000538 e1a0c24c ASR r12,r12,#4 ;223
00053c e08cc10c ADD r12,r12,r12,LSL #2 ;223
000540 e083008c ADD r0,r3,r12,LSL #1 ;223
000544 ebfffffe BL Get_Wday ;223
000548 e5c40006 STRB r0,[r4,#6] ;223
00054c e5d41005 LDRB r1,[r4,#5] ;225
000550 e3a00008 MOV r0,#8 ;225
000554 ebfffffe BL Write_PCF8563_Reg ;225
000558 e5d41004 LDRB r1,[r4,#4] ;226
00055c e3a00007 MOV r0,#7 ;226
000560 ebfffffe BL Write_PCF8563_Reg ;226
000564 e5d41006 LDRB r1,[r4,#6] ;227
000568 e3a00006 MOV r0,#6 ;227
00056c ebfffffe BL Write_PCF8563_Reg ;227
000570 e5d41003 LDRB r1,[r4,#3] ;228
000574 e3a00005 MOV r0,#5 ;228
000578 ebfffffe BL Write_PCF8563_Reg ;228
00057c e5d41002 LDRB r1,[r4,#2] ;229
000580 e3a00004 MOV r0,#4 ;229
000584 ebfffffe BL Write_PCF8563_Reg ;229
000588 e5d41001 LDRB r1,[r4,#1] ;230
00058c e3a00003 MOV r0,#3 ;230
000590 ebfffffe BL Write_PCF8563_Reg ;230
000594 e5d41000 LDRB r1,[r4,#0] ;231
000598 e3a00002 MOV r0,#2 ;231
00059c ebfffffe BL Write_PCF8563_Reg ;231
0005a0 eaffffd3 B |L1.1268|
ENDP
Start_PCF8563 PROC
;;;235 void Start_PCF8563( void )
;;;236 {
0005a4 e92d401c PUSH {r2-r4,lr}
;;;237 u8 temp;
;;;238 RTC_clock Time;
;;;239
;;;240 Config_I2C0();
0005a8 ebfffffe BL Config_I2C0
;;;241
;;;242 temp = Read_PCF8563_Reg( PCF8563_C_R );
0005ac e3a00000 MOV r0,#0
0005b0 ebfffffe BL Read_PCF8563_Reg
0005b4 e1a04000 MOV r4,r0
;;;243 temp |= ~PCF8563_RUN;
0005b8 e3e000cf MVN r0,#0xcf
0005bc e1800004 ORR r0,r0,r4
0005c0 e20040ff AND r4,r0,#0xff
;;;244 Write_PCF8563_Reg( PCF8563_C_R, temp);
0005c4 e1a01004 MOV r1,r4
0005c8 e3a00000 MOV r0,#0
0005cc ebfffffe BL Write_PCF8563_Reg
;;;245 PCF8563Delay(1000);
0005d0 e3a00ffa MOV r0,#0x3e8
0005d4 ebfffffe BL PCF8563Delay
;;;246 temp &= PCF8563_RUN;
0005d8 e20440cf AND r4,r4,#0xcf
;;;247 Write_PCF8563_Reg( PCF8563_C_R, temp);
0005dc e1a01004 MOV r1,r4
0005e0 e3a00000 MOV r0,#0
0005e4 ebfffffe BL Write_PCF8563_Reg
;;;248
;;;249
;;;250
;;;251 Time.second = 0x22;
0005e8 e3a00022 MOV r0,#0x22
0005ec e5cd0000 STRB r0,[sp,#0]
;;;252 Time.minute = 0x33;
0005f0 e3a00033 MOV r0,#0x33
0005f4 e5cd0001 STRB r0,[sp,#1]
;;;253 Time.hour = 0x14;
0005f8 e3a00014 MOV r0,#0x14
0005fc e5cd0002 STRB r0,[sp,#2]
;;;254 Time.date = 0x25;
000600 e3a00025 MOV r0,#0x25
000604 e5cd0003 STRB r0,[sp,#3]
;;;255 Time.month = 0x06;
000608 e3a00006 MOV r0,#6
00060c e5cd0004 STRB r0,[sp,#4]
;;;256 Time.year = 0x07;
000610 e3a00007 MOV r0,#7
000614 e5cd0005 STRB r0,[sp,#5]
;;;257 Time.wday = 0x01;
000618 e3a00001 MOV r0,#1
00061c e5cd0006 STRB r0,[sp,#6]
;;;258 Set_PCF8563_Time(&Time);
000620 e1a0000d MOV r0,sp
000624 ebfffffe BL Set_PCF8563_Time
;;;259 }
000628 e8bd401c POP {r2-r4,lr}
00062c e12fff1e BX lr
ENDP
Read_PCF8563_Time PROC
;;;272 void Read_PCF8563_Time( void )//( u8 *time )
;;;273 {
000630 e92d401c PUSH {r2-r4,lr}
;;;274 RTC_clock Time;
;;;275 // u8 y,m,d,h,min,s,wd;
;;;276
;;;277 // os_mut_wait( MUT_i2c, 0xffff );
;;;278 Time.second = Read_PCF8563_Reg( PCF8563_S_R ) & 0x7f; //
000634 e3a00002 MOV r0,#2
000638 ebfffffe BL Read_PCF8563_Reg
00063c e200007f AND r0,r0,#0x7f
000640 e5cd0000 STRB r0,[sp,#0]
;;;279 Time.minute = Read_PCF8563_Reg( PCF8563_MIN_R ) & 0x7f; //
000644 e3a00003 MOV r0,#3
000648 ebfffffe BL Read_PCF8563_Reg
00064c e200007f AND r0,r0,#0x7f
000650 e5cd0001 STRB r0,[sp,#1]
;;;280 Time.hour = Read_PCF8563_Reg( PCF8563_H_R ) & 0x3f; //
000654 e3a00004 MOV r0,#4
000658 ebfffffe BL Read_PCF8563_Reg
00065c e200003f AND r0,r0,#0x3f
000660 e5cd0002 STRB r0,[sp,#2]
;;;281 Time.date = Read_PCF8563_Reg( PCF8563_DAT_R ) & 0x3f; //
000664 e3a00005 MOV r0,#5
000668 ebfffffe BL Read_PCF8563_Reg
00066c e200003f AND r0,r0,#0x3f
000670 e5cd0003 STRB r0,[sp,#3]
;;;282 Time.month = Read_PCF8563_Reg( PCF8563_MON_R ) &0x1f; //
000674 e3a00007 MOV r0,#7
000678 ebfffffe BL Read_PCF8563_Reg
00067c e200001f AND r0,r0,#0x1f
000680 e5cd0004 STRB r0,[sp,#4]
;;;283 Time.year = Read_PCF8563_Reg( PCF8563_Y_R ); //
000684 e3a00008 MOV r0,#8
000688 ebfffffe BL Read_PCF8563_Reg
00068c e5cd0005 STRB r0,[sp,#5]
;;;284 Time.wday = Read_PCF8563_Reg( PCF8563_DAY_R) &0x07; //
000690 e3a00006 MOV r0,#6
000694 ebfffffe BL Read_PCF8563_Reg
000698 e2000007 AND r0,r0,#7
00069c e5cd0006 STRB r0,[sp,#6]
;;;285
;;;286 if(Time_check_valid( &Time)) // 检查时间合法性
0006a0 e1a0000d MOV r0,sp
0006a4 ebfffffe BL Time_check_valid
0006a8 e3500000 CMP r0,#0
0006ac 0a00000e BEQ |L1.1772|
;;;287 {
;;;288 RTC_clock_bcd.second = Time.second;
0006b0 e5dd0000 LDRB r0,[sp,#0]
0006b4 e59f1048 LDR r1,|L1.1796|
0006b8 e5c10000 STRB r0,[r1,#0] ; RTC_clock_bcd
;;;289 RTC_clock_bcd.minute = Time.minute;
0006bc e5dd0001 LDRB r0,[sp,#1]
0006c0 e5c10001 STRB r0,[r1,#1] ; RTC_clock_bcd
;;;290 RTC_clock_bcd.hour = Time.hour;
0006c4 e5dd0002 LDRB r0,[sp,#2]
0006c8 e5c10002 STRB r0,[r1,#2] ; RTC_clock_bcd
;;;291 RTC_clock_bcd.date = Time.date;
0006cc e5dd0003 LDRB r0,[sp,#3]
0006d0 e5c10003 STRB r0,[r1,#3] ; RTC_clock_bcd
;;;292 RTC_clock_bcd.month = Time.month;
0006d4 e5dd0004 LDRB r0,[sp,#4]
0006d8 e5c10004 STRB r0,[r1,#4] ; RTC_clock_bcd
;;;293 RTC_clock_bcd.year = Time.year;
0006dc e5dd0005 LDRB r0,[sp,#5]
0006e0 e5c10005 STRB r0,[r1,#5] ; RTC_clock_bcd
;;;294 RTC_clock_bcd.wday = Time.wday;
0006e4 e5dd0006 LDRB r0,[sp,#6]
0006e8 e5c10006 STRB r0,[r1,#6] ; RTC_clock_bcd
;;;295 }
;;;296
;;;297 // os_mut_release( MUT_i2c );
;;;298 }
|L1.1772|
0006ec e8bd401c POP {r2-r4,lr}
0006f0 e12fff1e BX lr
|L1.1780|
0006f4 e0004000 DCD 0xe0004000
|L1.1784|
0006f8 c0001000 DCD 0xc0001000
|L1.1788|
0006fc 00030d40 DCD 0x00030d40
|L1.1792|
000700 00002710 DCD 0x00002710
|L1.1796|
000704 00000000 DCD RTC_clock_bcd
ENDP
AREA ||i.I2C_STARTGenerate||, COMGROUP=I2C_STARTGenerate, CODE, READONLY, ALIGN=2
I2C_STARTGenerate PROC
;;;144 {
;;;145 if (NewState == ENABLE) I2Cx->CR |= I2C_START_Mask;
000000 e3510001 CMP r1,#1
000004 1a000003 BNE |L2.24|
000008 e5d02000 LDRB r2,[r0,#0]
00000c e3822008 ORR r2,r2,#8
000010 e5c02000 STRB r2,[r0,#0]
000014 ea000002 B |L2.36|
;;;146 else I2Cx->CR &= ~I2C_START_Mask;
|L2.24|
000018 e5d02000 LDRB r2,[r0,#0]
00001c e3c22008 BIC r2,r2,#8
000020 e5c02000 STRB r2,[r0,#0]
;;;147 }
|L2.36|
000024 e12fff1e BX lr
ENDP
AREA ||i.I2C_STOPGenerate||, COMGROUP=I2C_STOPGenerate, CODE, READONLY, ALIGN=2
I2C_STOPGenerate PROC
;;;157 {
;;;158 if (NewState == ENABLE) I2Cx->CR |= I2C_STOP_Mask;
000000 e3510001 CMP r1,#1
000004 1a000003 BNE |L3.24|
000008 e5d02000 LDRB r2,[r0,#0]
00000c e3822002 ORR r2,r2,#2
000010 e5c02000 STRB r2,[r0,#0]
000014 ea000002 B |L3.36|
;;;159 else I2Cx->CR &= ~I2C_STOP_Mask;
|L3.24|
000018 e5d02000 LDRB r2,[r0,#0]
00001c e3c22002 BIC r2,r2,#2
000020 e5c02000 STRB r2,[r0,#0]
;;;160 }
|L3.36|
000024 e12fff1e BX lr
ENDP
AREA ||i.I2C_AcknowledgeConfig||, COMGROUP=I2C_AcknowledgeConfig, CODE, READONLY, ALIGN=2
I2C_AcknowledgeConfig PROC
;;;170 {
;;;171 if (NewState == ENABLE) I2Cx->CR |= I2C_ACK_Mask;
000000 e3510001 CMP r1,#1
000004 1a000003 BNE |L4.24|
000008 e5d02000 LDRB r2,[r0,#0]
00000c e3822004 ORR r2,r2,#4
000010 e5c02000 STRB r2,[r0,#0]
000014 ea000002 B |L4.36|
;;;172 else I2Cx->CR &= ~I2C_ACK_Mask;
|L4.24|
000018 e5d02000 LDRB r2,[r0,#0]
00001c e3c22004 BIC r2,r2,#4
000020 e5c02000 STRB r2,[r0,#0]
;;;173 }
|L4.36|
000024 e12fff1e BX lr
ENDP
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