📄 pca9555.txt
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;;;165 I2C_STOPGenerate( I2C0, ENABLE );
;;;166 c = I2C0->DR;
;;;167 while ( I2C0->CR & I2C_STOP_Mask )
;;;168 {
;;;169 I2C_ERR_RETURN(i, 0x00);
;;;170 }
;;;171
;;;172 return c;
;;;173 }
000224 e12fff1e BX lr
|L1.552|
000228 e59f0234 LDR r0,|L1.1124| ;122
00022c e5d00004 LDRB r0,[r0,#4] ;122
000230 e3100001 TST r0,#1 ;122
000234 0afffff5 BEQ |L1.528| ;122
000238 e3a00040 MOV r0,#0x40 ;128
00023c e59f1220 LDR r1,|L1.1124| ;128
000240 e5c10018 STRB r0,[r1,#0x18] ;128
000244 ea000004 B |L1.604| ;129
|L1.584|
000248 e2466001 SUB r6,r6,#1 ;131
00024c e3560000 CMP r6,#0 ;131
000250 1a000001 BNE |L1.604| ;131
000254 e3a00000 MOV r0,#0 ;131
000258 eafffff0 B |L1.544| ;131
|L1.604|
00025c e59f0200 LDR r0,|L1.1124| ;129
000260 e5d00008 LDRB r0,[r0,#8] ;129
000264 e3100020 TST r0,#0x20 ;129
000268 0afffff6 BEQ |L1.584| ;129
00026c e59f01f0 LDR r0,|L1.1124| ;133
000270 e5d00000 LDRB r0,[r0,#0] ;133
000274 e3800020 ORR r0,r0,#0x20 ;133
000278 e59f11e4 LDR r1,|L1.1124| ;133
00027c e5c10000 STRB r0,[r1,#0] ;133
000280 ea000004 B |L1.664| ;135
|L1.644|
000284 e2466001 SUB r6,r6,#1 ;137
000288 e3560000 CMP r6,#0 ;137
00028c 1a000001 BNE |L1.664| ;137
000290 e3a00000 MOV r0,#0 ;137
000294 eaffffe1 B |L1.544| ;137
|L1.664|
000298 e59f01c4 LDR r0,|L1.1124| ;135
00029c e5d00004 LDRB r0,[r0,#4] ;135
0002a0 e3100008 TST r0,#8 ;135
0002a4 0afffff6 BEQ |L1.644| ;135
0002a8 e59f01b4 LDR r0,|L1.1124| ;139
0002ac e5c04018 STRB r4,[r0,#0x18] ;139
0002b0 ea000004 B |L1.712| ;140
|L1.692|
0002b4 e2466001 SUB r6,r6,#1 ;142
0002b8 e3560000 CMP r6,#0 ;142
0002bc 1a000001 BNE |L1.712| ;142
0002c0 e3a00000 MOV r0,#0 ;142
0002c4 eaffffd5 B |L1.544| ;142
|L1.712|
0002c8 e59f0194 LDR r0,|L1.1124| ;140
0002cc e5d00004 LDRB r0,[r0,#4] ;140
0002d0 e3100008 TST r0,#8 ;140
0002d4 0afffff6 BEQ |L1.692| ;140
0002d8 e3a01000 MOV r1,#0 ;146
0002dc e59f0180 LDR r0,|L1.1124| ;146
0002e0 ebfffffe BL I2C_AcknowledgeConfig ;146
0002e4 e3a01001 MOV r1,#1 ;148
0002e8 e59f0174 LDR r0,|L1.1124| ;148
0002ec ebfffffe BL I2C_STARTGenerate ;148
0002f0 ea000004 B |L1.776| ;149
|L1.756|
0002f4 e2466001 SUB r6,r6,#1 ;151
0002f8 e3560000 CMP r6,#0 ;151
0002fc 1a000001 BNE |L1.776| ;151
000300 e3a00000 MOV r0,#0 ;151
000304 eaffffc5 B |L1.544| ;151
|L1.776|
000308 e59f0154 LDR r0,|L1.1124| ;149
00030c e5d00004 LDRB r0,[r0,#4] ;149
000310 e3100001 TST r0,#1 ;149
000314 0afffff6 BEQ |L1.756| ;149
000318 e3a00041 MOV r0,#0x41 ;154
00031c e59f1140 LDR r1,|L1.1124| ;154
000320 e5c10018 STRB r0,[r1,#0x18] ;154
000324 ea000004 B |L1.828| ;155
|L1.808|
000328 e2466001 SUB r6,r6,#1 ;157
00032c e3560000 CMP r6,#0 ;157
000330 1a000001 BNE |L1.828| ;157
000334 e3a00000 MOV r0,#0 ;157
000338 eaffffb8 B |L1.544| ;157
|L1.828|
00033c e59f0120 LDR r0,|L1.1124| ;155
000340 e5d00008 LDRB r0,[r0,#8] ;155
000344 e3100020 TST r0,#0x20 ;155
000348 0afffff6 BEQ |L1.808| ;155
00034c e59f0110 LDR r0,|L1.1124| ;159
000350 e5d00000 LDRB r0,[r0,#0] ;159
000354 e3800020 ORR r0,r0,#0x20 ;159
000358 e59f1104 LDR r1,|L1.1124| ;159
00035c e5c10000 STRB r0,[r1,#0] ;159
000360 ea000004 B |L1.888| ;161
|L1.868|
000364 e2466001 SUB r6,r6,#1 ;163
000368 e3560000 CMP r6,#0 ;163
00036c 1a000001 BNE |L1.888| ;163
000370 e3a00000 MOV r0,#0 ;163
000374 eaffffa9 B |L1.544| ;163
|L1.888|
000378 e59f00e4 LDR r0,|L1.1124| ;161
00037c e5d00004 LDRB r0,[r0,#4] ;161
000380 e3100008 TST r0,#8 ;161
000384 0afffff6 BEQ |L1.868| ;161
000388 e3a01001 MOV r1,#1 ;165
00038c e59f00d0 LDR r0,|L1.1124| ;165
000390 ebfffffe BL I2C_STOPGenerate ;165
000394 e59f00c8 LDR r0,|L1.1124| ;166
000398 e5d05018 LDRB r5,[r0,#0x18] ;166
00039c ea000004 B |L1.948| ;167
|L1.928|
0003a0 e2466001 SUB r6,r6,#1 ;169
0003a4 e3560000 CMP r6,#0 ;169
0003a8 1a000001 BNE |L1.948| ;169
0003ac e3a00000 MOV r0,#0 ;169
0003b0 eaffff9a B |L1.544| ;169
|L1.948|
0003b4 e59f00a8 LDR r0,|L1.1124| ;167
0003b8 e5d00000 LDRB r0,[r0,#0] ;167
0003bc e3100002 TST r0,#2 ;167
0003c0 1afffff6 BNE |L1.928| ;167
0003c4 e1a00005 MOV r0,r5 ;172
0003c8 eaffff94 B |L1.544| ;172
ENDP
OUT_PCA9555_IO PROC
;;;185 void OUT_PCA9555_IO(u8 bit_pot, u8 bit_value)
;;;186 {
0003cc e92d4070 PUSH {r4-r6,lr}
0003d0 e1a04000 MOV r4,r0
0003d4 e1a05001 MOV r5,r1
;;;187 u8 port_value;
;;;188 os_mut_wait( MUT_i2c, 0xffff );
0003d8 e59f1088 LDR r1,|L1.1128|
0003dc e59f0088 LDR r0,|L1.1132|
0003e0 ebfffffe BL os_mut_wait
;;;189 if(bit_pot < 8)
0003e4 e3540008 CMP r4,#8
0003e8 aa00000b BGE |L1.1052|
;;;190 {
;;;191 port_value = Read_PCA9555_Reg(0x02);
0003ec e3a00002 MOV r0,#2
0003f0 ebfffffe BL Read_PCA9555_Reg
0003f4 e1a06000 MOV r6,r0
;;;192 port_value &= (~(0x01 << bit_pot));
0003f8 e3a00001 MOV r0,#1
0003fc e1c60410 BIC r0,r6,r0,LSL r4
000400 e20060ff AND r6,r0,#0xff
;;;193 port_value |= (bit_value << bit_pot);
000404 e1860415 ORR r0,r6,r5,LSL r4
000408 e20060ff AND r6,r0,#0xff
;;;194
;;;195 Write_PCA9555_Reg(0x02, port_value);
00040c e1a01006 MOV r1,r6
000410 e3a00002 MOV r0,#2
000414 ebfffffe BL Write_PCA9555_Reg
000418 ea00000c B |L1.1104|
;;;196 }
;;;197 else
;;;198 {
;;;199 port_value = Read_PCA9555_Reg(0x03);
|L1.1052|
00041c e3a00003 MOV r0,#3
000420 ebfffffe BL Read_PCA9555_Reg
000424 e1a06000 MOV r6,r0
;;;200 port_value &= (~(0x01 << (bit_pot - 8)));
000428 e2440008 SUB r0,r4,#8
00042c e3a01001 MOV r1,#1
000430 e1c60011 BIC r0,r6,r1,LSL r0
000434 e20060ff AND r6,r0,#0xff
;;;201 port_value |= (bit_value << (bit_pot - 8));
000438 e2440008 SUB r0,r4,#8
00043c e1860015 ORR r0,r6,r5,LSL r0
000440 e20060ff AND r6,r0,#0xff
;;;202
;;;203 Write_PCA9555_Reg(0x03, port_value);
000444 e1a01006 MOV r1,r6
000448 e3a00003 MOV r0,#3
00044c ebfffffe BL Write_PCA9555_Reg
;;;204 }
;;;205
;;;206 os_mut_release( MUT_i2c );
|L1.1104|
000450 e59f0014 LDR r0,|L1.1132|
000454 ebfffffe BL os_mut_release
;;;207 }
000458 e8bd4070 POP {r4-r6,lr}
00045c e12fff1e BX lr
|L1.1120|
000460 00002710 DCD 0x00002710
|L1.1124|
000464 c0001000 DCD 0xc0001000
|L1.1128|
000468 0000ffff DCD 0x0000ffff
|L1.1132|
00046c 00000000 DCD MUT_i2c
|L1.1136|
000470 e0004000 DCD 0xe0004000
|L1.1140|
000474 00061a80 DCD 0x00061a80
ENDP
AREA ||i.I2C_STARTGenerate||, COMGROUP=I2C_STARTGenerate, CODE, READONLY, ALIGN=2
I2C_STARTGenerate PROC
;;;144 {
;;;145 if (NewState == ENABLE) I2Cx->CR |= I2C_START_Mask;
000000 e3510001 CMP r1,#1
000004 1a000003 BNE |L2.24|
000008 e5d02000 LDRB r2,[r0,#0]
00000c e3822008 ORR r2,r2,#8
000010 e5c02000 STRB r2,[r0,#0]
000014 ea000002 B |L2.36|
;;;146 else I2Cx->CR &= ~I2C_START_Mask;
|L2.24|
000018 e5d02000 LDRB r2,[r0,#0]
00001c e3c22008 BIC r2,r2,#8
000020 e5c02000 STRB r2,[r0,#0]
;;;147 }
|L2.36|
000024 e12fff1e BX lr
ENDP
AREA ||i.I2C_STOPGenerate||, COMGROUP=I2C_STOPGenerate, CODE, READONLY, ALIGN=2
I2C_STOPGenerate PROC
;;;157 {
;;;158 if (NewState == ENABLE) I2Cx->CR |= I2C_STOP_Mask;
000000 e3510001 CMP r1,#1
000004 1a000003 BNE |L3.24|
000008 e5d02000 LDRB r2,[r0,#0]
00000c e3822002 ORR r2,r2,#2
000010 e5c02000 STRB r2,[r0,#0]
000014 ea000002 B |L3.36|
;;;159 else I2Cx->CR &= ~I2C_STOP_Mask;
|L3.24|
000018 e5d02000 LDRB r2,[r0,#0]
00001c e3c22002 BIC r2,r2,#2
000020 e5c02000 STRB r2,[r0,#0]
;;;160 }
|L3.36|
000024 e12fff1e BX lr
ENDP
AREA ||i.I2C_AcknowledgeConfig||, COMGROUP=I2C_AcknowledgeConfig, CODE, READONLY, ALIGN=2
I2C_AcknowledgeConfig PROC
;;;170 {
;;;171 if (NewState == ENABLE) I2Cx->CR |= I2C_ACK_Mask;
000000 e3510001 CMP r1,#1
000004 1a000003 BNE |L4.24|
000008 e5d02000 LDRB r2,[r0,#0]
00000c e3822004 ORR r2,r2,#4
000010 e5c02000 STRB r2,[r0,#0]
000014 ea000002 B |L4.36|
;;;172 else I2Cx->CR &= ~I2C_ACK_Mask;
|L4.24|
000018 e5d02000 LDRB r2,[r0,#0]
00001c e3c22004 BIC r2,r2,#4
000020 e5c02000 STRB r2,[r0,#0]
;;;173 }
|L4.36|
000024 e12fff1e BX lr
ENDP
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