nbtxsfspreading.vhd

td-scdma仿真

    =->add.0 r6,8,r6 \ lsl.1 r4,4,r4 
    calc_start: 
       copy.0 codeNoAddr, AP \ get paramIn, r[3:2]
       and.0 [lsr r2, 8], 16#00ff#, r2 
       beq top  \ byteswap r2, r12
   =-> sbc r3, r11           
       sub.1 r11, 9, r11     \ sub.0 14, r11, r3       
       copy.1 1, r4          \ lsr.0 704, r3, r3   -- r3 data couter
       lsl.0 r4, r11, r11     \ or.1 r2, r12, r12 -- r11 step length of address counter
       and.0 r11, 31, r11                             -- r12 codeNo used
    storeCodeNo: 
       and.0 r2, 1, r15       
       beq judge            \  sub.1 r4, 1, r5   -- r5 codeNo
   =-> lsr.0 r2, 1, r2
       stw r5, (AP)         \  add.0 AP, 2, AP         -- store codeNo k used in this timeslot
       add.0 r13, 1, r13                      -- r13 number of used codeNo
    judge:
       sub.0 r4, 8, r15  
       bne storeCodeNo
   =-> add.0 r4, 1, r4

       copy.0 scrmCodeAddr, r2  \ ldw @scrmCodeAddr, scrmCode
       stw r13, @codeNumAddr
    dataPreparation:
       get symbolIn, r[5:4]     \ sub.0 r3, 1, r3   -- r5 second 8 channels is used
       copy.0 r5, r4   
    scaling:
       copy.1 0, r0                \  copy.0 chanCodeAddr, AP
       csprdb r4, scalor, r0, r4   \  ldw (AP), r0

    spread:
       csprdb r4, scrmCode, r0, r5 \  copy.1 codeNoAddr, r6
       and.0 r5, r12, r5           \  ldw (r6)0, r7                     
       add.0 r2, 2, r2             \  ldw @codeNumAddr, r13
       
    unpack:         
       lsr.0 r5, r7 ,r0                                   
       bitmul 1, 0, r0, r8         \  sub.1 r13, 1, r13
       bitmul 1, 8, r0, r9         
       put r[9:8], chipOut         \  sub.0 r13, 0, r15
       bne unpack                  \  add.0 r6, 2, r6     
   =-> ldw (r6)0, r7
       add.1 AP, r11, AP           \  sub.0 AP, chanCodeEndAddr, r15
       ldw (AP), r0                \  bne spread    \  and.0 r2, 16#001f#, r2  
   =-> ldw (r2)0, scrmCode            
       sub.0 r3, 0, r15
       bne dataPreparation  
       bra top


  ENDCODE;
end TxSfSpdSecondHalf;
------------------------------------------------------------------
-- TxSfSpdAccumlator
---------------------------------------------------------------------
-- Description:
--   This entity is used to accumlate all the code channels' chip  . 
-- InPort:
--   firstHalfIn: the first 8 channels' bit stream after being spreaded
--   secondHalfIn: the second 8 channels' bit stream after being spreaded
--   ParamIn:  SF    |   codeChan_ind
--   weighFactorIn:  weightFactor1 | weightFactor0;weightFactor3 | weightFactor2;.......
-- Outport:
--   accumOut: the final result after accumlating all the code channels
-- History:
--   2007-3-1 Zhang Liqiang created.
------------------------------------------------------------------------

entity TxSfSpdAccumlator is
  port(firstHalfIn: in complex16@8;
       secondHalfIn: in complex16@8;
       weighFactorIn : in integer16pair@8;
       paramIn: in integer16pair@32;
       accumOut: out complex16@32);
end TxSfSpdAccumlator;



architecture ASM of TxSfSpdAccumlator is
 
  begin STAN2
    initialize regs := (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
    initialize memory 0: array (0 to 3) of complex16:=((1,0), (0,1), (0,-1), (-1,0));
    CODE
    
     top:
        get paramIn, r[3:2]  \ copy.0 1, r4 
		stl r[3:2], @100	-- test
        sub.0 r2, 0, r15   \ copy.1 r4, r5
        beq top \ and.0 [lsr r2,8],16#00ff#,r10   
    =-> copy.0 r10, r11 \ copy.1 r2, r9 
     calCodeNo1:            -- calculate the channel number used in the first 8 channels
       and.0 r2, 1, r15       
       beq judge1          
   =-> lsr.0 r2, 1, r2
       add.0 r12, 1, r12                        
     judge1:
       sub.0 r4, 8, r15  
       bne calCodeNo1
   =-> add.0 r4, 1, r4 
   calCodeNo2:              -- calculate the channel number used in the second 8 channels
       and.0 r10, 1, r15       
       beq judge2          
   =-> lsr.0 r10, 1, r10
       add.0 r13, 1, r13                      
     judge2:
       sub.0 r5, 8, r15  
       bne calCodeNo2
   =-> add.0 r5, 1, r5 
       
       add.0 r12, r13, r14 
       add.0 r14, 1, r14  \ copy.1 16, r4
       lsr.0 r14, 1, r14  
     recWeightFactor:       -- receive the weight factor of the used channels
       get weighFactorIn,r[1:0] 
       stw r0,(r4)0 \ sub.0 r14,1,r14        
       bne recWeightFactor \ stw r1,(r4)1
   =-> add.0 r4,4,r4
 
       copy.0 704,r5                      
     beginAccumlate:
       mul r8, 0, acc1    \  copy.1 1, r9 
       mul r8, 0, acc0    
       copy.1 16,r10       
       
     selectBranch:
       sub.0 r12, 0, r15
       beq accumSecondHalf \ copy.0 r13,r11
       sub.0 r13, 0, r15
       beq accumFirstHalf  \ copy.0 r12,r11
       sub.0 r12, r13, r11
       bge accumBothHalf
   =-> copy.0 r13,r14 
       copy.0 r12,r14 \ sub.1 r13, r12, r11
     
     accumBothHalf:
       get firstHalfIn, r[1:0]  
       ldw (r10)0,r8
       add.0 [lsl r0, 2], 6, r0 \  lsl.1 r1, 1, r1     
       sub.0 r0, r1, r7 \ get secondHalfIn, r[3:2]    
       add.0 [lsl r2, 2], 6, r2 \  ldl (r7)0, r[1:0]                   
       lsl.1 r3, 1, r3            \  add.0 [lsl r12, 1], r10, r4  
       sub.0 r2, r3 ,r7   \ ldw (r4)0, r6  \ mac r1, r8, acc1
       ldl (r7)0, r[3:2]   \   mac r0, r8, acc0
       sub.0 r14, 1, r14   \ mac r3, r6, acc1 
       bne accumBothHalf   \ add.0 r10,2,r10
   =-> mac r2, r6, acc0   \ sub.0 r13, r12, r15     
       beq finalResult  \ sub.0 r13, r12, r15 \ copy.1 1, r9  
       bge accumSecondHalf
      
     accumFirstHalf:
       get firstHalfIn, r[1:0] 
       add.0 [lsl r0, 2], 6, r0         \  lsl.1 r1, 1, r1 
       sub.0 r0, r1, r7  \ ldw (r10)0,r2          -- calculate address of chip respect to input
       ldl (r7)0, r[1:0]       \ sub.0 r9, r11, r15
       mac r1, r2, acc1
       add.1 r9, 1, r9    \ bne accumFirstHalf
    =->mac r0, r2, acc0   \ add.0 r10,2,r10
       readacc acc0, frac, r6 \ sub.0 r5, 1, r5  
       readacc acc1, frac, r7 
       put r[7:6], accumOut \ bne beginAccumlate  
       bra top \ copy.0 0,r13
    =-> copy.0 0, r12
     accumSecondHalf:
       get secondHalfIn, r[1:0]   \ add.0 [lsl r12, 1], r10, r4
       add.0 [lsl r0, 2], 6, r0         \  lsl.1 r1, 1, r1
       sub.0 r0, r1, r7        \ ldw (r4)0,r2
       ldl (r7)0, r[1:0]       \ sub.0 r9, r11, r15
       mac r1, r2, acc1
       add.1 r9, 1, r9        \ bne accumSecondHalf
    =->mac r0, r2, acc0   \ add.0 r10,2,r10
     finalResult:
       readacc acc0, frac, r6 \ sub.0 r5, 1, r5  
       readacc acc1, frac, r7 
       put r[7:6], accumOut \ bne beginAccumlate  
       bra top \ copy.0 0,r13 
    =->copy.0 0, r12
       
      


    ENDCODE;
end TxSfSpdAccumlator;  
---------------------------------------------
--NbTxSfSpreading
--
---------------------------------------------



use work.all;

entity NbTxSfSpreading is
port(  DataIn:  in integer32@64;
       paramIn:        in integer16pair@32;
       scramIn:        in integer16pair@16; 
       weightFactorIn : in integer16pair@8;
       chipOut:        out complex16@32);
end NbTxSfSpreading;

architecture STRUCTURAL of NbTxSfSpreading is

 
  signal DataFirstHalfSg      : integer32@32;
  signal DataSecondHalfSg     : integer32@32;
  signal firstHalfChipSg      : complex16@8;
  signal secondHalfChipSg     : complex16@8;
 
  begin


 

    branSelect: entity TxSfSpdBranchSelector 
      port map(DataIn => DataIn,
               ParamIn => paramIn,
               DataFirstHalfOut => DataFirstHalfSg,
               DataSecondHalfOut => DataSecondHalfSg);

    first8: entity TxSfSpdFirstHalf
      port map(symbolIn =>DataFirstHalfSg,
               scramIn =>scramIn, --in integer16pair@16;
               paramIn => paramIn,
               chipOut => firstHalfChipSg);
			   
	Probe_spreadingFirstOut0		: entity ProbeUserDef
 		generic map(inputSlotRate	=> 8,
					inputPortType	=> complex16 )
		port map( DataIn		=> firstHalfChipSg );

    second8: entity TxSfSpdSecondHalf
      port map(symbolIn =>DataSecondHalfSg,
               scramIn => scramIn,-- in integer16pair@16;
               paramIn => paramIn,
               chipOut => secondHalfChipSg);
    
    
  
    accum: entity TxSfSpdAccumlator
      port map(firstHalfIn => firstHalfChipSg,--in complex16@8;
               secondHalfIn => secondHalfChipSg,--in complex16@8;
               paramIn => paramIn,     --in integer16pair@32;
               weighFactorIn => weightFactorIn,--in integer16pair@8;
               accumOut => chipOut);   --out complex16@64
       
    


end NbTxSfSpreading;