nbtxsfspreading.vhd

td-scdma仿真

------------------------------------------------------------------
-- TxSfSpdBranchSelector
---------------------------------------------------------------------
-- Description:
--   This entity is used for selecting spread branch. One for first
--   8 code channels, and the other for second 8 channels.
-- InPort:
--   DataIn: bit stream to be modulated and spread
--   ParamIn:  SF    |   codeChan_ind
--   DataFirstHalfOut:  To first 8 channel branch
--   DataSecondHalfOut: to second 8 channel brach
-- History:
--   2007-3-1 Zhang Liqiang created.
------------------------------------------------------------------------

entity TxSfSpdBranchSelector is
  generic(paramSlotRate: integer := 32;
          dataInSlotRate: integer:= 64;
          dataOutSlotRate: integer := 32);
  port(ParamIn: in integer16pair@paramSlotRate;
       DataIn:  in integer32@dataInSlotRate;
       DataFirstHalfOut: out integer32@dataOutSlotRate;
       DataSecondHalfOut: out integer32@dataOutSlotRate);
end TxSfSpdBranchSelector;

architecture ASM of TxSfSpdBranchSelector is
  begin STAN2
    initialize regs:= (others=>0);
    register SF is r1;
    register codeChanInd is r0;
    code
      top:
        get ParamIn, [SF:codeChanInd]
        sub.0 codeChanInd, 0, r15 
        beq top \ and.0 [lsr codeChanInd,8],16#00ff#,r10
    =-> sub.0 r10, 16#0001#, r15
        bge   FirstJudge  \ copy.0 44,r11           -- the high 8 bit of codeChanInd bigger than or equal to 16#0001#
    =-> and.0 codeChanInd, 16#00ff#, r14
       
      FirstHalfBranch:
        get DataIn, r[3:2]      \   sub.0 r11, 1, r11
        put r[3:2], DataFirstHalfOut  \ bne FirstHalfBranch
        bra top
        
      FirstJudge:
        sub.0 r14, 1, r15
        bge   BothBranch
        
      SecondHalfBranch:
        get DataIn, r[3:2]      \   sub.0 r11, 1, r11
        put r[3:2], DataSecondHalfOut  \ bne SecondHalfBranch
        bra top
      
      BothBranch:
        get DataIn, r[3:2]      \   sub.0 r11, 1, r11
        put r[3:2], DataFirstHalfOut  \ bne BothBranch
     =->put r[3:2], DataSecondHalfOut  
        bra top 
    endcode;
end TxSfSpdBranchSelector;

------------------------------------------------------------------
-- TxSfSpdFirstHalf
---------------------------------------------------------------------
-- Description:
--   This entity is used to spread the first 8 code channels . 
-- InPort:
--   DataIn: bit stream after being modulated and to be spreaded
--   ParamIn:  SF    |   codeChan_ind
--   scramIn:  fedcba98 | 76543210 --basic scram code
-- Outport:
--   chipOut: to the accumlator block
-- History:
--   2007-3-1 Zhang Liqiang created.
------------------------------------------------------------------------
entity TxSfSpdFirstHalf is
  port (symbolIn : in integer32@32;
        paramIn : in integer16pair@32;
        scramIn : in integer16pair@16;
        chipOut : out complex16@8);
end TxSfSpdFirstHalf;

architecture ASM of TxSfSpdFirstHalf is
   constant scrmCodeAddr : integer :=0;
   constant chanCodeAddr : integer :=34;
   constant chanCodeEndAddr : integer :=96;
   constant scalorAddr : integer :=66;
   constant codeNoAddr : integer :=76;
   constant codeNumAddr : integer :=92;
begin STAN2
   initialize regs := (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
   initialize memory scrmCodeAddr: array (0 to 15) of integer16 := (16#ffff#, 16#00ff#, 
                   16#0000#, 16#00ff#, 16#ffff#, 16#00ff#, 16#0000#, 16#00ff#, 16#0000#,
                   16#ff00#, 16#ffff#, 16#ff00#, 16#ffff#, 16#00ff#, 16#0000#, 16#00ff#);
                     
   initialize memory scalorAddr: array (0 to 4) of integer16 := (16#0100#, 16#0100#,
                                16#0309#, 16#d178#, 16#8e63#);
   initialize memory chanCodeAddr: array (0 to 15) of integer16 := (16#0000#, 16#0000#,
                     16#f0f0#, 16#f0f0#, 16#cccc#, 16#cccc#, 16#3c3c#, 16#3c3c#, 16#aaaa#,
                     16#aaaa#, 16#5a5a#, 16#5a5a#, 16#6666#, 16#6666#, 16#9696#, 16#9696#);

   register scrmCode is r10;
   register chanCode is r0;
   register scalor   is r1;

   CODE
    paramPreparation:
       tstport  scramIn
       beq  calc_start
       copy.0 scrmCodeAddr,r6\ copy.1 16#ffff#,r9 
       get scramIn, r[5:4] \ copy.0 0, r11
    scramPreparation:
       and.0 [lsr r4,15],16#0001#,r5 \ add.1 r11,1,r11         --store the scrambcode to the memory of @scrmCodeAddr
       mul r5,16#ffff#,acc0 
       readacc acc0,frac,r5 \ and.0 [lsr r4,14],16#0001#,r7
       xor.0 r5,16#ffff#,r5 \ mul r7,16#ffff#,acc0 
       stw r5, (r6)0 \ readacc acc0,frac,r7 
       and.0 [lsr r4,12],16#0001#,r5  
       xor.0 r7,16#ff00#,r7 
       mul r5,16#ffff#,acc0 \ stw r7, (r6)1 
       readacc acc0,frac,r5 \ and.0 [lsr r4,13],16#0001#,r7 
       xor.0 r5,16#00ff#,r5 
       mul r7,16#ffff#,acc0       
       stw r5, (r6)3 \ sub.0 r11,4,r15 \ readacc acc0,frac,r7
       bne scramPreparation \ stw r7,(r6)2
    =->add.0 r6,8,r6 \ lsl.1 r4,4,r4
                         
    calc_start:
       copy.0 codeNoAddr, AP \ get paramIn, r[3:2]
       and.0 r2, 16#00ff#, r2 \ sub.1 r3, 1, r8    -- r2 codeNo used in first 8 channels
       beq paramPreparation  \ byteswap r2, r12 
   =-> sbc r3, r11                   
       sub.1 r11, 9, r11     \ sub.0 14, r11, r3                              
       add.0 [lsl r3, 1], scalorAddr, r4 
       lsl.0 r8, r11, r8
       ldw (r4)0, scalor     \   add.0 r8, chanCodeAddr, r8
       stw r8, @chanCodeEndAddr
       copy.1 1, r4          \ lsr.0 704, r3, r3   -- r3 data couter
       lsl.0 r4, r11, r11     \ or.1 r2, r12, r12 -- r11 step length of address counter
       and.0 r11, 31, r11                             -- r12 codeNo used for I/Q
    storeCodeNo: 
       and.0 r2, 1, r15       
       beq judge            \  sub.1 r4, 1, r5   -- r5 codeNo
   =-> lsr.0 r2, 1, r2
       stw r5, (AP)         \  add.0 AP, 2, AP         -- store codeNo k used in this timeslot
       add.0 r13, 1, r13                      -- r13 number of used codeNo
    judge:
       sub.0 r4, 8, r15  
       bne storeCodeNo
   =-> add.0 r4, 1, r4

       copy.0 scrmCodeAddr, r2  \ ldw @scrmCodeAddr, scrmCode
       stw r13, @codeNumAddr 
    dataPreparation:
       get symbolIn, r[5:4]                     -- r4 is used as first 8 channels
       sub.0 r3, 1, r3               -- symbol input counter

    scaling:
       copy.1 0, r0                \  copy.0 chanCodeAddr, AP
       csprdb r4, scalor, r0, r4   \  ldw (AP), r0

    spread:
       csprdb r4, scrmCode, r0, r5 \  copy.1 codeNoAddr, r6
       and.0 r5, r12, r5           \  ldw (r6)0, r7      -- r7 codeNo                 
       add.0 r2, 2, r2             \  ldw @codeNumAddr, r13   -- r5 valid chip
       
    unpack:         -- unpack the combined format
       lsr.0 r5, r7 ,r0                                   
       bitmul 1, 0, r0, r8         \  sub.1 r13, 1, r13  
       bitmul 1, 8, r0, r9         
       put r[9:8], chipOut         \  sub.0 r13, 0, r15
       bne unpack                  \  add.0 r6, 2, r6     
   =-> ldw (r6)0, r7
       ldw @chanCodeEndAddr, r9
       add.1 AP, r11, AP           \  sub.0 AP, r9, r15 -- find next chancode
       ldw (AP), r0                \  bne spread \  and.0 r2, 16#001f#, r2   
   =-> ldw (r2)0, scrmCode      -- find next scrmcode using addr loop
       sub.0 r3, 0, r15
       bne dataPreparation  
       bra paramPreparation


  ENDCODE;
end TxSfSpdFirstHalf; 
------------------------------------------------------------------
-- TxSfSpdSecondHalf
---------------------------------------------------------------------
-- Description:
--   This entity is used to spread the second 8 code channels . 
-- InPort:
--   DataIn: bit stream after being modulated and to be spreaded
--   ParamIn:  SF    |   codeChan_ind
--   scramIn:  fedcba98 | 76543210 --basic scram code
-- Outport:
--   chipOut: to the accumlator block
-- History:
--   2007-3-1 Zhang Liqiang created.
------------------------------------------------------------------------
entity TxSfSpdSecondHalf is
  port (symbolIn : in integer32@32;
        paramIn : in integer16pair@32;
        scramIn : in integer16pair@16;
        chipOut : out complex16@8);
end TxSfSpdSecondHalf;

architecture ASM of TxSfSpdSecondHalf is
   constant scrmCodeAddr : integer :=0;
   constant chanCodeAddr : integer :=34;
   constant chanCodeEndAddr : integer :=64;
   constant scalorAddr : integer :=66;
   constant codeNoAddr : integer :=68;
   constant codeNumAddr : integer :=84;
begin STAN2
   initialize regs := (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
   initialize memory scrmCodeAddr: array (0 to 15) of integer16 := (16#ffff#, 16#00ff#, 
                   16#0000#, 16#00ff#, 16#ffff#, 16#00ff#, 16#0000#, 16#00ff#, 16#0000#,
                   16#ff00#, 16#ffff#, 16#ff00#, 16#ffff#, 16#00ff#, 16#0000#, 16#00ff#);
                     
   initialize memory scalorAddr: integer16 := (16#35b1#);
   initialize memory chanCodeAddr: array (0 to 15) of integer16 := (16#0000#, 16#ffff#,
                     16#f0f0#, 16#0f0f#, 16#cccc#, 16#3333#, 16#3c3c#, 16#c3c3#, 16#aaaa#,
                     16#5555#, 16#5a5a#, 16#a5a5#, 16#6666#, 16#9999#, 16#9696#, 16#6969#);

   register scrmCode is r10;
   register chanCode is r0;
   register scalor   is r1;
  

   CODE
    top:
        
       ldw @scalorAddr, scalor
       tstport  scramIn
       beq  calc_start  
                
    paramPreparation:
       copy.0 scrmCodeAddr,r6 \ copy.1 16#ffff#,r9
       get scramIn, r[5:4]  \ copy.0 0, r11
    scramPreparation:
       and.0 [lsr r4,15],16#0001#,r5 \ add.1 r11,1,r11         --store the scrambcode to the memory of @scrmCodeAddr
       mul r5,16#ffff#,acc0 
       readacc acc0,frac,r5 \ and.0 [lsr r4,14],16#0001#,r7
       xor.0 r5,16#ffff#,r5 \ mul r7,16#ffff#,acc0 
       stw r5, (r6)0 \ readacc acc0,frac,r7 
       and.0 [lsr r4,12],16#0001#,r5  
       xor.0 r7,16#ff00#,r7 
       mul r5,16#ffff#,acc0 \ stw r7, (r6)1 
       readacc acc0,frac,r5 \ and.0 [lsr r4,13],16#0001#,r7 
       xor.0 r5,16#00ff#,r5 
       mul r7,16#ffff#,acc0       
       stw r5, (r6)3 \ sub.0 r11,4,r15 \ readacc acc0,frac,r7
       bne scramPreparation \ stw r7,(r6)2