phantomeppist.c

用Ardence RTX SDK开发的EPP并口驱动程序.

//////////////////////////////////////////////////////////////////
//
// PhantomEPPIST.c - C file
//
// This file was generated using the RTX Device Driver Wizard. 
//   
//////////////////////////////////////////////////////////////////

#include "PhantomEPPSrl.h"                         
#include "PhantomEPPSrlAPI.h"

//
// Global variables
//
extern UCB ucb;


//	
// DriverISR:	Interrupt Service Routine (ISR)
//				
// NOTES:  
//	- This routine is optional, it is only truly necessary if the attached 
//	  interrupt is being Shared.  
//	- Equal or lesser interrupts are disabled upon entering the ISR
//	- It is recommended that the ISR complete its work quickly; 1-2 ms.
//  - If the ISR can handle the interrupt without the IST it can return Dismiss.
//
INTERRUPT_DISPOSITION 
RTFCNDCL 
DeviceISR (
		   PVOID pContext
		   )
{
	BOOLEAN bIstHandling = TRUE;

	//
	// TO DO:	
	//	Complete anything the ISR must do, along with determining if  
	//	the IST is needed to handle the interrupt (set 'bIstHandling' 
	//	to reflect if the IST should be called).  This routine should    
	//	restrict itself to Port I/O or mapped data transfer API calls. 
	//

	//
	//Check if the IST must be run to handle the interrupt.
	//
	if( bIstHandling )
		return CallInterruptThread;

	//No further action is required (ISR handled everything)
	return Dismiss;

}


//	
// DriverIST: Interrupt Service Thread (IST) 
//
// NOTES:  
//	- Do not change the Thread's priority while in the IST.
//	- Interrupts of equal or lesser priority are disabled 
//	  until you return from the IST.
//	- There is no need to clear the Interrupt or call EOI.
//
BOOLEAN 
RTAPI
DeviceIST ( 
		   PVOID pContext
		   )
{
	BYTE  tempRegister;
      
	//
	// Validate the interrupt by first checking if 
	// one is pending.  If one is found then handle it
	// in the appropriate case statement
	//
	tempRegister = RtReadPortUchar ( ucb.baseAddress + UART_DATA_REG );
	//if (  tempRegister & IIR_NO_INT_PENDING )
	{
		//
		// unsolicited interrupt - record it
		// and dismiss it
		//
		ucb.lastError = ERROR_PORT_UNSOLICITED_INTERRUPT;
		ucb.errorCount++;
		return FALSE;
	}

	//
	// Look for more than one pending interrupt
	//
	do
	{
		switch ( tempRegister & 0x0e  )
		{	/*
			case IIR_MODEM_STATUS:
				break;
         
			case IIR_XMIT_HOLDING_EMPTY:
				SendNextFIFO ( );
				break;
			case IIR_RECEIVE_DATA_TIMEOUT:
				//fall thru
			case IIR_RECEIVED_DATA_READY:
				EmptyFIFO ( ucb );
				break;
			case IIR_RECEIVER_LINE_STATUS:                     
				break;
			default:
				ucb.lastError = ERROR_PORT_UNSUPPORTED_INTERRUPT;
				ucb.errorCount++;
				break;
			*/
		}  
		//
		// Refetch the IIR and service while any pending interrupt
		//
		tempRegister = RtReadPortUchar ( ucb.baseAddress + UART_DATA_REG );
	} while ( !( tempRegister & IIR_NO_INT_PENDING ) );

	return TRUE;                               
}
 
 
//
// SendNextFIFO:  Called by the Transmit Buffer Empty
//	Interrupt, this function checks the Ring Buffer for
//  more data to send and sets up the transmission.
//
VOID 
SendNextFIFO ( )
{
	WORD        idx;
	BYTE        aChar;
	RINGBUFFER  *rb;
	WORD        count;
   
	//
	// Check the ring buffer for information
	//
	rb = ucb.outBuffer;

	if ( rb->count == 0 )
	{
		ucb.transmitISTActive = FALSE;
		return;
	}
   
	//
	// Have some data to send setup a transmission
	//
	count = rb->count;
   
	ucb.transmitISTActive = TRUE;

	for ( idx = 0; idx < ucb.fifoSize; idx++ )
	{
		//
		// The ring buffer is a critical section
		// block interrupts while accessing it.
		//
		DISABLE_INTERRUPTS;

		aChar = rb->buffer[rb->nextSlotOut];
		rb->buffer[rb->nextSlotOut++]=0x2A;
        rb->count--;
        if ( rb->nextSlotOut == RING_BUFFER_SIZE  )
        {
			rb->nextSlotOut = 0;
        }

        ENABLE_INTERRUPTS;
      
		RtWritePortUchar( ucb.baseAddress + UART_DATA_REG, aChar );
		if ( !rb->count )
		{
		   break;
		}
	}
    
	if( !rb->count )
    {
		ucb.transmitISTActive = FALSE;
    }
	
	return;
}


//
// EmptyFIFO:  This function is called as a result of a 
//	receive buffer full interrupt. It transfers the FIFO contents 
//	into the ring buffer, updating the appropriate pointers.
//
VOID 
EmptyFIFO ( )
{
	BYTE        aChar;
	BYTE        controlChar;
	RINGBUFFER  *rb;
   
	rb = ucb.inBuffer;   
    
	do
	{
		aChar = RtReadPortUchar( ucb.baseAddress + UART_DATA_REG );
		
		controlChar = RtReadPortUchar( ucb.baseAddress + UART_CTRL_REG );
		
		//
		// The ring buffer is a critical section
		// block interrupts while accessing it
		//
		DISABLE_INTERRUPTS;

		rb->buffer[rb->nextSlotIn++] = aChar;
		rb->count++;
		if ( rb->count > RING_BUFFER_SIZE )
		{
			ucb.lastError = ERROR_RECEIVE_BUFFER_OVERFLOW;
			ucb.errorCount++;
		}
      
		if ( rb->nextSlotIn == RING_BUFFER_SIZE )
		{
		   rb->nextSlotIn = 0;
		}

        ENABLE_INTERRUPTS;

	}while ( controlChar & LSR_DATA_READY );
   
	return;
}