📄 cc1100.lst.svn-base
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C51 COMPILER V8.02 CC1100 10/24/2007 17:21:20 PAGE 1
C51 COMPILER V8.02, COMPILATION OF MODULE CC1100
OBJECT MODULE PLACED IN CC1100.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE CC1100.c BROWSE DEBUG OBJECTEXTEND
line level source
1 #include <reg52.h>
2 #include <intrins.h>
3 #include "CC1100.h"
4
5
6 #define WRITE_BURST 0x40 //连续写入
7 #define READ_SINGLE 0x80 //读
8 #define READ_BURST 0xC0 //连续读
9 #define BYTES_IN_RXFIFO 0x7F //接收缓冲区的有效字节数
10 #define CRC_OK 0x80 //CRC校验通过位标志
11
12 /****************************************************************************************
13 //全局变量定义
14 /****************************************************************************************/
15 /*
16 //10k E
17 RF_SETTINGS code rfSettings = {
18 0x00,
19 0x06, // FSCTRL1 Frequency synthesizer control.
20 0x00, // FSCTRL0 Frequency synthesizer control.
21 0x10, // FREQ2 Frequency control word, high byte.
22 0xA7, // FREQ1 Frequency control word, middle byte.
23 0x62, // FREQ0 Frequency control word, low byte.
24 0xC8, // MDMCFG4 Modem configuration.
25 0x93, // MDMCFG3 Modem configuration.
26 0x03, // MDMCFG2 Modem configuration.
27 0x22, // MDMCFG1 Modem configuration.
28 0xF8, // MDMCFG0 Modem configuration.
29 0x00, // CHANNR Channel number.
30 0x34, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
31 0x56, // FREND1 Front end RX configuration.
32 0x10, // FREND0 Front end RX configuration.
33 0x18, // MCSM0 Main Radio Control State Machine configuration.
34 0x16, // FOCCFG Frequency Offset Compensation Configuration.
35 0x6C, // BSCFG Bit synchronization Configuration.
36 0x43, // AGCCTRL2 AGC control.
37 0x40, // AGCCTRL1 AGC control.
38 0x91, // AGCCTRL0 AGC control.
39 0xA9, // FSCAL3 Frequency synthesizer calibration.
40 0x2A, // FSCAL2 Frequency synthesizer calibration.
41 0x00, // FSCAL1 Frequency synthesizer calibration.
42 0x11, // FSCAL0 Frequency synthesizer calibration.
43 0x59, // FSTEST Frequency synthesizer calibration.
44 0x81, // TEST2 Various test settings.
45 0x35, // TEST1 Various test settings.
46 0x09, // TEST0 Various test settings.
47 0x0B, // IOCFG2 GDO2 output pin configuration.
48 0x06, // IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed p
-seudo register explanation.
49 0x04, // PKTCTRL1 Packet automation control.
50 0x05, // PKTCTRL0 Packet automation control.
51 0x00, // ADDR Device address.
52 0xFF // PKTLEN Packet length.
53 };
54 */
C51 COMPILER V8.02 CC1100 10/24/2007 17:21:20 PAGE 2
55 /*
56 // 250k E
57 const RF_SETTINGS rfSettings = {
58 0x00,
59 0x0B, // FSCTRL1 Frequency synthesizer control.
60 0x00, // FSCTRL0 Frequency synthesizer control.
61 0x10, // FREQ2 Frequency control word, high byte.
62 0xA7, // FREQ1 Frequency control word, middle byte.
63 0x62, // FREQ0 Frequency control word, low byte.
64 0x2D, // MDMCFG4 Modem configuration.
65 0x3B, // MDMCFG3 Modem configuration.
66 0x73, // MDMCFG2 Modem configuration.
67 0x22, // MDMCFG1 Modem configuration.
68 0xF8, // MDMCFG0 Modem configuration.
69
70 0x00, // CHANNR Channel number.
71 0x00, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
72 0xB6, // FREND1 Front end RX configuration.
73 0x10, // FREND0 Front end RX configuration.
74 0x18, // MCSM0 Main Radio Control State Machine configuration.
75 0x1D, // FOCCFG Frequency Offset Compensation Configuration.
76 0x1C, // BSCFG Bit synchronization Configuration.
77 0xC7, // AGCCTRL2 AGC control.
78 0x00, // AGCCTRL1 AGC control.
79 0xB2, // AGCCTRL0 AGC control.
80
81 0xEA, // FSCAL3 Frequency synthesizer calibration.
82 0x0A, // FSCAL2 Frequency synthesizer calibration.
83 0x00, // FSCAL1 Frequency synthesizer calibration.
84 0x11, // FSCAL0 Frequency synthesizer calibration.
85 0x59, // FSTEST Frequency synthesizer calibration.
86 0x88, // TEST2 Various test settings.
87 0x31, // TEST1 Various test settings.
88 0x0B, // TEST0 Various test settings.
89 0x0B, // IOCFG2 GDO2 output pin configuration.
90 0x06, // IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed p
-seudo register explanation.
91
92 0x04, // PKTCTRL1 Packet automation control.
93 0x05, // PKTCTRL0 Packet automation control.
94 0x00, // ADDR Device address.
95 0x0c // PKTLEN Packet length.
96 };
97 */
98
99 /*
100 // 38.4k E
101 const RF_SETTINGS rfSettings = {
102 0x00,
103 0x06, // FSCTRL1 Frequency synthesizer control.
104 0x00, // FSCTRL0 Frequency synthesizer control.
105 0x10, // FREQ2 Frequency control word, high byte.
106 0xA7, // FREQ1 Frequency control word, middle byte.
107 0x62, // FREQ0 Frequency control word, low byte.
108 0xCA, // MDMCFG4 Modem configuration.
109 0x83, // MDMCFG3 Modem configuration.
110 0x83, // MDMCFG2 Modem configuration.
111 0x22, // MDMCFG1 Modem configuration.
112 0xF8, // MDMCFG0 Modem configuration.
113
114 0x00, // CHANNR Channel number.
115 0x34, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
C51 COMPILER V8.02 CC1100 10/24/2007 17:21:20 PAGE 3
116 0x56, // FREND1 Front end RX configuration.
117 0x10, // FREND0 Front end RX configuration.
118 0x18, // MCSM0 Main Radio Control State Machine configuration.
119 0x16, // FOCCFG Frequency Offset Compensation Configuration.
120 0x6C, // BSCFG Bit synchronization Configuration.
121 0x43, // AGCCTRL2 AGC control.
122 0x40, // AGCCTRL1 AGC control.
123 0x91, // AGCCTRL0 AGC control.
124
125 0xA9, // FSCAL3 Frequency synthesizer calibration.
126 0x2A, // FSCAL2 Frequency synthesizer calibration.
127 0x00, // FSCAL1 Frequency synthesizer calibration.
128 0x11, // FSCAL0 Frequency synthesizer calibration.
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