engine.cmd

TMS320F2812的bootloader源程序

MEMORY
{                                                            
PAGE 0 :                                                     
	
	/*L1 RAM  4K*16 */
	PRAML1(RW)	:origin = 0x009000,		length = 0x001000   
	
	/*8k*16 H0 ram */   
	PRAMH0 (RW)  	  	: origin = 0x3F8000, 	length = 0x002000
/*    RAML0(RWI) 			: origin = 0x008000, length = 0x000E00*/
     /* user code start address */
   CODESTART  		: origin = 0x3F7FF6,	length = 0x000002 
   
   /*use 128k flash seg G and F total=32k*16 store user program */
   FLASHPROG		: origin = 0x3E0000,	length = 0x008000
   /*prograsm branch table set it in L0 ram high end use 1k*16*/
   PROGRAMBRANCH(RW): origin =  0x008E00,	length = 0x000200
         
PAGE 1 : 

   RAMM0(RIW)    		: origin = 0x000000, length = 0x000400 
   RAMM1(RIW)    		: origin = 0x000400, length = 0x000400  
   /* use 3k*16 in data space */
 RAML0(RWI) 			: origin = 0x008000, length = 0x000E00   
 
   /* USE 128K FLASH  SEG J SAVE SOME SYSTEM DATA*/
   FLASHDATA(RW)		: origin = 0x3D8000, length = 0x002000   
   /* the external large data ram */
   EXTDATARAM(RWI)		: origin = 0x0100000, length = 0x030000 
   
   DATA_BUFF(RWI)             : origin = 0x0130000,length = 0xF800
   VECTOR_BUFF(RWI)           : origin = 0x013F800,length = 0x400
   STR(RWI)                   : origin = 0x013FC00,length = 0x200
 
   
   /* Peripheral Frame 0:   */
   DEV_EMU    : origin = 0x000880, length = 0x000180 
   FLASH_REGS : origin = 0x000A80, length = 0x000060 
   CSM        : origin = 0x000AE0, length = 0x000010 
   XINTF      : origin = 0x000B20, length = 0x000020
   CPU_TIMER0 : origin = 0x000C00, length = 0x000008
   CPU_TIMER1 : origin = 0x000C08, length = 0x000008
   CPU_TIMER2 : origin = 0x000C10, length = 0x000008
   PIE_CTRL   : origin = 0x000CE0, length = 0x000020
   PIE_VECT   : origin = 0x000D00, length = 0x000100

   /* Peripheral Frame 1:   */
   ECAN_A     : origin = 0x006000, length = 0x000100
   ECAN_AMBOX : origin = 0x006100, length = 0x000100

   /* Peripheral Frame 2:   */
   SYSTEM     : origin = 0x007010, length = 0x000020
   SPI_A      : origin = 0x007040, length = 0x000010
   SCI_A      : origin = 0x007050, length = 0x000010
   XINTRUPT   : origin = 0x007070, length = 0x000010
   GPIOMUX    : origin = 0x0070C0, length = 0x000020
   GPIODAT    : origin = 0x0070E0, length = 0x000020
   ADC        : origin = 0x007100, length = 0x000020
   EV_A       : origin = 0x007400, length = 0x000040
   EV_B       : origin = 0x007500, length = 0x000040
   SPI_B      : origin = 0x007740, length = 0x000010
   SCI_B      : origin = 0x007750, length = 0x000010
   MCBSP_A    : origin = 0x007800, length = 0x000040

   /* CSM Password Locations */
   CSM_PWL    : origin = 0x3F7FF8, length = 0x000008    
   
   /****************************************************************/
   /*USB interface registers use to check usb68013a's fifo status */
   	USBSTATUS		:	origin = 0x004004, length = 0x00004
	USBFIFO			: 	origin = 0x004008, length = 0x00004 
	PKTENDCONTROL	:	origin = 0x004000, length = 0x00004  
   /****************************************************************/
   /****************************************************************/ 
   /*Signal input channel control */
   CH1CONTROL:	origin = 0x004010, length = 0x00001
   CH2CONTROL:	origin = 0x004014, length = 0x00001   
   /******************************************* *********************/
   /****************************************************************/
   /*short cylinder control:*/   
   SHORTCONTROL:  origin = 0x004024, length = 0x00001
	/****************************************************************/
   /****************************************************************/  
   /*extern signal first cylinder's signal and second leve fire signal*/
   SIGNALSTATUS:	origin = 0x4018, length = 0x00001
	/****************************************************************/
   /****************************************************************/ 
   /*extern ram avalid enable*/    	
   EXRAMENABLE:		origin = 0x400c, length = 0x00001
     	   
}
 
 
SECTIONS
{
	/*Allocate program areas */
	CodeStart   : > CODESTART,   		PAGE = 0
	.text       : > FLASHPROG,   		PAGE = 0
	.cinit      : > FLASHPROG, 		  	PAGE = 0   
	
 	ramfuncs    :  LOAD = FLASHPROG,		PAGE = 0
 				   RUN = PRAML1,			PAGE = 0
 				   RUN_START(_DSP28x_usDelay_runstart),
 				   LOAD_START(_DSP28x_usDelay_loadstart),
 				   LOAD_END(_DSP28x_usDelay_loadEnd)
 	
 /*	TestBranch	: > PROGRAMBRANCH,	PAGE = 0*/
 	
 	/*Ext///////////	///////////////*/
 	InitProgram	:   LOAD =FLASHPROG,	PAGE = 0     
 					RUN  =  PRAML1,		PAGE = 0    
					RUN_START(_InitProgram_runstart),
 				  	LOAD_START(_InitProgram_loadstart),
 				   	LOAD_END(_InitProgram_loadEnd) 	
	/*run the download program*/
     RunDownLoadedProgram   : > FLASHPROG,	PAGE = 0  
    
     
/**************************************************************/
 
    /* Allocate data areas: */
   .stack           : > RAMM1,      PAGE = 1 
   .bss             : > RAML0,      PAGE = 1
   .ebss            : > RAML0,      PAGE = 1
   .const           : > RAML0,      PAGE = 1
   .econst          : > RAML0,      PAGE = 1      
   .sysmem          : > RAMM0,      PAGE = 1

   .reset           : > FLASHPROG,      PAGE = 0, TYPE = DSECT
   
   /* Allocate Peripheral Frame 0 Register Structures:   */
   DevEmuRegsFile    : > DEV_EMU,    PAGE = 1
   FlashRegsFile     : > FLASH_REGS, PAGE = 1
   CsmRegsFile       : > CSM,        PAGE = 1
   XintfRegsFile     : > XINTF,      PAGE = 1
   CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1  
   CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1      
   CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
  
      
   PieCtrlRegsFile   : > PIE_CTRL,   PAGE = 1      
   PieVectTableFile  : > PIE_VECT,   PAGE = 1

   /* Allocate Peripheral Frame 2 Register Structures:   */
   ECanaRegsFile     : > ECAN_A,      PAGE = 1   
   ECanaMboxesFile   : > ECAN_AMBOX   PAGE = 1

   /* Allocate Peripheral Frame 1 Register Structures:   */
   SysCtrlRegsFile   : > SYSTEM,     PAGE = 1
   SpiaRegsFile      : > SPI_A,      PAGE = 1
   SciaRegsFile      : > SCI_A,      PAGE = 1
   XIntruptRegsFile  : > XINTRUPT,   PAGE = 1
   GpioMuxRegsFile   : > GPIOMUX,    PAGE = 1
   GpioDataRegsFile  : > GPIODAT     PAGE = 1
   AdcRegsFile       : > ADC,        PAGE = 1
   EvaRegsFile       : > EV_A,       PAGE = 1
   EvbRegsFile       : > EV_B,       PAGE = 1
   ScibRegsFile      : > SCI_B,      PAGE = 1
   McbspaRegsFile    : > MCBSP_A,    PAGE = 1

   /* CSM Password Locations */
   CsmPwlFile      	: > CSM_PWL,     PAGE = 1      
   
   /*****************************************************/
    /*USB FIFO */
   FIFORegsFile			: > USBFIFO,		PAGE = 1
   FIFOStatusRegsFile	: > USBSTATUS,		PAGE = 1
   FIFOPKTENDRegsFile	: > PKTENDCONTROL,	PAGE = 1 
   /*****************************************************/
   /*****************************************************/
   /*short cylinder control*/
   ShortCylCtrlRegFile	: > SHORTCONTROL,	PAGE = 1
   /*****************************************************/ 
   /*tested signed input Channel select and control*/ 
   Ch1CtrlRegsFile		: > CH1CONTROL,		PAGE = 1
   Ch2CtrlRegsFile		: > CH2CONTROL,		PAGE = 1
  /*****************************************************/ 
  /*extern signal status*/
  ExtSignalStatusRegsFile	: > SIGNALSTATUS,	PAGE=1
  /*****************************************************/    
  /*extern ram enable */
  ExtRamEnableRegsFile		: > EXRAMENABLE,	PAGE=1   
  
  ExtDataSeg				: > EXTDATARAM,	PAGE=1   
  Data_Bufffile             : > DATA_BUFF, PAGE = 1
  VECTOR_Bufffile           : > VECTOR_BUFF, PAGE = 1
  STR_File                  : > STR  , PAGE = 1    
       
 
 
}