📄 topmiaobiao.map.qmsg
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{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:result_node miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" { } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 186 5 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/altera/quartus60/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus60/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" { } { { "altshift.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/altshift.tdf" 28 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|altshift:result_ext_latency_ffs miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" { } { { "lpm_add_sub.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|altshift:carry_ext_latency_ffs miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" { } { { "lpm_add_sub.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\"" { } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\"" { } { { "lpm_add_sub.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 7 " "Info: Parameter \"LPM_WIDTH\" = \"7\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:oflow_node miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 7 " "Info: Parameter \"LPM_WIDTH\" = \"7\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:result_node miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 199 5 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 7 " "Info: Parameter \"LPM_WIDTH\" = \"7\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\] miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\]\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 200 10 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 7 " "Info: Parameter \"LPM_WIDTH\" = \"7\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add2\|altshift:result_ext_latency_ffs miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\"" { } { { "lpm_add_sub.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add2 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 7 " "Info: Parameter \"LPM_WIDTH\" = \"7\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 34 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "IOPT_MLS_IGNORED_SUMMARY" "109 " "Info: Ignored 109 buffer(s)" { { "Info" "IOPT_MLS_IGNORED_CARRY_SUM" "96 " "Info: Ignored 96 CARRY_SUM buffer(s)" { } { } 0 0 "Ignored %1!d! CARRY_SUM buffer(s)" 0 0} { "Info" "IOPT_MLS_IGNORED_SOFT" "13 " "Info: Ignored 13 SOFT buffer(s)" { } { } 0 0 "Ignored %1!d! SOFT buffer(s)" 0 0} } { } 0 0 "Ignored %1!d! buffer(s)" 0 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "CLK " "Info: Promoted clock signal driven by pin \"CLK\" to global clock signal" { } { } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0} } { } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "168 " "Info: Implemented 168 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "3 " "Info: Implemented 3 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "42 " "Info: Implemented 42 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_MCELLS" "115 " "Info: Implemented 115 macrocells" { } { } 0 0 "Implemented %1!d! macrocells" 0 0} { "Info" "ISCL_SCL_TM_SEXPS" "8 " "Info: Implemented 8 shareable expanders" { } { } 0 0 "Implemented %1!d! shareable expanders" 0 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Apr 17 20:26:29 2008 " "Info: Processing ended: Thu Apr 17 20:26:29 2008" { } { } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:30 " "Info: Elapsed time: 00:00:30" { } { } 0 0 "Elapsed time: %1!s!" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
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