topmiaobiao.map.qmsg

实现秒表的功能。能精确到0.01位。最多能计时1个小时。

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_1le.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/alt_u_div_1le.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_1le " "Info: Found entity 1: alt_u_div_1le" {  } { { "db/alt_u_div_1le.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/alt_u_div_1le.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_r9c.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_r9c.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_r9c " "Info: Found entity 1: add_sub_r9c" {  } { { "db/add_sub_r9c.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/add_sub_r9c.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_s9c.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_s9c.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_s9c " "Info: Found entity 1: add_sub_s9c" {  } { { "db/add_sub_s9c.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/add_sub_s9c.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_r5c.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_r5c.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_r5c " "Info: Found entity 1: add_sub_r5c" {  } { { "db/add_sub_r5c.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/add_sub_r5c.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "miaobiao:MiaoBContr\|lpm_divide:Div1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_divide:Div1\"" {  } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 43 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_42m.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/lpm_divide_42m.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_42m " "Info: Found entity 1: lpm_divide_42m" {  } { { "db/lpm_divide_42m.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/lpm_divide_42m.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/sign_div_unsign_fkh.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/sign_div_unsign_fkh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 sign_div_unsign_fkh " "Info: Found entity 1: sign_div_unsign_fkh" {  } { { "db/sign_div_unsign_fkh.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/sign_div_unsign_fkh.tdf" 26 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_pke.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/alt_u_div_pke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_pke " "Info: Found entity 1: alt_u_div_pke" {  } { { "db/alt_u_div_pke.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/alt_u_div_pke.tdf" 32 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "miaobiao:MiaoBContr\|lpm_divide:Mod1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_divide:Mod1\"" {  } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 44 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_9ql.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/lpm_divide_9ql.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_9ql " "Info: Found entity 1: lpm_divide_9ql" {  } { { "db/lpm_divide_9ql.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/lpm_divide_9ql.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/sign_div_unsign_gkh.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/sign_div_unsign_gkh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 sign_div_unsign_gkh " "Info: Found entity 1: sign_div_unsign_gkh" {  } { { "db/sign_div_unsign_gkh.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/sign_div_unsign_gkh.tdf" 26 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_tke.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/alt_u_div_tke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_tke " "Info: Found entity 1: alt_u_div_tke" {  } { { "db/alt_u_div_tke.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/alt_u_div_tke.tdf" 34 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_q5c.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_q5c.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_q5c " "Info: Found entity 1: add_sub_q5c" {  } { { "db/add_sub_q5c.tdf" "" { Text "D:/StudyVHDL/miaobiao/db/add_sub_q5c.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 100 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" {  } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/altera/quartus60/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus60/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 73 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "a_csnbuffer.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|a_csnbuffer:oflow_node miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" {  } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|a_csnbuffer:result_node miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" {  } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 199 5 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|addcore:adder\[0\] miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|addcore:adder\[0\]\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" {  } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 200 10 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:oflow_node miaobiao:MiaoBContr\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"miaobiao:MiaoBContr\|lpm_add_sub:Add1\"" {  } { { "addcore.tdf" "" { Text "f:/altera/quartus60/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "miaobiao.vhd" "" { Text "D:/StudyVHDL/miaobiao/miaobiao.vhd" 31 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}