dk3200_1_4.plg

Demo for I2C Master and Slave

Current project is: 'DK3200_1'

AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'DK3200_1'

  Processing equations.............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file dk3200_1.tt1...

Module 'dk3200_1' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'DK3200_1'

  Processing equations.............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file dk3200_1.tt1...

Module 'dk3200_1' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

BLIFOPT  Open-ABEL Optimizer 
U.C. Berkeley, SIS Ver. 1.0, modified by Data I/O Corp.
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Reading Open-ABEL (PLA) file DK3200_1.tt1...
Performing 'bypin choose' optimization...
Shortening signal names...
Writing signal name cross reference file DK3200_1.xrf... 
Writing Open-ABEL (PLA) file DK3200_1.tt2...

BLIFOPT complete - 0 errors, 0 warnings. Time: 1 seconds

DIOFFT  Flip-Flop Transformation program
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Input file: DK3200_1.tt2.
Output file: DK3200_1.tt3.


DIOFFT complete. - Time 0 seconds

PSD Fitter - Logic Synthesis and Device Fitting
PSDsoft Express 8.10 Copyright (C) 1993-2004 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : DK3200_1                         DATE : 07/21/2004
DEVICE     : uPSD3234A                        TIME : 14:39:23
FIT OPTION : Keep Current
DESCRIPTION: I2C demo. Simple memory map with 32K secondary flash in code 
space, and 256K main flash paged in data space. Runs on DK3200 
board.

  >> Warning FIT379 : 'tdo' is a dedicated JTAG pin.  Please ensure that
  >>           there is no signal contention.
  >> Warning FIT379 : 'tdi' is a dedicated JTAG pin.  Please ensure that
  >>           there is no signal contention.
  >> Warning FIT379 : 'tck' is a dedicated JTAG pin.  Please ensure that
  >>           there is no signal contention.
  >> Warning FIT379 : 'tms' is a dedicated JTAG pin.  Please ensure that
  >>           there is no signal contention.
  >> Warning FIT170 : Bus control function, '_psen' is not required in the 'psel0' equation.
  >> PSD Fitter complete - Successful Fitting
  >> View fitter report for detail
PSD Address Translation - Merge MCU Firmware with PSD 
PSDsoft Express 8.10 Copyright (C) 1993-2004 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : DK3200_1                                 DATE : 07/21/2004
DEVICE     : uPSD3234A                                TIME : 14:39:33
  >> 
  >> Warning ADR002: No data file has been specified for FS0.
  >> Warning ADR002: No data file has been specified for FS1.
  >> Warning ADR002: No data file has been specified for FS2.
  >> Warning ADR002: No data file has been specified for FS3.
  >> Warning ADR002: No data file has been specified for FS4.
  >> Warning ADR002: No data file has been specified for FS5.
  >> Warning ADR002: No data file has been specified for FS6.
  >> Warning ADR002: No data file has been specified for FS7.
  >> Warning ADR002: No data file has been specified for CSBOOT1.
  >> Warning ADR002: No data file has been specified for CSBOOT2.
  >> Warning ADR002: No data file has been specified for CSBOOT3.
  >> Address Translation complete.
  >> 
Project 'DK3200_1' is closed