startu32.lst

Demo for I2C Master and Slave

A51 MACRO ASSEMBLER  STARTU32                                                             07/21/2004 16:31:42 PAGE     1


MACRO ASSEMBLER A51 V7.10
OBJECT MODULE PLACED IN Startu32.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE Startu32.a51 SET(SMALL) DEBUG EP

LOC  OBJ            LINE     SOURCE

                       1     $nomod51 
                       2     ;------------------------------------------------------------------------------
                       3     ;  Startu32.a51
                       4     ;
                       5     ;  Version:
                       6     ;  July 2004 Version 0.7 - Removed DDC SRAM disable code.  DDC SRAM is
                       7     ;                           disabled by default upon reset.
                       8     ;  July 2004 Version 0.6 - Comments edited, added note about DDC SRAM related to
                       9     ;                           date code
                      10     ;  June 2004 Version 0.5 - Comments edited, code to disable DDC SRAM corrected.
                      11     ;
                      12     ;  Dependencies: None
                      13     ;
                      14     ;  Description:
                      15     ;  This code is executed after a reset.  Besides the usual C51 startup 
                      16     ;  settings, other uPSD Turbo initializations can be added here.  When
                      17     ;  the startup code execution is complete, this code jumps to C_START that is 
                      18     ;  typically the main() function in the C code.
                      19     ;
                      20     ;  Notes:
                      21     ;   - Watchdog timer is disabled - should be enabled at beginning of user's code
                      22     ;   - DDC and its RAM is disabled
                      23     ;   - Various IP prescalers are set to large values (lowers power consumption)
                      24     ;     The IP device drivers must initialize the prescalers appropriately.
                      25     ;
                      26     ;  Copyright (c) 2004 STMicroelectronics Inc.
                      27     ;
                      28     ;  This example demo code is provided as is and has no warranty,
                      29     ;  implied or otherwise.  You are free to use/modify any of the provided
                      30     ;  code at your own risk in your applications with the expressed limitation
                      31     ;  of liability (see below) so long as your product using the code contains
                      32     ;  at least one uPSD product (device).
                      33     ;
                      34     ;  LIMITATION OF LIABILITY:   NEITHER STMicroelectronics NOR ITS VENDORS OR 
                      35     ;  AGENTS SHALL BE LIABLE FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA,
                      36     ;  INTERRUPTION OF BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR
                      37     ;  CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER THIS AGREEMENT OR
                      38     ;  OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
                      39     ;------------------------------------------------------------------------------
                      40     
                      41     ;  User-defined Power-On Initialization of Memory (Clear Memory)
                      42     ;
                      43     ;  With the following EQU statements the initialization of memory
                      44     ;  at processor reset can be defined:
                      45     
                      46     ;               ; the absolute start-address of IDATA memory is always 0
  0100                47     IDATALEN        EQU     100H    ; the length of IDATA memory in bytes.
                      48     
                      49     ; *** NOTE: uPSD users need to fill in the following based on where SRAM memory mapped.
                      50     
  0000                51     XDATASTART      EQU     0H      ; the absolute start-address of XDATA memory
  0000                52     XDATALEN        EQU     0H      ; the length of XDATA memory in bytes.
                      53     
  0000                54     PDATASTART      EQU     0H      ; the absolute start-address of PDATA memory
  0000                55     PDATALEN        EQU     0H      ; the length of PDATA memory in bytes.
                      56     
                      57     ;  Notes:  The IDATA space overlaps physically the DATA and BIT areas of the
                      58     ;          8051 CPU. At minimum the memory space occupied from the C51 
A51 MACRO ASSEMBLER  STARTU32                                                             07/21/2004 16:31:42 PAGE     2

                      59     ;          run-time routines must be set to zero.
                      60     
                      61     
                      62     ;------------------------------------------------------------------------------
                      63     ;
                      64     ;  Reentrant Stack Initilization
                      65     ;
                      66     ;  The following EQU statements define the stack pointer for reentrant
                      67     ;  functions and initialized it:
                      68     ;
                      69     ;  Stack Space for reentrant functions in the SMALL model.
  0000                70     IBPSTACK        EQU     0       ; set to 1 if small reentrant is used.
  0100                71     IBPSTACKTOP     EQU     0FFH+1  ; set top of stack to highest location+1.
                      72     ;
                      73     ;  Stack Space for reentrant functions in the LARGE model.      
  0000                74     XBPSTACK        EQU     0       ; set to 1 if large reentrant is used.
  0000                75     XBPSTACKTOP     EQU     0FFFFH+1; set top of stack to highest location+1.
                      76     ;
                      77     ;  Stack Space for reentrant functions in the COMPACT model.    
  0000                78     PBPSTACK        EQU     0       ; set to 1 if compact reentrant is used.
  0000                79     PBPSTACKTOP     EQU     0FFFFH+1; set top of stack to highest location+1.
                      80     ;
                      81     ;------------------------------------------------------------------------------
                      82     ;
                      83     ;  Page Definition for Using the Compact Model with 64 KByte xdata RAM
                      84     ;
                      85     ;  The following EQU statements define the xdata page used for pdata
                      86     ;  variables. The EQU PPAGE must conform with the PPAGE control used
                      87     ;  in the linker invocation.
                      88     ;
  0000                89     PPAGEENABLE     EQU     0       ; set to 1 if pdata object are used.
                      90     ;
  0000                91     PPAGE           EQU     0       ; define PPAGE number.
                      92     ;
  00A0                93     PPAGE_SFR       DATA    0A0H    ; SFR that supplies uppermost address byte
                      94     ;               (most 8051 variants use P2 as uppermost address byte)
                      95     ;
                      96     ;------------------------------------------------------------------------------
                      97     
                      98     ; Standard SFR Symbols 
  00E0                99     ACC     DATA    0E0H
  00F0               100     B       DATA    0F0H
  0081               101     SP      DATA    81H
  0082               102     DPL     DATA    82H
  0083               103     DPH     DATA    83H
  00AE               104     WDKEY   DATA    0AEH
  0095               105     ASCL    DATA    095H
  00B1               106     PSCL0L  DATA    0B1H
  00B2               107     PSCL0H  DATA    0B2H
  00B3               108     PSCL1L  DATA    0B3H
  00B4               109     PSCL1H  DATA    0B4H
  00E1               110     USCL    DATA    0E1H
  00D7               111     DDCCON  DATA    0D7H
  00D8               112     S1CON   DATA    0D8H
                     113     
                     114                     NAME    ?C_STARTUP
                     115     
                     116     
                     117     ?C_C51STARTUP   SEGMENT   CODE
                     118     ?STACK          SEGMENT   IDATA
                     119     
----                 120                     RSEG    ?STACK
0000                 121                     DS      1
                     122     
                     123                     EXTRN CODE (?C_START)
                     124                     PUBLIC  ?C_STARTUP