shuiwei.asm

多个仿真例子

k1_f	bit	00h
k2_f	bit	01h
first	bit	02h
k1_fl	bit	03h
k2_fl	bit	04h
k1_fr	bit	05h
k2_fr	bit	06h
alarm	bit	07h
min	bit	08h
k1	bit	p1.0
k2	bit	p1.1
k3	bit	p1.2
motor	bit	p1.4
green	bit	p1.3
yellow	bit	p1.5
red	bit	p1.6
	org	0
	ljmp	start
	org	0bh
	ljmp	ts0
	org	1bh
	ljmp	ts1
	org	30h
start:	mov	sp,#60h
	mov	tmod,#11h
	mov	th0,#3ch
	mov	tl0,#0b0h
	mov	th1,#0d8h
	mov	tl1,#0f0h
	setb	pt0
	setb	et0
	setb	et1
	setb	tr1
	setb	ea
	clr	k1_f
	clr	k2_f
	clr	k1_fl
	clr	k2_fl
	clr	k1_fr
	clr	k2_fr
	clr	alarm
	setb	first
	clr	min
	mov	08h,#10	;1s
	mov	09h,#5	;0.5s
	mov	0bh,#20	;20s
	setb	yellow
	clr	green
	clr	red
	clr	motor
loop:	setb	tr0
	setb	min
	setb	green
	setb	motor
l2:	jnb	k2_f,l1
	clr	green
	clr	motor
	clr	tr0
	clr	min
	mov	08h,#10	;1s
	mov	09h,#5	;0.5s
	mov	0bh,#20	;20s
	jb	k1_f,$
	sjmp	loop
l1:	jnb	alarm,l2
l3:	setb	k3
	jb	k3,l3
	lcall	delay
	setb	k3
	jb	k3,l3
	jnb	k3,$
	lcall	delay
	setb	k3
	jb	k3,$
	clr	tr0
	clr	red
	setb	yellow
	clr	alarm
	clr	min
	mov	08h,#10	;1s
	mov	09h,#5	;0.5s
	mov	0bh,#20	;20s
	sjmp	loop
delay:	mov	r6,#40
d1:	mov	r7,#250
	djnz	r7,$
	djnz	r6,d1
	ret
ts0:	push	psw
	setb	rs0
	clr	rs1
	clr	tr0
	mov	th0,#3ch
	mov	tl0,#0b0h
	setb	tr0
	jnb	alarm,tt1
	djnz	r1,tt1
	mov	r1,#5	;0.5s
	cpl	red
tt1:	jnb	min,tt2
	djnz	r0,tt2
	mov	r0,#10	;1s
	djnz	r3,tt2
	mov	r3,#20	;20s
	setb	alarm
	clr	green
	clr	motor
	clr	yellow
	clr	min
tt2:	pop	psw
	reti
ts1:	push	psw
	setb	rs1
	clr	rs0
	clr	tr1
	mov	th1,#0d8h
	mov	tl1,#0f0h
	setb	tr1
	setb	k1
	setb	k2
	mov	c,k1
	mov	k1_fr,c
	mov	c,k2
	mov	k2_fr,c
	jnb	first,tt3
	clr	first
	mov	c,k1_fr
	mov	k1_fl,c
	mov	c,k2_fr
	mov	k2_fl,c
	sjmp	finish
tt3:	clr	a
	mov	c,k1_fl
	mov	acc.0,c
	mov	r0,a
	mov	c,k1_fr
	mov	acc.0,c
	xrl	a,r0
	jz	tt4
	mov	c,k1_fr
	mov	k1_fl,c
	sjmp	tt5
tt4:	mov	c,k1_fr
	mov	k1_fl,c
	mov	k1_f,c
tt5:	clr	a
	mov	c,k2_fl
	mov	acc.0,c
	mov	r0,a
	mov	c,k2_fr
	mov	acc.0,c
	xrl	a,r0
	jz	tt6
	mov	c,k2_fr
	mov	k2_fl,c
	sjmp	finish
tt6:	mov	c,k2_fr
	mov	k2_fl,c
	mov	k2_f,c
finish:	pop	psw
	reti	
	end