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📄 wash.vto

📁 洗衣机的程序 洗衣机的程序
💻 VTO
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	D0 => N_12_D0);
GLB_N_13 : PGDFFR
	PORT MAP (Q0 => N_13, RNESET => L2L_KEYWD_RESET_glbb, CD => GND, CLK => A2_CLK, 
	D0 => N_13_D0);
GLB_A2_IN16B : PGINVI
	PORT MAP (ZN0 => A2_IN16B, A0 => N_13_ffb);
GLB_A2_IN6B : PGINVI
	PORT MAP (ZN0 => A2_IN6B, A0 => N_10_grp);
GLB_A2_IN17B : PGINVI
	PORT MAP (ZN0 => A2_IN17B, A0 => N_12_ffb);
GLB_A2_IN3B : PGINVI
	PORT MAP (ZN0 => A2_IN3B, A0 => N_11_grp);
GLB_A4_P18 : PGAND5
	PORT MAP (Z0 => A4_P18, A4 => A4_IN0, A3 => A4_IN4, A2 => A4_IN6B, 
	A1 => A4_IN9, A0 => A4_IN11);
GLB_A4_P17 : PGAND2
	PORT MAP (Z0 => A4_P17, A1 => A4_IN0, A0 => A4_IN1);
GLB_A4_P16 : PGAND2
	PORT MAP (Z0 => A4_P16, A1 => A4_IN6, A0 => A4_IN17);
GLB_A4_P15 : PGAND2
	PORT MAP (Z0 => A4_P15, A1 => A4_IN6B, A0 => A4_IN17B);
GLB_A4_P14 : PGAND2
	PORT MAP (Z0 => A4_P14, A1 => A4_IN0, A0 => A4_IN16);
GLB_A4_P13 : PGAND3
	PORT MAP (Z0 => A4_P13, A2 => A4_IN0, A1 => A4_IN1B, A0 => A4_IN16B);
GLB_A4_P12 : PGAND6
	PORT MAP (Z0 => A4_P12, A5 => A4_IN0B, A4 => A4_IN4, A3 => A4_IN6, 
	A2 => A4_IN9, A1 => A4_IN11, A0 => A4_IN17);
GLB_A4_P8 : PGAND2
	PORT MAP (Z0 => A4_P8, A1 => A4_IN0B, A0 => A4_IN1);
GLB_A4_P7 : PGAND7
	PORT MAP (Z0 => A4_P7, A6 => A4_IN0B, A5 => A4_IN4, A4 => A4_IN6, 
	A3 => A4_IN9, A2 => A4_IN11, A1 => A4_IN16, A0 => A4_IN17);
GLB_A4_P4 : PGAND2
	PORT MAP (Z0 => A4_P4, A1 => A4_IN0B, A0 => A4_IN16);
GLB_A4_P3 : PGAND8
	PORT MAP (Z0 => A4_P3, A7 => A4_IN0, A6 => A4_IN1B, A5 => A4_IN4, 
	A4 => A4_IN6, A3 => A4_IN9, A2 => A4_IN11, A1 => A4_IN16B, 
	A0 => A4_IN17);
GLB_A4_P2 : PGAND8
	PORT MAP (Z0 => A4_P2, A7 => A4_IN0B, A6 => A4_IN1, A5 => A4_IN4, 
	A4 => A4_IN6, A3 => A4_IN9, A2 => A4_IN11, A1 => A4_IN16, 
	A0 => A4_IN17);
GLB_A4_P0 : PGBUFI
	PORT MAP (Z0 => A4_P0, A0 => VCC);
GLB_A4_G3 : PGBUFI
	PORT MAP (Z0 => A4_G3, A0 => A4_F0);
GLB_A4_G2 : PGBUFI
	PORT MAP (Z0 => A4_G2, A0 => A4_F1);
GLB_A4_G1 : PGBUFI
	PORT MAP (Z0 => A4_G1, A0 => A4_F4);
GLB_A4_G0 : PGBUFI
	PORT MAP (Z0 => A4_G0, A0 => A4_F5);
GLB_A4_F5 : PGORF75
	PORT MAP (Z0 => A4_F5, A4 => A4_P14, A3 => A4_P15, A2 => A4_P16, 
	A1 => A4_P17, A0 => A4_P18);
GLB_A4_F4 : PGBUFI
	PORT MAP (Z0 => A4_F4, A0 => A4_P12);
GLB_A4_F1 : PGBUFI
	PORT MAP (Z0 => A4_F1, A0 => A4_P7);
GLB_A4_F0 : PGORF72
	PORT MAP (Z0 => A4_F0, A1 => A4_P2, A0 => A4_P3);
GLB_A4_CLK : PGBUFI
	PORT MAP (Z0 => A4_CLK, A0 => BUF_1197_ck2f);
GLB_A4_P0_xa : PGBUFI
	PORT MAP (Z0 => A4_P0_xa, A0 => A4_P0);
GLB_A4_P4_xa : PGBUFI
	PORT MAP (Z0 => A4_P4_xa, A0 => A4_P4);
GLB_A4_P8_xa : PGBUFI
	PORT MAP (Z0 => A4_P8_xa, A0 => A4_P8);
GLB_A4_P13_xa : PGBUFI
	PORT MAP (Z0 => A4_P13_xa, A0 => A4_P13);
GLB_A4_IN0 : PGBUFI
	PORT MAP (Z0 => A4_IN0, A0 => N_17_grp);
GLB_A4_IN17 : PGBUFI
	PORT MAP (Z0 => A4_IN17, A0 => N_11_ffb);
GLB_A4_IN16 : PGBUFI
	PORT MAP (Z0 => A4_IN16, A0 => N_15_ffb);
GLB_A4_IN11 : PGBUFI
	PORT MAP (Z0 => A4_IN11, A0 => N_12_grp);
GLB_A4_IN9 : PGBUFI
	PORT MAP (Z0 => A4_IN9, A0 => N_13_grp);
GLB_A4_IN6 : PGBUFI
	PORT MAP (Z0 => A4_IN6, A0 => N_10_grp);
GLB_A4_IN4 : PGBUFI
	PORT MAP (Z0 => A4_IN4, A0 => N_14_grp);
GLB_A4_IN1 : PGBUFI
	PORT MAP (Z0 => A4_IN1, A0 => N_16_grp);
GLB_N_11_D0 : PGXOR2
	PORT MAP (Z0 => N_11_D0, A1 => A4_P0_xa, A0 => A4_G0);
GLB_N_15_D0 : PGXOR2
	PORT MAP (Z0 => N_15_D0, A1 => A4_P4_xa, A0 => A4_G1);
GLB_N_16_D0 : PGXOR2
	PORT MAP (Z0 => N_16_D0, A1 => A4_P8_xa, A0 => A4_G2);
GLB_N_17_D0 : PGXOR2
	PORT MAP (Z0 => N_17_D0, A1 => A4_P13_xa, A0 => A4_G3);
GLB_N_11 : PGDFFR
	PORT MAP (Q0 => N_11, RNESET => L2L_KEYWD_RESET_glbb, CD => GND, CLK => A4_CLK, 
	D0 => N_11_D0);
GLB_N_15 : PGDFFR
	PORT MAP (Q0 => N_15, RNESET => L2L_KEYWD_RESET_glbb, CD => GND, CLK => A4_CLK, 
	D0 => N_15_D0);
GLB_N_16 : PGDFFR
	PORT MAP (Q0 => N_16, RNESET => L2L_KEYWD_RESET_glbb, CD => GND, CLK => A4_CLK, 
	D0 => N_16_D0);
GLB_N_17 : PGDFFR
	PORT MAP (Q0 => N_17, RNESET => L2L_KEYWD_RESET_glbb, CD => GND, CLK => A4_CLK, 
	D0 => N_17_D0);
GLB_A4_IN17B : PGINVI
	PORT MAP (ZN0 => A4_IN17B, A0 => N_11_ffb);
GLB_A4_IN6B : PGINVI
	PORT MAP (ZN0 => A4_IN6B, A0 => N_10_grp);
GLB_A4_IN16B : PGINVI
	PORT MAP (ZN0 => A4_IN16B, A0 => N_15_ffb);
GLB_A4_IN1B : PGINVI
	PORT MAP (ZN0 => A4_IN1B, A0 => N_16_grp);
GLB_A4_IN0B : PGINVI
	PORT MAP (ZN0 => A4_IN0B, A0 => N_17_grp);
GLB_A5_P19 : PGAND5
	PORT MAP (Z0 => A5_P19, A4 => A5_IN3, A3 => A5_IN4, A2 => A5_IN9, 
	A1 => A5_IN11, A0 => A5_IN16);
GLB_A5_P18 : PGAND2
	PORT MAP (Z0 => A5_P18, A1 => A5_IN0, A0 => A5_IN1);
GLB_A5_P17 : PGAND2
	PORT MAP (Z0 => A5_P17, A1 => A5_IN0, A0 => A5_IN2);
GLB_A5_P16 : PGAND2
	PORT MAP (Z0 => A5_P16, A1 => A5_IN4B, A0 => A5_IN16B);
GLB_A5_P15 : PGAND2
	PORT MAP (Z0 => A5_P15, A1 => A5_IN3B, A0 => A5_IN4B);
GLB_A5_P14 : PGAND2
	PORT MAP (Z0 => A5_P14, A1 => A5_IN4B, A0 => A5_IN11B);
GLB_A5_P13 : PGAND2
	PORT MAP (Z0 => A5_P13, A1 => A5_IN4B, A0 => A5_IN9B);
GLB_A5_P4 : PGBUFI
	PORT MAP (Z0 => A5_P4, A0 => VCC);
GLB_A5_P3 : PGBUFI
	PORT MAP (Z0 => A5_P3, A0 => A5_IN16);
GLB_A5_P2 : PGAND2
	PORT MAP (Z0 => A5_P2, A1 => A5_IN0, A0 => A5_IN2);
GLB_A5_P1 : PGAND2
	PORT MAP (Z0 => A5_P1, A1 => A5_IN0, A0 => A5_IN1);
GLB_A5_P0 : PGAND5
	PORT MAP (Z0 => A5_P0, A4 => A5_IN0, A3 => A5_IN3, A2 => A5_IN4, 
	A1 => A5_IN9, A0 => A5_IN11);
GLB_A5_G3 : PGBUFI
	PORT MAP (Z0 => A5_G3, A0 => A5_F5);
GLB_A5_G1 : PGBUFI
	PORT MAP (Z0 => A5_G1, A0 => A5_F0);
GLB_A5_F5 : PGORF77
	PORT MAP (Z0 => A5_F5, A6 => A5_P13, A5 => A5_P14, A4 => A5_P15, 
	A3 => A5_P16, A2 => A5_P19, A1 => A5_P17, A0 => A5_P18);
GLB_A5_F0 : PGORF74
	PORT MAP (Z0 => A5_F0, A3 => A5_P0, A2 => A5_P1, A1 => A5_P2, 
	A0 => A5_P3);
GLB_A5_CLK : PGBUFI
	PORT MAP (Z0 => A5_CLK, A0 => BUF_1197_ck2f);
GLB_A5_P4_xa : PGBUFI
	PORT MAP (Z0 => A5_P4_xa, A0 => A5_P4);
GLB_A5_IN16 : PGBUFI
	PORT MAP (Z0 => A5_IN16, A0 => N_10_ffb);
GLB_A5_IN2 : PGBUFI
	PORT MAP (Z0 => A5_IN2, A0 => N_15_grp);
GLB_A5_IN1 : PGBUFI
	PORT MAP (Z0 => A5_IN1, A0 => N_16_grp);
GLB_A5_IN11 : PGBUFI
	PORT MAP (Z0 => A5_IN11, A0 => N_12_grp);
GLB_A5_IN9 : PGBUFI
	PORT MAP (Z0 => A5_IN9, A0 => N_13_grp);
GLB_A5_IN4 : PGBUFI
	PORT MAP (Z0 => A5_IN4, A0 => N_14_grp);
GLB_A5_IN3 : PGBUFI
	PORT MAP (Z0 => A5_IN3, A0 => N_11_grp);
GLB_A5_IN0 : PGBUFI
	PORT MAP (Z0 => A5_IN0, A0 => N_17_grp);
GLB_N_10_D0 : PGXOR2
	PORT MAP (Z0 => N_10_D0, A1 => A5_P4_xa, A0 => A5_G1);
GLB_N_14_D0 : PGXOR2
	PORT MAP (Z0 => N_14_D0, A1 => VCC, A0 => A5_G3);
GLB_N_10 : PGDFFR
	PORT MAP (Q0 => N_10, RNESET => L2L_KEYWD_RESET_glbb, CD => GND, CLK => A5_CLK, 
	D0 => N_10_D0);
GLB_N_14 : PGDFFR
	PORT MAP (Q0 => N_14, RNESET => L2L_KEYWD_RESET_glbb, CD => GND, CLK => A5_CLK, 
	D0 => N_14_D0);
GLB_A5_IN16B : PGINVI
	PORT MAP (ZN0 => A5_IN16B, A0 => N_10_ffb);
GLB_A5_IN3B : PGINVI
	PORT MAP (ZN0 => A5_IN3B, A0 => N_11_grp);
GLB_A5_IN11B : PGINVI
	PORT MAP (ZN0 => A5_IN11B, A0 => N_12_grp);
GLB_A5_IN9B : PGINVI
	PORT MAP (ZN0 => A5_IN9B, A0 => N_13_grp);
GLB_A5_IN4B : PGINVI
	PORT MAP (ZN0 => A5_IN4B, A0 => N_14_grp);
GLB_A6_P19 : PGAND8
	PORT MAP (Z0 => A6_P19, A7 => A6_IN0B, A6 => A6_IN1, A5 => A6_IN2B, 
	A4 => A6_IN3, A3 => A6_IN4, A2 => A6_IN6, A1 => A6_IN9, 
	A0 => A6_IN11);
GLB_A6_P18 : PGAND8
	PORT MAP (Z0 => A6_P18, A7 => A6_IN0B, A6 => A6_IN1, A5 => A6_IN2, 
	A4 => A6_IN3B, A3 => A6_IN4B, A2 => A6_IN6B, A1 => A6_IN9B, 
	A0 => A6_IN11B);
GLB_A6_P17 : PGAND8
	PORT MAP (Z0 => A6_P17, A7 => A6_IN0B, A6 => A6_IN1, A5 => A6_IN2, 
	A4 => A6_IN3B, A3 => A6_IN4, A2 => A6_IN6B, A1 => A6_IN9, 
	A0 => A6_IN11);
GLB_A6_P16 : PGAND8
	PORT MAP (Z0 => A6_P16, A7 => A6_IN0B, A6 => A6_IN1, A5 => A6_IN2B, 
	A4 => A6_IN3, A3 => A6_IN4, A2 => A6_IN6B, A1 => A6_IN9, 
	A0 => A6_IN11B);
GLB_A6_P15 : PGAND8
	PORT MAP (Z0 => A6_P15, A7 => A6_IN0B, A6 => A6_IN1B, A5 => A6_IN2, 
	A4 => A6_IN3, A3 => A6_IN4, A2 => A6_IN6B, A1 => A6_IN9, 
	A0 => A6_IN11);
GLB_A6_P14 : PGAND8
	PORT MAP (Z0 => A6_P14, A7 => A6_IN0B, A6 => A6_IN1B, A5 => A6_IN2B, 
	A4 => A6_IN3B, A3 => A6_IN4, A2 => A6_IN6B, A1 => A6_IN9B, 
	A0 => A6_IN11B);
GLB_A6_P13 : PGAND8
	PORT MAP (Z0 => A6_P13, A7 => A6_IN0B, A6 => A6_IN1B, A5 => A6_IN2B, 
	A4 => A6_IN3, A3 => A6_IN4B, A2 => A6_IN6, A1 => A6_IN9, 
	A0 => A6_IN11);
GLB_A6_P12 : PGAND7
	PORT MAP (Z0 => A6_P12, A6 => A6_IN0, A5 => A6_IN1B, A4 => A6_IN2B, 
	A3 => A6_IN4, A2 => A6_IN6B, A1 => A6_IN9, A0 => A6_IN11);
GLB_A6_P11 : PGAND7
	PORT MAP (Z0 => A6_P11, A6 => A6_IN0, A5 => A6_IN1B, A4 => A6_IN2B, 
	A3 => A6_IN3B, A2 => A6_IN4, A1 => A6_IN9, A0 => A6_IN11);
GLB_A6_P7 : PGAND6
	PORT MAP (Z0 => A6_P7, A5 => A6_IN0, A4 => A6_IN1B, A3 => A6_IN2B, 
	A2 => A6_IN3, A1 => A6_IN4, A0 => A6_IN11B);
GLB_A6_P6 : PGAND6
	PORT MAP (Z0 => A6_P6, A5 => A6_IN0, A4 => A6_IN1B, A3 => A6_IN2B, 
	A2 => A6_IN4, A1 => A6_IN9, A0 => A6_IN11B);
GLB_A6_P5 : PGAND6
	PORT MAP (Z0 => A6_P5, A5 => A6_IN0, A4 => A6_IN1B, A3 => A6_IN2B, 
	A2 => A6_IN4, A1 => A6_IN9B, A0 => A6_IN11);
GLB_A6_P3 : PGAND6
	PORT MAP (Z0 => A6_P3, A5 => A6_IN0, A4 => A6_IN1B, A3 => A6_IN2B, 
	A2 => A6_IN4, A1 => A6_IN6B, A0 => A6_IN11);
GLB_A6_P2 : PGAND7
	PORT MAP (Z0 => A6_P2, A6 => A6_IN0B, A5 => A6_IN1, A4 => A6_IN2, 
	A3 => A6_IN3, A2 => A6_IN6B, A1 => A6_IN9B, A0 => A6_IN11);
GLB_A6_P1 : PGAND7
	PORT MAP (Z0 => A6_P1, A6 => A6_IN0B, A5 => A6_IN1, A4 => A6_IN2, 
	A3 => A6_IN3B, A2 => A6_IN6, A1 => A6_IN9B, A0 => A6_IN11);
GLB_A6_P0 : PGAND7
	PORT MAP (Z0 => A6_P0, A6 => A6_IN0B, A5 => A6_IN1, A4 => A6_IN2B, 
	A3 => A6_IN3B, A2 => A6_IN6B, A1 => A6_IN9B, A0 => A6_IN11);
GLB_A6_G3 : PGBUFI
	PORT MAP (Z0 => A6_G3, A0 => A6_F4);
GLB_A6_G2 : PGBUFI
	PORT MAP (Z0 => A6_G2, A0 => A6_F1);
GLB_A6_G1 : PGORF72
	PORT MAP (Z0 => A6_G1, A1 => A6_F0, A0 => A6_F5);
GLB_A6_F5 : PGORF77
	PORT MAP (Z0 => A6_F5, A6 => A6_P13, A5 => A6_P14, A4 => A6_P15, 
	A3 => A6_P16, A2 => A6_P19, A1 => A6_P17, A0 => A6_P18);
GLB_A6_F4 : PGORF72
	PORT MAP (Z0 => A6_F4, A1 => A6_P11, A0 => A6_P12);
GLB_A6_F1 : PGORF73
	PORT MAP (Z0 => A6_F1, A2 => A6_P5, A1 => A6_P6, A0 => A6_P7);
GLB_A6_F0 : PGORF74
	PORT MAP (Z0 => A6_F0, A3 => A6_P0, A2 => A6_P1, A1 => A6_P2, 
	A0 => A6_P3);
GLB_OR_1116 : PGBUFI
	PORT MAP (Z0 => OR_1116, A0 => A6_X2O);
GLB_OR_777 : PGBUFI
	PORT MAP (Z0 => OR_777, A0 => A6_X1O);
GLB_OK_PIN : PGBUFI
	PORT MAP (Z0 => OK_PIN, A0 => A6_X0O);
GLB_A6_IN9 : PGBUFI
	PORT MAP (Z0 => A6_IN9, A0 => N_13_grp);
GLB_A6_IN4 : PGBUFI
	PORT MAP (Z0 => A6_IN4, A0 => N_14_grp);
GLB_A6_IN0 : PGBUFI
	PORT MAP (Z0 => A6_IN0, A0 => N_17_grp);
GLB_A6_IN3 : PGBUFI
	PORT MAP (Z0 => A6_IN3, A0 => N_11_grp);
GLB_A6_IN6 : PGBUFI
	PORT MAP (Z0 => A6_IN6, A0 => N_10_grp);
GLB_A6_IN2 : PGBUFI
	PORT MAP (Z0 => A6_IN2, A0 => N_15_grp);
GLB_A6_IN11 : PGBUFI
	PORT MAP (Z0 => A6_IN11, A0 => N_12_grp);
GLB_A6_IN1 : PGBUFI
	PORT MAP (Z0 => A6_IN1, A0 => N_16_grp);
GLB_A6_X2O : PGXOR2
	PORT MAP (Z0 => A6_X2O, A1 => GND, A0 => A6_G1);
GLB_A6_X1O : PGXOR2
	PORT MAP (Z0 => A6_X1O, A1 => GND, A0 => A6_G2);
GLB_A6_X0O : PGXOR2
	PORT MAP (Z0 => A6_X0O, A1 => GND, A0 => A6_G3);
GLB_A6_IN4B : PGINVI
	PORT MAP (ZN0 => A6_IN4B, A0 => N_14_grp);
GLB_A6_IN11B : PGINVI
	PORT MAP (ZN0 => A6_IN11B, A0 => N_12_grp);
GLB_A6_IN1B : PGINVI
	PORT MAP (ZN0 => A6_IN1B, A0 => N_16_grp);
GLB_A6_IN9B : PGINVI
	PORT MAP (ZN0 => A6_IN9B, A0 => N_13_grp);
GLB_A6_IN6B : PGINVI
	PORT MAP (ZN0 => A6_IN6B, A0 => N_10_grp);
GLB_A6_IN3B : PGINVI
	PORT MAP (ZN0 => A6_IN3B, A0 => N_11_grp);
GLB_A6_IN2B : PGINVI
	PORT MAP (ZN0 => A6_IN2B, A0 => N_15_grp);
GLB_A6_IN0B : PGINVI
	PORT MAP (ZN0 => A6_IN0B, A0 => N_17_grp);
GLB_B0_P19 : PGAND6
	PORT MAP (Z0 => B0_P19, A5 => B0_IN6B, A4 => B0_IN9, A3 => B0_IN12, 
	A2 => B0_IN13B, A1 => B0_IN14B, A0 => B0_IN15);
GLB_B0_P18 : PGAND6
	PORT MAP (Z0 => B0_P18, A5 => B0_IN4B, A4 => B0_IN6, A3 => B0_IN9, 
	A2 => B0_IN11, A1 => B0_IN13B, A0 => B0_IN15B);
GLB_B0_P17 : PGAND6
	PORT MAP (Z0 => B0_P17, A5 => B0_IN4B, A4 => B0_IN6B, A3 => B0_IN12, 
	A2 => B0_IN13B, A1 => B0_IN14B, A0 => B0_IN15);
GLB_B0_P16 : PGAND5
	PORT MAP (Z0 => B0_P16, A4 => B0_IN4B, A3 => B0_IN12B, A2 => B0_IN13, 
	A1 => B0_IN14B, A0 => B0_IN15B);
GLB_B0_P15 : PGAND5
	PORT MAP (Z0 => B0_P15, A4 => B0_IN4, A3 => B0_IN11, A2 => B0_IN12B, 
	A1 => B0_IN13B, A0 => B0_IN14B);
GLB_B0_P14 : PGBUFI
	PORT MAP (Z0 => B0_P14, A0 => B0_IN5);
GLB_B0_P12 : PGAND8
	PORT MAP (Z0 => B0_P12, A7 => B0_IN4B, A6 => B0_IN5B, A5 => B0_IN6, 
	A4 => B0_IN9, A3 => B0_IN11, A2 => B0_IN12, A1 => B0_IN14, 
	A0 => B0_IN15B);
GLB_B0_P11 : PGAND8
	PORT MAP (Z0 => B0_P11, A7 => B0_IN4B, A6 => B0_IN5B, A5 => B0_IN6, 
	A4 => B0_IN11B, A3 => B0_IN12B, A2 => B0_IN13, A1 => B0_IN14B, 
	A0 => B0_IN15B);
GLB_B0_P8 : PGBUFI
	PORT MAP (Z0 => B0_P8, A0 => B0_IN7);
GLB_B0_P7 : PGAND7
	PORT MAP (Z0 => B0_P7, A6 => B0_IN4, A5 => B0_IN5B, A4 => B0_IN6B, 
	A3 => B0_IN9B, A2 => B0_IN11, A1 => B0_IN13B, A0 => B0_IN14B);
GLB_B0_P6 : PGAND7
	PORT MAP (Z0 => B0_P6, A6 => B0_IN5B, A5 => B0_IN6, A4 => B0_IN9, 
	A3 => B0_IN11, A2 => B0_IN12B, A1 => B0_IN14B, A0 => B0_IN15B);
GLB_B0_P5 : PGAND7
	PORT MAP (Z0 => B0_P5, A6 => B0_IN4B, A5 => B0_IN5B, A4 => B0_IN6B, 
	A3 => B0_IN9B, A2 => B0_IN13, A1 => B0_IN14B, A0 => B0_IN15B);
GLB_B0_P4 : PGAND8
	PORT MAP (Z0 => B0_P4, A7 => B0_IN4B, A6 => B0_IN5B, A5 => B0_IN6B, 
	A4 => B0_IN9, A3 => B0_IN11B, A2 => B0_IN13B, A1 => B0_IN14B, 
	A0 => B0_IN15);
GLB_B0_P3 : PGAND6
	PORT MAP (Z0 => B0_P3, A5 => B0_IN4B, A4 => B0_IN6, A3 => B0_IN11, 
	A2 => B0_IN13B, A1 => B0_IN14B, A0 => B0_IN15);
GLB_B0_P2 : PGAND8
	PORT MAP (Z0 => B0_P2, A7 => B0_IN4, A6 => B0_IN6B, A5 => B0_IN9, 
	A4 => B0_IN11, A3 => B0_IN12, A2 => B0_IN13, A1 => B0_IN14B, 
	A0 => B0_IN15B);
GLB_B0_P1 : PGAND7
	PORT MAP (Z0 => B0_P1, A6 => B0_IN4B, A5 => B0_IN6, A4 => B0_IN9B, 
	A3 => B0_IN12B, A2 => B0_IN13B, A1 => B0_IN14B, A0 => B0_IN15);
GLB_B0_P0 : PGAND7
	PORT MAP (Z0 => B0_P0, A6 => B0_IN4B, A5 => B0_IN6B, A4 => B0_IN9, 
	A3 => B0_IN12, A2 => B0_IN13B, A1 => B0_IN14, A0 => B0_IN15B);
GLB_B0_G3 : PGORF72
	PORT MAP (Z0 => B0_G3, A1 => B0_F1, A0 => B0_F4);
GLB_B0_G2 : PGBUFI
	PORT MAP (Z0 => B0_G2, A0 => GND);
GLB_B0_G0 : PGORF72
	PORT MAP (Z0 => B0_G0, A1 => B0_F0, A0 => B0_F5);
GLB_B0_F5 : PGORF76
	PORT MAP (Z0 => B0_F5, A5 => B0_P14, A4 => B0_P15, A3 => B0_P16, 
	A2 => B0_P19, A1 => B0_P17, A0 => B0_P18);
GLB_B0_F4 : PGORF72
	PORT MAP (Z0 => B0_F4, A1 => B0_P11, A0 => B0_P12);
GLB_B0_F1 : PGORF74
	PORT MAP (Z0 => B0_F1, A3 => B0_P4, A2 => B0_P5, A1 => B0_P6, 
	A0 => B0_P7);
GLB_B0_F0 : PGORF74
	PORT MAP (Z0 => B0_F0, A3 => B0_P0, A2 => B0_P1, A1 => B0_P2, 
	A0 => B0_P3);
GLB_B0_X3MO : PGBUFI
	PORT MAP (Z0 => B0_X3MO, A0 => B0_G3);
GLB_ZZ_PIN : PGBUFI

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