c6711_cpu.h

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/*********************************************************************************************************
* File      : C6711_CPU.H
* Descriptin: 
*********************************************************************************************************/
#ifdef C6711_GLOBALS
//#define  EXT
#else
#define  EXT  extern
#endif

#ifndef _REGS_H_
#define _REGS_H_


typedef unsigned char  BOOLEAN;

#define TRUE       ((BOOLEAN)1)
#define FALSE      ((BOOLEAN)0)
#define ERROR      ((BOOLEAN)10)


/**************************** CONTROL REGISTERS *******************************/

extern cregister volatile unsigned int AMR;     /* Address Mode Register      */
extern cregister volatile unsigned int CSR ;     /* Control Status Register    */
extern cregister volatile unsigned int IFR;     /* Interrupt Flag Register    */
extern cregister volatile unsigned int ISR;     /* Interrupt Set Register     */
extern cregister volatile unsigned int ICR;     /* Interrupt Clear Register   */
extern cregister volatile unsigned int IER;     /* Interrupt Enable Register  */
extern cregister volatile unsigned int ISTP;    /* Interrupt Service Tbl Ptr  */
extern cregister volatile unsigned int IRP;     /* Interrupt Return Pointer   */
extern cregister volatile unsigned int NRP;     /* Non-maskable Int Return Ptr*/
extern cregister volatile unsigned int FADCR;   /* Float_Add_Configure_Register*/       
extern cregister volatile unsigned int FAUCR;   /* Float_Auxiliary_Configure_Register */
extern cregister volatile unsigned int FMCR;    /* Float_Multiply_Configure_Register */
extern cregister volatile unsigned int IN;      /* General Purpose Input Reg  */
extern cregister volatile unsigned int OUT;     /* General Purpose Output Reg */

/* Control Register Bitfields */

/* AMR */
#define A4_MODE               0    /*A4 Mode Bitfield begin*/
#define A4_MODE_SZ            2    /*A4 Mode Bitfield size */
#define A5_MODE               2
#define A5_MODE_SZ            2
#define A6_MODE               4
#define A6_MODE_SZ            2
#define A7_MODE               6
#define A7_MODE_SZ            2
#define B4_MODE               8
#define B4_MODE_SZ            2
#define B5_MODE              10
#define B5_MODE_SZ            2
#define B6_MODE              12
#define B6_MODE_SZ            2
#define B7_MODE              14
#define B7_MODE_SZ            2
#define BK0                  16
#define BK0_SZ                5
#define BK1                  21
#define BK1_SZ                5

/* CSR */
#define GIE                   0
#define PGIE                  1
#define DCC                   2
#define DCC_SZ                3
#define PCC                   5
#define PCC_SZ                3
#define EN                    8
#define SAT                   9
#define PWRD                 10
#define PWRD_SZ               6
#define REVISION_ID          16  /*C6711=00000010b*/
#define REVISION_ID_SZ        8
#define CPU_ID               24  /*C67x=10b       */
#define CPU_ID_SZ             8

/* Floating Configure Register       */

/* Floating Add Configure Register(FADCR)*/
#define NAN1L1                0
#define NAN2L1                1
#define DEN1L1                2
#define DEN2L1                3
#define INVALL1               4
#define INFOL1                5	
#define OVERL1                6
#define INEXL1                7
#define UNDERL1               8
#define RMODEL1               9
#define RMODEL1_SZ            2
#define NAN1L2                16
#define NAN2L2                17
#define DEN1L2                18
#define DEN2L2                19
#define INVALL2               20
#define INFOL2                21
#define OVERL2                22
#define INEXL2                23
#define UNDERL2               24
#define RMODEL2               25
#define RMODEL2_SZ            2

/* Floating Auxiliary Configure Register(FAUCR)*/
#define NAN1S1                0
#define NAN2S1                1
#define DEN1S1                2
#define DEN2S1                3
#define INVALS1               4
#define INFOS1                5	
#define OVERS1                6
#define INEXS1                7
#define UNDERS1               8
#define UNORDS1               9
#define DIV0S1                10
#define NAN1S2                16
#define NAN2S2                17
#define DEN1S2                18
#define DEN2S2                19
#define INVALS2               20
#define INFOS2                21	
#define OVERS2                22
#define INEXS2                23
#define UNDERS2               24
#define UNORDS2               25
#define DIV0S2                26

/* Floating Mulitply Configure Register(FMCR)*/
#define NAN1M1                0
#define NAN2M1                1
#define DEN1M1                2
#define DEN2M1                3
#define INVALM1               4
#define INFOM1                5	
#define OVERM1                6
#define INEXM1                7
#define UNDERM1               8
#define RMODEM1               9
#define RMODEM1_SZ            2
#define NAN1M2                16
#define NAN2M2                17
#define DEN1M2                18
#define DEN2M2                19
#define INVALM2               20
#define INFOM2                21
#define OVERM2                22
#define INEXM2                23
#define UNDERM2               24
#define RMODEM2               25
#define RMODEM2_SZ            2

/*----------------------------------------------------------------------------*/
/*        GLOBAL       VARIABLES                                              */
/*----------------------------------------------------------------------------*/

/* Importended registers needed to be saved during interrupts  */
struct SAVE_REGISTER
{
   volatile unsigned int       C6711_AMR;      		/* save/restore */
   volatile unsigned int       C6711_CSR;	 		/* save/restore */
   volatile unsigned int       C6711_IER;			/* save/restore */
   volatile unsigned int	   C6711_FADCR;          /* save/restore */		                            
   volatile unsigned int       C6711_FAUCR;          /* save/restore */
   volatile unsigned int       C6711_FMCR;           /* save/restore */
};

/*----------------------------------------------------------------------------*/
/*  MACRO FUNCTIONS:                                                          */
/*----------------------------------------------------------------------------*/

#define CONTENTS_OF(addr)    (*((volatile unsigned int *)(addr)))

#define LENGTH_TO_BITS(length)   (~(0xffffffff << (length)))

/* MACROS to SET, CLEAR and RETURN bits and bitfields in Memory Mapped        */
/* locations using the address of the specified register.                     */

/*     REG_READ          - Read register at specified address                 */
#define REG_READ(addr)     (CONTENTS_OF(addr))

/*     REG_WRITE         - Write to register at specified address             */
#define REG_WRITE(addr,val)    (CONTENTS_OF(addr) = (val))

/*     MASK_BIT          - Create (1's) mask for specified bit.               */
#define MASK_BIT(bit)     (1 << (bit))

/*     RESET_BIT         - Clears bit in register.                            */
#define RESET_BIT(addr,bit)   (CONTENTS_OF(addr) &= (~MASK_BIT(bit)))

/*     GET_BIT           - Returns bit value in register.                     */
#define GET_BIT(addr,bit)   ((CONTENTS_OF(addr) & MASK_BIT(bit)) ? 1 : 0)
        
/*     SET_BIT           - Sets bit in register.                              */
#define SET_BIT(addr,bit) \
    (CONTENTS_OF(addr) = (CONTENTS_OF(addr)) | (MASK_BIT(bit)))

/*     ASSIGN_BIT_VAL    - Assign bit to specified value                      */
#define ASSIGN_BIT_VAL(addr,bit,val) \
        ( (val) ? SET_BIT(addr,bit) : RESET_BIT(addr,bit) )

/*     MASK_FIELD        - Create (1's) mask for specified field              */
#define MASK_FIELD(bit,length) \
        (LENGTH_TO_BITS(length) << (bit))
        
/*     RESET_FIELD       - Clears field in register                           */
#define RESET_FIELD(addr,bit,length) \
        ( CONTENTS_OF(addr) &= (~MASK_FIELD(bit,length)))

/*     GET_FIELD         - Returns value of bit field in a register           */
#define GET_FIELD(addr,bit,length) \
       ((CONTENTS_OF(addr) & MASK_FIELD(bit,length)) >> bit)
       
/*     LOAD_FIELD        - Assigns bit field in register                      */
#define LOAD_FIELD(addr,val,bit,length) \
        (CONTENTS_OF(addr) = (CONTENTS_OF(addr) & (~MASK_FIELD(bit,length))) | (val<<bit))

/* MACROS to SET, CLEAR and RETURN bits and bitfields in Memory Mapped        */
/* and Non-Memory Mapped using register names.                                */

/*     GET_REG           - Returns value of non memory mapped register        */
#define GET_REG(reg)         (reg)

/*     SET_REG           - Sets value of a non memory mapped register         */
#define SET_REG(reg,val)     ((reg)= (val))

/*     GET_REG_BIT       - Return bit value in non memory mapped register     */
#define GET_REG_BIT(reg,bit)     ((reg) & MASK_BIT(bit) ? 1 : 0)
        
/*     SET_REG_BIT       - Sets bit in non memory mapped register             */
#define SET_REG_BIT(reg,bit)     ((reg) |= MASK_BIT(bit))

/*     RESET_REG_BIT     - Resets given bit in non memory mapped register     */
#define RESET_REG_BIT(reg,bit)     ((reg) &= (~MASK_BIT(bit)))

/*     GET_REG_FIELD     - Return value of specified register field           */
#define GET_REG_FIELD(reg,bit,length) \
        ((reg & MASK_FIELD(bit,length)) >> bit)

/*     LOAD_REG_FIELD    - Set value of specified register fiedl              */
#define LOAD_REG_FIELD(reg,val,bit,length) \
        (reg &= (~MASK_FIELD(bit,length)) | (val<<bit))

/*****************************************************************************/
/* SAVE_AMR -                                                                */
/*     Define a local 'volatile unsigned int' variable in your interrupt     */
/*     routine.                                                              */
/*     When invoking this macro, pass that local variable to save the AMR.   */
/*                                                                           */
/*     If you interrupted an assembly coded routine that may be using        */
/*     circular addressing, and you interrupt into a C coded interrupt       */
/*     service routine, you need to set the AMR to 0 for the C code and save */
/*     off the AMR register, so that it will have the correct value upon     */
/*     leaving the C interrupt service routine and returning to the assembly */
/*     code.                                                                 */
/*                                                                           */
/*     Add this routine immediately after your local variable definitions    */
/*     and before the start of your C interrupt code.                        */
/*****************************************************************************/
#define SAVE_AMR(temp_AMR)  (temp_AMR = AMR;AMR = 0;)                                                   
                                                              
/*****************************************************************************/
/* RESTORE_AMR -                                                             */
/*    When invoking this macro, pass the same local variable that was passed */
/*    to the SAVE_AMR macro.  This macro will restore the AMR to the value   */
/*    it had when interrupted out of the hand assembly routine.              */
/*                                                                           */
/*    Add this macro immediately before exiting the C interrupt service      */
/*    routine.                                                               */ 
/*****************************************************************************/
#define RESTORE_AMR(temp_AMR)  (AMR = temp_AMR; )                                              
                                                                          
/*****************************************************************************/
/* SAVE_SAT -                                                                */
/*     Define a local 'volatile unsigned int' variable in your interrupt     */
/*     routine.                                                              */
/*     When invoking this macro, pass that local variable to save the SAT    */
/*     bit.                                                                  */
/*                                                                           */
/*     If you interrupted a routine that was performing saturated arithmetic */
/*     and the interrupt service routine is also performing saturated        */
/*     arithmetic, then you must save and restore the SAT bit in your        */
/*     interrupt service routine.                                            */
/*                                                                           */
/*     Add this routine immediately after your local variable definitions    */
/*     and before the start of your C interrupt code.                        */
/*****************************************************************************/
#define SAVE_SAT(temp_SAT)    ( temp_SAT = _extu(CSR, 22, 31);) 
                                                      
/*****************************************************************************/
/* RESTORE_SAT -                                                             */
/*    When invoking this macro, pass the same local variable that was passed */
/*    to the SAVE_SAT macro.  This macro will restore the SAT bit to the     */
/*    value it had when your application was interrupted.                    */
/*                                                                           */
/*    Add this macro immediately before exiting the C interrupt service      */
/*    routine.                                                               */ 
/*****************************************************************************/
#define RESTORE_SAT(temp_SAT) (CSR &= _clr(CSR, 9, 9); \
                              temp_SAT = _sshl(temp_SAT, 31);)                                     
                                                          
#endif /*_REGS_H_*/