sys_dma.c

手机GSM TI 平台 dma 驱动 源代码

    *
    *  Argument              Type                 IO  Description
    *  ----------          ----------               --  -------------------------------------------
    *  p_dma_channel_parameter    T_DMA_TYPE_CHANNEL_PARAMETER *     I  Pointer on data structure containing all the parameter to setup a channel  
    *
    *
    *
    * RETURN VALUE: None
    *
    *****************************************************************************/
    void f_dma_channel_parameter_set(T_DMA_TYPE_CHANNEL_PARAMETER    *p_dma_channel_parameter)
       {
        SYS_UWORD16 d_temp_register;

        F_DMA_CHANNEL_DISABLE(p_dma_channel_parameter->d_dma_channel_number);

        d_temp_register=F_DMA_GET_CHANNEL_IT_STATUS(p_dma_channel_parameter->d_dma_channel_number);
        
        pf_dma_call_back_address[p_dma_channel_parameter->d_dma_channel_number]=p_dma_channel_parameter->pf_dma_call_back_address;



        if (p_dma_channel_parameter->d_dma_channel_secured==C_DMA_CHANNEL_SECURED)
          {
            C_DMA_SCR_REG |= (C_DMA_CHANNEL_SECURED << p_dma_channel_parameter->d_dma_channel_number);
          }

        else
          {
            C_DMA_SCR_REG &= ~( C_DMA_CHANNEL_SECURED << p_dma_channel_parameter->d_dma_channel_number );
          }

        C_DMA_CSDP_REG(p_dma_channel_parameter->d_dma_channel_number) = (

          (p_dma_channel_parameter->d_dma_channel_data_type    << C_DMA_CSDP_DATA_TYPE_POS )
        | (p_dma_channel_parameter->d_dma_channel_src_port    << C_DMA_CSDP_SRC_POS )
        | (p_dma_channel_parameter->d_dma_src_channel_packed  << C_DMA_CSDP_SRC_PACK_POS )
        | (p_dma_channel_parameter->d_dma_src_channel_burst_en  << C_DMA_CSDP_SRC_BURST_EN_POS )
        | (p_dma_channel_parameter->d_dma_channel_dst_port    << C_DMA_CSDP_DST_POS )
        | (p_dma_channel_parameter->d_dma_dst_channel_packed  << C_DMA_CSDP_DST_PACK_POS )
        | (p_dma_channel_parameter->d_dma_dst_channel_burst_en  << C_DMA_CSDP_DST_BURST_EN_POS )
                                 );

        C_DMA_CCR_REG(p_dma_channel_parameter->d_dma_channel_number) &= ~C_DMA_CCR_SYNC_MASK;



        C_DMA_CCR_REG(p_dma_channel_parameter->d_dma_channel_number) = (

          (p_dma_channel_parameter->d_dma_channel_hw_synch     << C_DMA_CCR_SYNC_POS  )
        | (p_dma_channel_parameter->d_dma_channel_priority     << C_DMA_CCR_PRIO_POS  )
        | (p_dma_channel_parameter->d_dma_channel_auto_init    << C_DMA_CCR_AUTO_INIT_POS  )
        | (p_dma_channel_parameter->d_dma_channel_fifo_flush   << C_DMA_CCR_FIFO_FLUSH_POS )
        | (p_dma_channel_parameter->d_dma_src_channel_addr_mode  << C_DMA_CCR_SRC_AMODE_POS  )
        | (p_dma_channel_parameter->d_dma_dst_channel_addr_mode  << C_DMA_CCR_DST_AMODE_POS  )
                                );

        C_DMA_CICR_REG(p_dma_channel_parameter->d_dma_channel_number) = (  

          (p_dma_channel_parameter->d_dma_channel_it_time_out  << C_DMA_CICR_TOUT_IE_POS  )
        | (p_dma_channel_parameter->d_dma_channel_it_drop      << C_DMA_CICR_DROP_IE_POS  )
        | (p_dma_channel_parameter->d_dma_channel_it_frame     <<C_DMA_CICR_FRAME_IE_POS  )                     
        | (p_dma_channel_parameter->d_dma_channel_it_block     << C_DMA_CICR_BLOCK_IE_POS  )
        | (p_dma_channel_parameter->d_dma_channel_it_half_block  << C_DMA_CICR_HALF_BLOCK_IE_POS  )
                                );

        C_DMA_CSSA_L_REG(p_dma_channel_parameter->d_dma_channel_number)= (p_dma_channel_parameter->d_dma_channel_src_address ); /* is a mask requested ? */


        C_DMA_CSSA_U_REG(p_dma_channel_parameter->d_dma_channel_number)= (p_dma_channel_parameter->d_dma_channel_src_address >> 16 ); /* is a mask requested ? */


        C_DMA_CDSA_L_REG(p_dma_channel_parameter->d_dma_channel_number)= (p_dma_channel_parameter->d_dma_channel_dst_address); /* is a mask requested ? */


        C_DMA_CDSA_U_REG(p_dma_channel_parameter->d_dma_channel_number)=  (p_dma_channel_parameter->d_dma_channel_dst_address >> 16 ); /* is a mask requested ? */

        C_DMA_CEN_REG(p_dma_channel_parameter->d_dma_channel_number) = (p_dma_channel_parameter->d_dma_channel_element_number );

        C_DMA_CFN_REG(p_dma_channel_parameter->d_dma_channel_number) = (p_dma_channel_parameter->d_dma_channel_frame_number );


        } /*f_dma_channel_parameter_set() */

    /******************************************************************************
    *
    *  FUNCTION NAME: f_dma_channel_enable 
    *    This function is used to enable a DMA transfer of a channel which could be depending on a hardware request.
    *  If there is no hardware request, the transfer starts immediately.
    *
    *  ARGUMENT LIST:
    *
    *  Argument          Type            IO  Description
    *  ----------        ----------          --  -------------------------------------------
    *  d_dma_channel_number  T_DMA_TYPE_CHANNEL_NUMBER  I  Variable to define which channel is enabled.
    *
    *
    *
    * RETURN VALUE: None
    *
    *****************************************************************************/
    void f_dma_channel_enable (T_DMA_TYPE_CHANNEL_NUMBER d_dma_channel_number)  
      {
      F_DMA_CHANNEL_ENABLE(d_dma_channel_number);
      }/* f_dma_channel_enable() */

    /******************************************************************************
    *
    *  FUNCTION NAME: f_dma_channel_disable
    *   This function is used to disable a DMA transfer of a channel
    *
    *
    *  ARGUMENT LIST:
    *
    *  Argument          Type            IO  Description
    *  ----------        ----------          --  -------------------------------------------
    *  d_dma_channel_number  T_DMA_TYPE_CHANNEL_NUMBER  I  Variable to define which channel is disabled.
    *
    *
    *
    * RETURN VALUE: None
    *
    *****************************************************************************/
    void f_dma_channel_disable(T_DMA_TYPE_CHANNEL_NUMBER d_dma_channel_number)  
      {
      F_DMA_CHANNEL_DISABLE(d_dma_channel_number);
      } /*f_dma_channel_disable() */

    /******************************************************************************
    *
    *  FUNCTION NAME: f_dma_channel_auto_init_disable
    *    This function is disabling the auto-initialization mode of the channel.
    *    The channel completes the current transfer and stops.
    *
    *  ARGUMENT LIST:
    *
    *  Argument          Type            IO  Description
    *  ----------        ----------          --  -------------------------------------------
    *  d_dma_channel_number  T_DMA_TYPE_CHANNEL_NUMBER  I  Variable to define which channel is disabled from auto-init mode.
    *
    *
    * RETURN VALUE: None
    *
    *****************************************************************************/
    void f_dma_channel_auto_init_disable(T_DMA_TYPE_CHANNEL_NUMBER d_dma_channel_number)
      {
      F_DMA_CHANNEL_AUTO_INIT_DISABLE(d_dma_channel_number);
      } /* f_dma_channel_auto_init_disable */

    /******************************************************************************
    *
    *  FUNCTION NAME: f_dma_get_channel_counter
    *      This function can be used to monitor address
    *    where the last data of a frame has been written.
    *    This function provides only the lowest16 bits of the address.
    *
    *
    *  ARGUMENT LIST:
    *
    *  Argument           Type              IO  Description
    *  ----------         ----------            --  -------------------------------------------
    *  d_dma_channel_number  T_DMA_TYPE_CHANNEL_NUMBER    I    Variable to define from which channel, we get the counter.    
    *
    * RETURN VALUE: None
    *
    *****************************************************************************/
    SYS_UWORD16  f_dma_get_channel_counter(T_DMA_TYPE_CHANNEL_NUMBER d_dma_channel_number)
        {
        return(F_DMA_GET_CHANNEL_COUNTER(d_dma_channel_number));
        } /*f_dma_get_channel_counter() */

    /******************************************************************************
    *
    *  FUNCTION NAME: f_dma_channel_soft_reset
    *      perform a soft reset of the following parameter of the channel :
    *      Source address,Destination address,Element number,Frame number,Channel counter
    *  
    * 
    *
    *  ARGUMENT LIST:
    *
    *  Argument          Type              IO  Description
    *  ----------        ----------            --  -------------------------------------------
    *  d_dma_channel_number       T_DMA_TYPE_CHANNEL_NUMBER    I   Variable to define which channel is soft reset.
    *  
    *
    * RETURN VALUE: None
    *
    *****************************************************************************/
    void f_dma_channel_soft_reset(T_DMA_TYPE_CHANNEL_NUMBER d_dma_channel_number)
       {
       C_DMA_SRR_REG |= ( 0x1 << d_dma_channel_number);

       while (C_DMA_SRR_REG & ( 0x1 << d_dma_channel_number))   /* wait for the reset is completed */
            {
            }

       } /*f_dma_channel_soft_reset() */
  #endif /* (CHIPSET == 12) */