📄 r8c2a.h
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#define pu10 pur1_addr.bit.b0 /* P43 pull-up */
#define pu11 pur1_addr.bit.b1 /* P44, P45 pull-up */
#define pu12 pur1_addr.bit.b2 /* P50 to P53 pull-up */
#define pu13 pur1_addr.bit.b3 /* P54 to P57 pull-up */
#define pu14 pur1_addr.bit.b4 /* P60 to P63 pull-up */
#define pu15 pur1_addr.bit.b5 /* P64 to P67 pull-up */
/*------------------------------------------------------
Pull-up control register2
------------------------------------------------------*/
union byte_def pur2_addr;
#define pur2 pur2_addr.byte
#define pu22 pur2_addr.bit.b2 /* P80 to P83 pull-up */
#define pu23 pur2_addr.bit.b3 /* P84 to P86 pull-up */
/*------------------------------------------------------
Timer RA control register
------------------------------------------------------*/
union byte_def tracr_addr;
#define tracr tracr_addr.byte
#define tstart_tracr tracr_addr.bit.b0 /* Timer RA count start bit */
#define tcstf_tracr tracr_addr.bit.b1 /* Timer RA count status flag */
#define tstop_tracr tracr_addr.bit.b2 /* Timer RA count forcible stop bit */
#define tedgf_tracr tracr_addr.bit.b4 /* Active edge judgment flag */
#define tundf_tracr tracr_addr.bit.b5 /* Timer RA underflow flag */
/*------------------------------------------------------
Timer RA I/O control register
------------------------------------------------------*/
union byte_def traioc_addr;
#define traioc traioc_addr.byte
#define tedgsel_traioc traioc_addr.bit.b0 /* TRAIO polarity switch bit */
#define topcr_traioc traioc_addr.bit.b1 /* TRAIO output control bit */
#define toena_traioc traioc_addr.bit.b2 /* TRAO output enable bit */
#define tiosel_traioc traioc_addr.bit.b3 /* INT1/TRAIO select bit */
#define tipf0_traioc traioc_addr.bit.b4 /* TRAIO input filter select bit */
#define tipf1_traioc traioc_addr.bit.b5 /* TRAIO input filter select bit */
/*------------------------------------------------------
Timer RA mode register
------------------------------------------------------*/
union byte_def tramr_addr;
#define tramr tramr_addr.byte
#define tmod0_tramr tramr_addr.bit.b0 /* Timer RA operation mode select bit */
#define tmod1_tramr tramr_addr.bit.b1 /* Timer RA operation mode select bit */
#define tmod2_tramr tramr_addr.bit.b2 /* Timer RA operation mode select bit */
#define tck0_tramr tramr_addr.bit.b4 /* Timer RA count source select bit */
#define tck1_tramr tramr_addr.bit.b5 /* Timer RA count source select bit */
#define tck2_tramr tramr_addr.bit.b6 /* Timer RA count source select bit */
#define tckcut_tramr tramr_addr.bit.b7 /* Timer RA count source cutoff bit */
/*------------------------------------------------------
Timer RA prescaler register
------------------------------------------------------*/
union byte_def trapre_addr;
#define trapre trapre_addr.byte
/*------------------------------------------------------
Timer RA register
------------------------------------------------------*/
union byte_def tra_addr;
#define tra tra_addr.byte
/*------------------------------------------------------
LIN special function register
------------------------------------------------------*/
union byte_def lincr2_addr;
#define lincr2 lincr2_addr.byte
#define bce_lincr2 lincr2_addr.bit.b0 /* When Synch Break send, bus collision detection effective bit */
/*------------------------------------------------------
LIN control register
------------------------------------------------------*/
union byte_def lincr_addr;
#define lincr lincr_addr.byte
#define sfie_lincr lincr_addr.bit.b0 /* Synchronous field measurementcompleted interrupt enable bit */
#define sbie_lincr lincr_addr.bit.b1 /* Synchronous break detection interrupt enable bit */
#define bcie_lincr lincr_addr.bit.b2 /* Bus collision detection interrupt enable bit */
#define rxdsf_lincr lincr_addr.bit.b3 /* RxD0 input status flag */
#define lstart_lincr lincr_addr.bit.b4 /* Synchronous Break detection start bit */
#define sbe_lincr lincr_addr.bit.b5 /* RxD0 input unmasking timing select bit */
#define mst_lincr lincr_addr.bit.b6 /* LIN operation mode setting bit */
#define line_lincr lincr_addr.bit.b7 /* LIN operation start bit */
/*------------------------------------------------------
LIN status register
------------------------------------------------------*/
union byte_def linst_addr;
#define linst linst_addr.byte
#define sfdct_linst linst_addr.bit.b0 /* Synchronous field measurementcompleted flag */
#define sbdct_linst linst_addr.bit.b1 /* Synchronous break detection flag */
#define bcdct_linst linst_addr.bit.b2 /* Bus collision detection flag */
#define b0clr_linst linst_addr.bit.b3 /* SFDCT flag clear bit */
#define b1clr_linst linst_addr.bit.b4 /* SBDCT flag clear bit */
#define b2clr_linst linst_addr.bit.b5 /* BCDCT flag clear bit */
/*------------------------------------------------------
Timer RB control register
------------------------------------------------------*/
union byte_def trbcr_addr;
#define trbcr trbcr_addr.byte
#define tstart_trbcr trbcr_addr.bit.b0 /* Timer RB count start bit */
#define tcstf_trbcr trbcr_addr.bit.b1 /* Timer RB count status flag */
#define tstop_trbcr trbcr_addr.bit.b2 /* Timer RB count forcible stop bit */
/*------------------------------------------------------
Timer RB one shot control register
------------------------------------------------------*/
union byte_def trbocr_addr;
#define trbocr trbocr_addr.byte
#define tosst_trbocr trbocr_addr.bit.b0 /* Timer RB one-shot start bit */
#define tossp_trbocr trbocr_addr.bit.b1 /* Timer RB one-shot stop bit */
#define tosstf_trbocr trbocr_addr.bit.b2 /* Timer RB one-shot status flag */
/*------------------------------------------------------
Timer RB I/O control register
------------------------------------------------------*/
union byte_def trbioc_addr;
#define trbioc trbioc_addr.byte
#define topl_trbioc trbioc_addr.bit.b0 /* Timer RB output level select bit */
#define tocnt_trbioc trbioc_addr.bit.b1 /* Timer RB output switch bit */
#define inostg_trbioc trbioc_addr.bit.b2 /* One-shot trigger control bit */
#define inoseg_trbioc trbioc_addr.bit.b3 /* One-shot trigger polarity select bit */
/*------------------------------------------------------
Timer RB mode register
------------------------------------------------------*/
union byte_def trbmr_addr;
#define trbmr trbmr_addr.byte
#define tmod0_trbmr trbmr_addr.bit.b0 /* Timer RB operating mode select bit */
#define tmod1_trbmr trbmr_addr.bit.b1 /* Timer RB operating mode select bit */
#define twrc_trbmr trbmr_addr.bit.b3 /* Timer RB write control bit */
#define tck0_trbmr trbmr_addr.bit.b4 /* Timer RB count source select bit */
#define tck1_trbmr trbmr_addr.bit.b5 /* Timer RB count source select bit */
#define tckcut_trbmr trbmr_addr.bit.b7 /* Timer RB count source cutoff bit */
/*------------------------------------------------------
Timer RB prescaler register
------------------------------------------------------*/
union byte_def trbpre_addr;
#define trbpre trbpre_addr.byte
/*------------------------------------------------------
Timer RB secondary register
------------------------------------------------------*/
union byte_def trbsc_addr;
#define trbsc trbsc_addr.byte
/*------------------------------------------------------
Timer RB Primary Register
------------------------------------------------------*/
union byte_def trbpr_addr;
#define trbpr trbpr_addr.byte
/*------------------------------------------------------
Timer RE seconds data register / Timer RE counter data register
------------------------------------------------------*/
union byte_def tresec_addr;
#define tresec tresec_addr.byte
#define sc00_tresec tresec_addr.bit.b0 /* 1st digit of seconds count bits */
#define sc01_tresec tresec_addr.bit.b1 /* 1st digit of seconds count bits */
#define sc02_tresec tresec_addr.bit.b2 /* 1st digit of seconds count bits */
#define sc03_tresec tresec_addr.bit.b3 /* 1st digit of seconds count bits */
#define sc10_tresec tresec_addr.bit.b4 /* 2nd digit of seconds count bits */
#define sc11_tresec tresec_addr.bit.b5 /* 2nd digit of seconds count bits */
#define sc12_tresec tresec_addr.bit.b6 /* 2nd digit of seconds count bits */
#define bsy_tresec tresec_addr.bit.b7 /* Timer RE busy flag */
/*------------------------------------------------------
Timer RE minutes data register / Timer RE compare data register
------------------------------------------------------*/
union byte_def tremin_addr;
#define tremin tremin_addr.byte
#define mn00_tremin tremin_addr.bit.b0 /* 1st digit of minutes count bits */
#define mn01_tremin tremin_addr.bit.b1 /* 1st digit of minutes count bits */
#define mn02_tremin tremin_addr.bit.b2 /* 1st digit of minutes count bits */
#define mn03_tremin tremin_addr.bit.b3 /* 1st digit of minutes count bits */
#define mn10_tremin tremin_addr.bit.b4 /* 2nd digit of minutes count bits */
#define mn11_tremin tremin_addr.bit.b5 /* 2nd digit of minutes count bits */
#define mn12_tremin tremin_addr.bit.b6 /* 2nd digit of minutes count bits */
#define bsy_tremin tremin_addr.bit.b7 /* Timer RE busy flag */
/*------------------------------------------------------
Timer RE Hours Data Register
------------------------------------------------------*/
union byte_def trehr_addr;
#define trehr trehr_addr.byte
#define hr00_trehr trehr_addr.bit.b0 /* 1st digit of hours count bits */
#define hr01_trehr trehr_addr.bit.b1 /* 1st digit of hours count bits */
#define hr02_trehr trehr_addr.bit.b2 /* 1st digit of hours count bits */
#define hr03_trehr trehr_addr.bit.b3 /* 1st digit of hours count bits */
#define hr10_trehr trehr_addr.bit.b4 /* 2nd digit of hours count bits */
#define hr11_trehr trehr_addr.bit.b5 /* 2nd digit of hours count bits */
#define bsy_trehr trehr_addr.bit.b7 /* Timer RE busy flag */
/*------------------------------------------------------
Timer RE Days of Week Data Register
------------------------------------------------------*/
union byte_def trewk_addr;
#define trewk trewk_addr.byte
#define wk0_trewk trewk_addr.bit.b0 /* Days of week count bits */
#define wk1_trewk trewk_addr.bit.b1 /* Days of week count bits */
#define wk2_trewk trewk_addr.bit.b2 /* Days of week count bits */
#define bsy_trewk trewk_addr.bit.b7 /* Timer RE busy flag */
/*------------------------------------------------------
Timer RE control register1
------------------------------------------------------*/
union byte_def trecr1_addr;
#define trecr1 trecr1_addr.byte
#define tcstf_trecr1 trecr1_addr.bit.b1 /* Timer RE count status flag */
#define toena_trecr1 trecr1_addr.bit.b2 /* TREO pin output enable bit */
#define int_trecr1 trecr1_addr.bit.b3 /* Interrupt request timing bit */
#define trerst_trecr1 trecr1_addr.bit.b4 /* Timer RE reset bit */
#define pm_trecr1 trecr1_addr.bit.b5 /* A.M. / P.M. bit */
#define h12_h24_trecr1 trecr1_addr.bit.b6 /* Operating mode select bit */
#define tstart_trecr1 trecr1_addr.bit.b7 /* Timer RE count start bit */
/*------------------------------------------------------
Timer RE control register2
------------------------------------------------------*/
union byte_def trecr2_addr;
#define trecr2 trecr2_addr.byte
#define seie_trecr2 trecr2_addr.bit.b0 /* Periodic interrupt triggered every second enable bit */
#define mnie_trecr2 trecr2_addr.bit.b1 /* Periodic interrupt triggered every minute enable bit */
#define hrie_trecr2 trecr2_addr.bit.b2 /* Periodic interrupt triggered every hour enable bit */
#define dyie_trecr2 trecr2_addr.bit.b3 /* Periodic interrupt triggered every day enable bit */
#define wkie_trecr2 trecr2_addr.bit.b4 /* Periodic interrupt triggered every week enable bit */
#define comie_trecr2 trecr2_addr.bit.b5 /* Compare match interrupt enable bit */
/*------------------------------------------------------
Timer RE count source select register
------------------------------------------------------*/
union byte_def trecsr_addr;
#define trecsr trecsr_addr.byte
#define rcs0_trecsr trecsr_addr.bit.b0 /* Count source select bit */
#define rcs1_trecsr trecsr_addr.bit.b1 /* Count source select bit */
#define rcs2_trecsr trecsr_addr.bit.b2 /* 4-Bit counter select bit */
#define rcs3_trecsr trecsr_addr.bit.b3 /* Real-Time clock mode select bit */
#define rcs5_trecsr trecsr_addr.bit.b5 /* Clock output select bit */
#define rcs6_trecsr trecsr_addr.bit.b6 /* Clock output select bit */
/*------------------------------------------------------
Timer RC mode register
------------------------------------------------------*/
union byte_def trcmr_addr;
#define trcmr trcmr_addr.byte
#define pwmb_trcmr trcmr_addr.bit.b0 /* TRCIOB PWM mode select bit */
#define pwmc_trcmr trcmr_addr.bit.b1 /* TRCIOC PWM mode select bit */
#define pwmd_trcmr trcmr_addr.bit.b2 /* TRCIOD PWM mode select bit */
#define pwm2_trcmr trcmr_addr.bit.b3 /* PWM2 mode select bit */
#define bfc_trcmr trcmr_addr.bit.b4 /* TRCGRC register function selection bit */
#define bfd_trcmr trcmr_addr.bit.b5 /* TRCGRD register function selection bit */
#define tstart_trcmr trcmr_addr.bit.b7 /* TRC count start bit */
/*------------------------------------------------------
Timer RC control register 1
------------------------------------------------------*/
union byte_def trccr1_addr;
#define trccr1 trccr1_addr.byte
#define toa_trccr1 trccr1_addr.bit.b0 /* TRCIOA output level select bit */
#define tob_trccr1 trccr1_addr.bit.b1 /* TRCIOB output level select bit */
#define toc_trccr1 trccr1_addr.bit.b2 /* TRCIOC output level select bit */
#define tod_trccr1 trccr1_addr.bit.b3 /* TRCIOD output level select bit */
#define tck0_trccr1 trccr1_addr.bit.b4 /* Count source selection bit */
#define tck1_trccr1 trccr1_addr.bit.b5 /* Count source selection bit */
#define tck2_trccr1 trccr1_addr.bit.b6 /* Count source selection bit */
#define cclr_trccr1 trccr1_addr.bit.b7 /* TRC counter clear select bit */
/*------------------------------------------------------
Timer RC interrupt enable register
------------------------------------------------------*/
union byte_def trcier_addr;
#define trcier trcier_addr.byte
#define imiea_trcier trcier_addr.bit.b0 /* Input capture / compare match interrupt enable bit A */
#define imieb_trcier trcier_addr.bit.b1 /* Input capture / compare match i⌨️ 快捷键说明
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