board.cmd

Real-Time Digital Signal Processing Implementations, Applications, and Experiments with the TMS320C

/* File         :    board.cmd

   Description  :    TMS320VC5510 EVM link loader control file.

   Targets      :    TMS320C55XX.

   Conditions   :    None.

   Restrictions :    The memory definitions MUST be preserved: VECS, XFER, XFERHDR
                     and FIFO. FIFO is important for proper function of the HPI 
                     implemented FIFO.

   Date         :    12/3/2001
*/

-stack    0x4000      /* Primary stack size   */
-sysstack 0x2000      /* Secondary stack size */

/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
	PAGE 0:  /* ---- Unified Program/Data Address Space  (bytes)---- */

	MMR		(RIX)  : o = 0x000000, l = 0x000100	/* MMRs									*/
	VECS    (RWIX) : o = 0x000100, l = 0x000100 /* 256-byte int vector					*/	
    DARAM0  (RWIX) : o = 0x000200, l = 0x007e00 /* (32Kbytes - 0x200 bytes) page of DARAM*/
	DARAM1	(RWIX) : o = 0x008002, l = 0x007ffd	/* 32Kbytespage of DARAM            	*/
	HPIBOOT	(RWIX) : o = 0x010000, l = 0x000004	/* 4 bytes for HPI boot branch Instr    */
    SARAM0  (RWIX) : o = 0x010004, l = 0x00fffc /* 64Kbytes - 4 bytes page of SARAM     */
    SARAM1  (RWIX) : o = 0x020000, l = 0x010000 /* 64Kbytes page of SARAM               */
	SARAM2	(RWIX) : o = 0x030000, l = 0x010000	/* 64Kbytes page of SARAM				*/
	SARAM3	(RWIX) : o = 0x040000, l = 0x00bf60	/* 64Kbytes -  page of SARAM			*/
    FIFO    (RWXI) : o = 0x04bf60, l = 0x0000a0	/* reserve 0xa0 bytes for FIFO      	*/      
    XFER    (RWXI) : o = 0x04c000, l = 0x003f80	/* reserve 0x4000 bytes for comm kernel	*/      
    XFERHDR (RWI)  : o = 0x04ff80, l = 0x000080 /* 0x3F80 code & 0x80 header            */
    SBSRAM  (RWIX) : o = 0x050000, l = 0x100000 /* 1Mbyte SBSRAM                        */
    FLASH   (RIX)  : o = 0x400000, l = 0x100000 /* 1Mbyte Flash                         */
	PDROM   (R)	   : o = 0xff8000, l = 0x010000	/* 64Kbytes page of PDROM				*/

	PAGE 1:  /* -------- 64K-word I/O Address Space -------- */

	IOPORT (RWI)   : o = 0x000000, l = 0x020000
}
 
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
SECTIONS
{
   .vectors  > SARAM0 align 0x100 PAGE 0  /* Interrupt vectors */
   .text     > SARAM3 PAGE 0  /* Code                       */

   DEMOCODE  > SARAM3 PAGE 0  /* Code                       */
   EVM5510   > SARAM3 PAGE 0  /* Code                       */
   DRV5510   > SARAM3 PAGE 0  /* Code                       */

   DEMODATA  > SARAM1 PAGE 0  /* Global & static vars       */
   EVMDATA   > SARAM1 PAGE 0  /* Global & static vars       */

   .bss      > SARAM0 PAGE 0  /* Global & static vars       */
   .data     > SARAM0 PAGE 0  /* Initialized vars           */
   .const    > SARAM0 PAGE 0  /* Constant data              */
   .sysmem   > SARAM0 PAGE 0  /* Dynamic memory (malloc)    */
   .stack    > SARAM0 PAGE 0  /* Primary system stack       */
   .sysstack > SARAM0 PAGE 0  /* Secondary system stack     */
   .switch   > SARAM0 PAGE 0  /* Switch statement tables    */
   .cinit    > SARAM0 PAGE 0  /* Auto-initialization tables */
   .cio      > SARAM0 PAGE 0  /* C I/O buffers              */
   .fifo     > FIFO   PAGE 0  /* C I/O buffers              */

   .ioport   > IOPORT PAGE 1  /* Global & static IO vars    */
}