📄 dsk_app.c
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MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 220);
hMcbsp1 = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);
/* Configure the codec to match the ad da data format */
MCBSP_config(hMcbsp1, &mcbspCfg1);
/* Start the McBSP running */
MCBSP_start(hMcbsp1, MCBSP_RCV_START |
MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 220);
}
/*
* initIrq() - Initialize and enable the DMA receive interrupt using the CSL.
* The interrupt service routine for this interrupt is edmaHwi.
*/
void initIrq(void)
{
/* Enable EDMA interrupts to the CPU */
IRQ_clear(IRQ_EVT_EDMAINT); // Clear any pending EDMA interrupts
IRQ_clear(IRQ_EVT_GPINT0);
IRQ_enable(IRQ_EVT_EDMAINT); // Enable EDMA interrupt
IRQ_enable(IRQ_EVT_GPINT0);
}
/*
* initEdma() - Initialize the DMA controller. Use linked transfers to
* automatically transition from ping to pong and visa-versa.
*/
void initEdma(void)
{
/* Configure transmit channel */
hEdmaXmt = EDMA_open(EDMA_CHA_XEVT0, EDMA_OPEN_RESET); // get hEdmaXmt handle and reset channel
hEdmaReloadXmtPing = EDMA_allocTable(-1); // get hEdmaReloadXmtPing handle
hEdmaReloadXmtPong = EDMA_allocTable(-1); // get hEdmaReloadXmtPong handle
gEdmaConfigXmt.dst = MCBSP_getXmtAddr(hMcbsp0); // set the desination address to McBSP1 DXR
gXmtChan = EDMA_intAlloc(-1); // get an open TCC
gEdmaConfigXmt.opt |= EDMA_FMK(OPT,TCC,gXmtChan); // set TCC to gXmtChan
EDMA_config(hEdmaXmt, &gEdmaConfigXmt); // then configure the registers
EDMA_config(hEdmaReloadXmtPing, &gEdmaConfigXmt); // and the reload for Ping
gEdmaConfigXmt.src = EDMA_SRC_OF(gBufferXmtPong); // change the structure to have a source of Pong
EDMA_config(hEdmaReloadXmtPong, &gEdmaConfigXmt); // and configure the reload for Pong
EDMA_link(hEdmaXmt,hEdmaReloadXmtPong); // link the regs to Pong
EDMA_link(hEdmaReloadXmtPong,hEdmaReloadXmtPing); // link Pong to Ping
EDMA_link(hEdmaReloadXmtPing,hEdmaReloadXmtPong); // and link Ping to Pong
/* Configure receive channel */
hEdmaRcv = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET); // get hEdmaRcv handle and reset channel
hEdmaReloadRcvPing = EDMA_allocTable(-1); // get hEdmaReloadRcvPing handle
hEdmaReloadRcvPong = EDMA_allocTable(-1); // get hEdmaReloadRcvPong handle
gEdmaConfigRcv.src = MCBSP_getRcvAddr(hMcbsp1); // and the desination address to McBSP1 DXR
gRcvChan = EDMA_intAlloc(-1); // get an open TCC
gEdmaConfigRcv.opt |= EDMA_FMK(OPT,TCC,gRcvChan); // set TCC to gRcvChan
EDMA_config(hEdmaRcv, &gEdmaConfigRcv); // then configure the registers
EDMA_config(hEdmaReloadRcvPing, &gEdmaConfigRcv); // and the reload for Ping
gEdmaConfigRcv.dst = EDMA_DST_OF(gBufferRcvPong); // change the structure to have a destination of Pong
EDMA_config(hEdmaReloadRcvPong, &gEdmaConfigRcv); // and configure the reload for Pong
EDMA_link(hEdmaRcv,hEdmaReloadRcvPong); // link the regs to Pong
EDMA_link(hEdmaReloadRcvPong,hEdmaReloadRcvPing); // link Pong to Ping
EDMA_link(hEdmaReloadRcvPing,hEdmaReloadRcvPong); // and link Ping to Pong
/* Enable interrupts in the EDMA controller */
EDMA_intClear(gXmtChan);
EDMA_intClear(gRcvChan); // clear any possible spurious interrupts
EDMA_intEnable(gXmtChan); // enable EDMA interrupts (CIER)
EDMA_intEnable(gRcvChan); // enable EDMA interrupts (CIER)
EDMA_enableChannel(hEdmaXmt); // enable EDMA channel
EDMA_enableChannel(hEdmaRcv); // enable EDMA channel
/* Do a dummy write to generate the first McBSP transmit event */
MCBSP_write(hMcbsp0, 0x1000<<12);
}
/* ---------------------- Interrupt Service Routines -------------------- */
/*
* edmaHwi() - Interrupt service routine for the DMA transfer. It is
* triggered when a complete DMA receive frame has been
* transferred. The edmaHwi ISR is inserted into the interrupt
* vector table at compile time through a setting in the DSP/BIOS
* configuration under Scheduling --> HWI --> HWI_INT8. edmaHwi
* uses the DSP/BIOS Dispatcher to save register state and make
* sure the ISR co-exists with other DSP/BIOS functions.
*/
interrupt void c_int08(void)
{
static Uint32 pingOrPong = PING; // Ping-pong state variable
static Int16 xmtdone = 0, rcvdone = 0;
static short times=0;
/* Check CIPR to see which transfer completed */
if (EDMA_intTest(gXmtChan))
{
//printf("DAC xmt done\n");
EDMA_intClear(gXmtChan);
xmtdone = 1;
}
if (EDMA_intTest(gRcvChan))
{
//printf("DAC Rcv done\n");
EDMA_intClear(gRcvChan);
rcvdone = 1;
}
if (xmtdone && rcvdone)
{ if (pingOrPong==PING)
{
processBuffer(PING);
pingOrPong = PONG;
} else
{
processBuffer(PONG);
pingOrPong = PING;
}
rcvdone = 0;
xmtdone = 0;
/******************LED+WDG****************/
times++;
if(times == 32)
{
led_paoma_flag=1;
times = 0;
}
wdg_flag=1;
/*********************************/
}
}
void mypll_init(void)
{
/* Put PLL in bypass */
PLL_bypass();
Delay(20);
/* Reset the PLL */
PLL_reset();
Delay(20);
/* Set main multiplier/divisor */
PLL_RSET(PLLM, 8); // 50MHz x 8 = 400MHz
PLL_RSET(PLLDIV0, PLL_PLLDIV0_RMK(1, 0)); // 400MHz / 1 = 400MHz
PLL_RSET(OSCDIV1, PLL_OSCDIV1_RMK(1, 4)); // 50MHz / 5 = 10Mhz
/* Set DSP clock */
PLL_RSET(PLLDIV1, PLL_PLLDIV1_RMK(1, 0)); // 400MHz / 2 = 200MHz
Delay(20);
/* Set peripheral clock */
PLL_RSET(PLLDIV2, PLL_PLLDIV2_RMK(1, 3)); // 400MHz / 4 = 100MHz
Delay(20);
/* Set EMIF clock */
PLL_RSET(PLLDIV3, PLL_PLLDIV3_RMK(1, 3)); // 400MHz / 5 = 80MHz
Delay(20);
/* Take PLL out of reset */
PLL_deassert();
Delay(1500);
/* Enable PLL */
PLL_enable();
Delay(20);
}
void Delay(unsigned int nDelay)
{
int ii,jj,kk=0;
for ( ii=0;ii<nDelay;ii++ )
{
for ( jj=0;jj<1024;jj++ )
{
kk++;
}
}
}
void init_emif( void )
{
// *(int *)EMIF_GCTL = 0x00000078;
// *(int *)EMIF_CE0 = 0xffffff93; /* CE0 SDRAM 16-bit */
// *(int *)EMIF_CE0 = 0xffffff93; /* CE0 SDRAM */
// *(int *)EMIF_CE1 = 0xffffff13; /* CE1 Flash 16-bit */
// *(int *)EMIF_CE2 = 0xffffff23; /* CE2 Daughtercard 32-bit async */
// *(int *)EMIF_CE3 = 0xffffff23; /* CE3 Daughtercard 32-bit async */
// *(int *)EMIF_SDRAMCTL = 0x53115000; /* SDRAM control */
// *(int *)EMIF_SDRAMTIM = 0x00000578; /* SDRAM timing (refresh) */
// *(int *)EMIF_SDRAMEXT = 0x000a8529; /* SDRAM Extension register */
/* Initealize the board APIs */
EMIF_Config MyEMIFcfg0={
0x30 |
EMIF_FMKS(GBLCTL,NOHOLD,DISABLE) |
EMIF_FMKS(GBLCTL,EKEN,DEFAULT) |
EMIF_FMKS(GBLCTL,CLK1EN,DISABLE) |
EMIF_FMKS(GBLCTL,CLK2EN,DISABLE),
EMIF_FMKS(CECTL,WRSETUP,DEFAULT) |
EMIF_FMKS(CECTL,WRSTRB,DEFAULT) |
EMIF_FMKS(CECTL,WRHLD,DEFAULT) |
EMIF_FMKS(CECTL,RDSETUP,DEFAULT) |
EMIF_FMKS(CECTL,TA,OF(2)) |
EMIF_FMKS(CECTL,RDSTRB,DEFAULT) |
EMIF_FMKS(CECTL,MTYPE,SDRAM32) |
EMIF_FMKS(CECTL,RDHLD,DEFAULT),
EMIF_FMKS(CECTL, WRSETUP, OF(0)) |
EMIF_FMKS(CECTL, WRSTRB, OF(8)) |
EMIF_FMKS(CECTL, WRHLD, OF(2)) |
EMIF_FMKS(CECTL, RDSETUP, OF(0)) |
EMIF_FMKS(CECTL, TA, OF(2)) |
EMIF_FMKS(CECTL, RDSTRB, OF(8)) |
EMIF_FMKS(CECTL, MTYPE, ASYNC16) |
EMIF_FMKS(CECTL, RDHLD, OF(2)),
EMIF_FMKS(CECTL, WRSETUP, OF(0)) |
EMIF_FMKS(CECTL, WRSTRB, OF(8)) |
EMIF_FMKS(CECTL, WRHLD, OF(2)) |
EMIF_FMKS(CECTL, RDSETUP, OF(0)) |
EMIF_FMKS(CECTL, TA, OF(2)) |
EMIF_FMKS(CECTL, RDSTRB, OF(8)) |
EMIF_FMKS(CECTL, MTYPE, ASYNC8) |
EMIF_FMKS(CECTL, RDHLD, OF(2)),
EMIF_FMKS(CECTL, WRSETUP, OF(2)) |
EMIF_FMKS(CECTL, WRSTRB, OF(10)) |
EMIF_FMKS(CECTL, WRHLD, OF(2)) |
EMIF_FMKS(CECTL, RDSETUP, OF(2)) |
EMIF_FMKS(CECTL, TA, OF(2)) |
EMIF_FMKS(CECTL, RDSTRB, OF(10)) |
EMIF_FMKS(CECTL, MTYPE, ASYNC32) |
EMIF_FMKS(CECTL, RDHLD, OF(2)),
EMIF_FMKS(SDCTL,SDBSZ,4BANKS) |
EMIF_FMKS(SDCTL,SDRSZ,12ROW) |
EMIF_FMKS(SDCTL,SDCSZ,8COL) |
EMIF_FMKS(SDCTL,RFEN,ENABLE) |
EMIF_FMKS(SDCTL,INIT,YES) |
EMIF_FMKS(SDCTL,TRCD,OF(2)) |
EMIF_FMKS(SDCTL,TRP,OF(2)) |
EMIF_FMKS(SDCTL,TRC,OF(7)),
//EMIF_FMKS(SDTIM,XRFR,OF(1)) |
EMIF_FMKS(SDTIM, CNTR, OF(0)) |
EMIF_FMKS(SDTIM, PERIOD, OF(1400)),
EMIF_FMKS(SDEXT, WR2RD, OF(0)) |
EMIF_FMKS(SDEXT, WR2DEAC, OF(2)) |
EMIF_FMKS(SDEXT, WR2WR, OF(0)) |
EMIF_FMKS(SDEXT, R2WDQM, OF(1)) |
EMIF_FMKS(SDEXT, RD2WR, OF(0)) |
EMIF_FMKS(SDEXT, RD2DEAC, OF(1)) |
EMIF_FMKS(SDEXT, RD2RD, OF(0)) |
EMIF_FMKS(SDEXT, THZP, OF(2)) |
EMIF_FMKS(SDEXT, TWR, OF(2)) |
EMIF_FMKS(SDEXT, TRRD, OF(0)) |
EMIF_FMKS(SDEXT, TRAS, OF(5)) |
EMIF_FMKS(SDEXT, TCL, OF(1))
};
EMIF_config(&MyEMIFcfg0);
}
void setupInterrupts(void)
{
IRQ_setVecs(vectors); /* point to the IRQ vector table */
IRQ_nmiEnable();
IRQ_globalEnable();
IRQ_map(IRQ_EVT_EDMAINT, 8);
IRQ_map(IRQ_EVT_GPINT0, 5);
IRQ_reset(IRQ_EVT_EDMAINT);
IRQ_reset(IRQ_EVT_GPINT0);
}
/*
void set_data(void)
{ int i;
for (i=0;i<BUFFSIZE;i++)
{gBufferData[i]=(i*1000)<<12;
}
}
*/
interrupt void c_int05(void)
{
GPIO_clear(hGpio);
gpio_flag=1;
}
void do_switch(void)
{
static int gpio_value_gl_last;
static int gpio_value_gm_last;
gpio_value_gl_last=gpio_value_gl;
gpio_value_gm_last=gpio_value_gm;
gpio_value_kb =GPIO_pinRead(hGpio,GPIO_PIN9);
gpio_value_gm =GPIO_pinRead(hGpio,GPIO_PIN10);
gpio_value_gl =GPIO_pinRead(hGpio,GPIO_PIN11);
if (gpio_value_kb==0)
GPIO_pinWrite(hGpio,GPIO_PIN13,1);
else
GPIO_pinWrite(hGpio,GPIO_PIN13,0);
if (gpio_value_gl!=gpio_value_gl_last)
{
if (volme_ml>0)
volme_ml--;
}
if (gpio_value_gm!=gpio_value_gm_last)
{
if (volme_ml<8)
volme_ml++;
}
}
/* ------------------------------- Threads ------------------------------ */
/*
* processBuffer() - Process audio data once it has been received.
*/
void processBuffer(Uint32 pingPong)
{
if (pingPong == PING) {
//copyData_1(gBufferRcvPing,InputBuffer, BUFFSIZE);
//dm_process(InputBuffer, OutputBuffer);
//copyData_2(OutputBuffer , gBufferXmtPing, BUFFSIZE);
//dm_process( gBufferRcvPing, gBufferXmtPing );
// dm_process(InputBuffer, OutputBuffer);
copyData(gBufferRcvPing , gBufferXmtPing, BUFFSIZE);
} else {
//copyData_1(gBufferRcvPong,InputBuffer, BUFFSIZE);
//dm_process(InputBuffer, OutputBuffer);
//copyData_2(OutputBuffer , gBufferXmtPong, BUFFSIZE);
//dm_process( gBufferRcvPong, gBufferXmtPong );
//dm_process(InputBuffer, OutputBuffer);
copyData(gBufferRcvPong , gBufferXmtPong, BUFFSIZE);
}
}
/*
* copyData() - Copy one buffer with length elements to another.
void copyData_1(Int32 *inbuf, Int16 *outbuf, Int32 length)
{
for (copy_i = 0; copy_i < length; copy_i++) {
outbuf[copy_i] = (short) (inbuf[copy_i]>>16);
}
}
void copyData_2(Int16 *inbuf, Int32 *outbuf, Int32 length)
{
for (copy_i = 0; copy_i < length/2;copy_i++) {
outbuf[copy_i*2] =(((int) inbuf[copy_i])<<17);
outbuf[copy_i*2+1] =(((int) inbuf[copy_i])<<17);
}
}
*/
void copyData(Int32 *inbuf, Int32 *outbuf, Int32 length)
{
for (copy_i = 0; copy_i < length; copy_i++) {
outbuf[copy_i] = inbuf[copy_i];
}
}
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