📄 rs232.lst
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0132 90200077 LDS R2,len
0134 2433 CLR R3
0135 EA8F LDI R24,0xAF
0136 E090 LDI R25,0
0137 1982 SUB R24,R2
0138 0993 SBC R25,R3
0139 B98C OUT 0x0C,R24
013A C023 RJMP 0x015E
(0109) case 3: n++;UDR = RxBuffer[0]; break;
013B 9180006C LDS R24,n
013D 5F8F SUBI R24,0xFF
013E 9380006C STS n,R24
0140 9020006D LDS R2,RxBuffer
0142 B82C OUT 0x0C,R2
0143 C01A RJMP 0x015E
(0110) case 4: n++; UDR = RxBuffer[1]; break;
0144 9180006C LDS R24,n
0146 5F8F SUBI R24,0xFF
0147 9380006C STS n,R24
0149 9020006E LDS R2,RxBuffer+1
014B B82C OUT 0x0C,R2
014C C011 RJMP 0x015E
(0111) case 5: n++;UDR = RxBuffer[2]; break;
014D 9180006C LDS R24,n
014F 5F8F SUBI R24,0xFF
0150 9380006C STS n,R24
0152 9020006F LDS R2,RxBuffer+2
0154 B82C OUT 0x0C,R2
0155 C008 RJMP 0x015E
(0112) case 6: n=0; flag = NG;UDR = RxBuffer[3]; break; //data
0156 2422 CLR R2
0157 9220006C STS n,R2
0159 92200076 STS flag,R2
015B 90200070 LDS R2,RxBuffer+3
015D B82C OUT 0x0C,R2
(0113) // case 6: UDR = RxBuffer[0]%16 + RxBuffer[1]%16 + RxBuffer[2]%16 +RxBuffer[3]%16 + DataT - len; n = 0; break;//校验
(0114) default:break;
(0115) }
(0116) }
015E 9029 LD R2,Y+
015F BE2F OUT 0x3F,R2
0160 91E9 LD R30,Y+
0161 9199 LD R25,Y+
0162 9189 LD R24,Y+
0163 9119 LD R17,Y+
0164 9109 LD R16,Y+
0165 9039 LD R3,Y+
0166 9029 LD R2,Y+
0167 9518 RETI
(0117) }
(0118)
(0119) //call this routine to initialize all peripherals
(0120) void init_devices(void)
(0121) {
(0122) //stop errant interrupts until set up
(0123) CLI(); //disable all interrupts
_init_devices:
0168 94F8 BCLR 7
(0124) port_init();
0169 DEEA RCALL _port_init
(0125) uart0_init();
016A DEF4 RCALL _uart0_init
(0126)
(0127) MCUCR = 0x00;
016B 2422 CLR R2
016C BE25 OUT 0x35,R2
(0128) GICR = 0x00;
016D BE2B OUT 0x3B,R2
(0129) TIMSK = 0x00; //timer interrupt sources
016E BE29 OUT 0x39,R2
(0130) SEI(); //re-enable interrupts
016F 9478 BSET 7
0170 9508 RET
_check_buf:
i --> R20
num --> R18
CheckBuffer --> R16
0171 940E0222 CALL push_gset1
(0131) //all peripherals are now initialized
(0132) }
(0133) /*****************************************************
(0134) unsigned char check_buf( unsigned char *CheckBuffer)
(0135) 检测命令是否符合要求
(0136)
(0137) *****************************************************/
(0138)
(0139) unsigned char check_buf( unsigned char *CheckBuffer,unsigned char num){
(0140) unsigned char i;
(0141) for (i = 0;i < num; i++){
0173 2744 CLR R20
0174 C010 RJMP 0x0185
(0142) if (CheckBuffer[i] != RxBuffer[i])
0175 E68D LDI R24,0x6D
0176 E090 LDI R25,0
0177 2FE4 MOV R30,R20
0178 27FF CLR R31
0179 0FE8 ADD R30,R24
017A 1FF9 ADC R31,R25
017B 8020 LDD R2,Z+0
017C 2FE4 MOV R30,R20
017D 27FF CLR R31
017E 0FE0 ADD R30,R16
017F 1FF1 ADC R31,R17
0180 8030 LDD R3,Z+0
0181 1432 CP R3,R2
0182 F009 BEQ 0x0184
(0143) break;
0183 C003 RJMP 0x0187
0184 9543 INC R20
0185 1742 CP R20,R18
0186 F370 BCS 0x0175
(0144) }
(0145) if (i == num)
0187 1742 CP R20,R18
0188 F411 BNE 0x018B
(0146) return OK;
0189 E001 LDI R16,1
018A C001 RJMP 0x018C
(0147) else
(0148) return NG;
018B 2700 CLR R16
018C 940E0225 CALL pop_gset1
018E 9508 RET
_check_com:
i --> R20
018F 940E0222 CALL push_gset1
(0149) }
(0150)
(0151) unsigned char check_com(){
(0152) unsigned char i;
(0153) switch (len){
0191 91400077 LDS R20,len
0193 2755 CLR R21
0194 3940 CPI R20,0x90
0195 E0E0 LDI R30,0
0196 075E CPC R21,R30
0197 F409 BNE 0x0199
0198 C049 RJMP 0x01E2
0199 3941 CPI R20,0x91
019A E0E0 LDI R30,0
019B 075E CPC R21,R30
019C F409 BNE 0x019E
019D C044 RJMP 0x01E2
019E 3942 CPI R20,0x92
019F E0E0 LDI R30,0
01A0 075E CPC R21,R30
01A1 F409 BNE 0x01A3
01A2 C03F RJMP 0x01E2
01A3 3943 CPI R20,0x93
01A4 E0E0 LDI R30,0
01A5 075E CPC R21,R30
01A6 F409 BNE 0x01A8
01A7 C03A RJMP 0x01E2
01A8 3944 CPI R20,0x94
01A9 E0E0 LDI R30,0
01AA 075E CPC R21,R30
01AB F009 BEQ 0x01AD
01AC C04F RJMP 0x01FC
(0154) case COMM: switch (RxBuffer[0]){
01AD 9140006D LDS R20,RxBuffer
01AF 2755 CLR R21
01B0 3843 CPI R20,0x83
01B1 E0E0 LDI R30,0
01B2 075E CPC R21,R30
01B3 F0D1 BEQ 0x01CE
01B4 E883 LDI R24,0x83
01B5 E090 LDI R25,0
01B6 1784 CP R24,R20
01B7 0795 CPC R25,R21
01B8 F02C BLT 0x01BE
01B9 374D CPI R20,0x7D
01BA E0E0 LDI R30,0
01BB 075E CPC R21,R30
01BC F0D9 BEQ 0x01D8
01BD C040 RJMP 0x01FE
01BE 3E40 CPI R20,0xE0
01BF E0E0 LDI R30,0
01C0 075E CPC R21,R30
01C1 F009 BEQ 0x01C3
01C2 C03B RJMP 0x01FE
(0155) case En: if (check_buf(Enter,4) == OK)
01C3 E024 LDI R18,4
01C4 E600 LDI R16,0x60
01C5 E010 LDI R17,0
01C6 DFAA RCALL _check_buf
01C7 3001 CPI R16,1
01C8 F009 BEQ 0x01CA
01C9 C034 RJMP 0x01FE
(0156) comcheck = ENTER;
01CA 2422 CLR R2
01CB 92200071 STS comcheck,R2
(0157) break;
01CD C030 RJMP 0x01FE
(0158) case Run: if(check_buf(RunBuffer,2) == OK)
01CE E022 LDI R18,2
01CF E604 LDI R16,0x64
01D0 E010 LDI R17,0
01D1 DF9F RCALL _check_buf
01D2 3001 CPI R16,1
01D3 F551 BNE 0x01FE
(0159) {comcheck = RUN;
01D4 E081 LDI R24,1
01D5 93800071 STS comcheck,R24
(0160)
(0161) //runtask(RxBuffer);
(0162) }
(0163) break;
01D7 C026 RJMP 0x01FE
(0164) case Stop: if(check_buf(StopBuffer,2) == OK)
01D8 E022 LDI R18,2
01D9 E608 LDI R16,0x68
01DA E010 LDI R17,0
01DB DF95 RCALL _check_buf
01DC 3001 CPI R16,1
01DD F501 BNE 0x01FE
(0165) {comcheck = STOP;
01DE E082 LDI R24,2
01DF 93800071 STS comcheck,R24
(0166) //stoptask(RxBuffer);
(0167)
(0168) }
(0169) break;
(0170) default: break;
(0171) }break;
01E1 C01C RJMP 0x01FE
(0172) case ONE:
(0173) case TWO:
(0174) case THREE:
(0175) case FOUR: if (check_buf(TxBuffer,4) == OK)
01E2 E024 LDI R18,4
01E3 E702 LDI R16,0x72
01E4 E010 LDI R17,0
01E5 DF8B RCALL _check_buf
01E6 3001 CPI R16,1
01E7 F4B1 BNE 0x01FE
(0176) {for (i = 0;i < 4;i++) RxBuffer[i] = Enter[i];
01E8 2744 CLR R20
01E9 C00F RJMP 0x01F9
01EA E680 LDI R24,0x60
01EB E090 LDI R25,0
01EC 2FE4 MOV R30,R20
01ED 27FF CLR R31
01EE 0FE8 ADD R30,R24
01EF 1FF9 ADC R31,R25
01F0 8020 LDD R2,Z+0
01F1 E68D LDI R24,0x6D
01F2 E090 LDI R25,0
01F3 2FE4 MOV R30,R20
01F4 27FF CLR R31
01F5 0FE8 ADD R30,R24
01F6 1FF9 ADC R31,R25
01F7 8220 STD Z+0,R2
01F8 9543 INC R20
01F9 3044 CPI R20,4
01FA F378 BCS 0x01EA
(0177) }
(0178) //UDR = TSTA1;
(0179) break;
01FB C002 RJMP 0x01FE
(0180) default: PORTC = 0xf0;break;
01FC EF80 LDI R24,0xF0
01FD BB85 OUT 0x15,R24
(0181) }
(0182) while (!(UCSRA&(1<<UDRE)));
01FE 9B5D SBIS 0x0B,5
01FF CFFE RJMP 0x01FE
(0183) n=1;
0200 E081 LDI R24,1
0201 9380006C STS n,R24
(0184) UDR = TSTA1;
0203 E68B LDI R24,0x6B
0204 B98C OUT 0x0C,R24
0205 940E0225 CALL pop_gset1
0207 9508 RET
(0185)
(0186)
(0187) }
(0188) void main(){
(0189) n = 0;
_main:
0208 2422 CLR R2
0209 9220006C STS n,R2
(0190) flag = NG;
020B 92200076 STS flag,R2
(0191) init_devices();
020D DF5A RCALL _init_devices
020E C009 RJMP 0x0218
(0192) while(1){
(0193) if (flag == OK && n == 0)
020F 91800076 LDS R24,flag
0211 3081 CPI R24,1
0212 F429 BNE 0x0218
0213 9020006C LDS R2,n
0215 2022 TST R2
0216 F409 BNE 0x0218
(0194) check_com();
FILE: <library>
0217 DF77 RCALL _check_com
0218 CFF6 RJMP 0x020F
0219 9508 RET
push_gset5:
021A 92FA ST R15,-Y
021B 92EA ST R14,-Y
push_gset4:
021C 92DA ST R13,-Y
021D 92CA ST R12,-Y
push_gset3:
021E 92BA ST R11,-Y
021F 92AA ST R10,-Y
push_gset2:
0220 937A ST R23,-Y
0221 936A ST R22,-Y
push_gset1:
0222 935A ST R21,-Y
0223 934A ST R20,-Y
0224 9508 RET
pop_gset1:
0225 E0E1 LDI R30,1
pop:
0226 9149 LD R20,Y+
0227 9159 LD R21,Y+
0228 FDE0 SBRC R30,0
0229 9508 RET
022A 9169 LD R22,Y+
022B 9179 LD R23,Y+
022C FDE1 SBRC R30,1
022D 9508 RET
022E 90A9 LD R10,Y+
022F 90B9 LD R11,Y+
0230 FDE2 SBRC R30,2
0231 9508 RET
0232 90C9 LD R12,Y+
0233 90D9 LD R13,Y+
0234 FDE3 SBRC R30,3
0235 9508 RET
0236 90E9 LD R14,Y+
0237 90F9 LD R15,Y+
0238 9508 RET
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