📄 clkrecoverydpll.vhd
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity clkrecvy is
port
(
clockin : in std_logic ; --change type inout to in
clockout : out std_logic ;
datain : in std_logic ;
dataout : out std_logic ;
ctrl : in std_logic_vector(2 downto 0);
clk32mlocal : in std_logic
);
begin
end clkrecvy;
architecture structure of clkrecvy is
signal pdcounter: std_logic_vector(5 downto 0);
signal pdcounterresult:std_logic_vector(5 downto 0);
signal tempclockin: std_logic;
signal clockout1: std_logic;
signal dataout1: std_logic;
signal dteclkrecvydiv:std_logic_vector(4 downto 0);
signal dteclkrecvy: std_logic;
signal dteclkrecvyallspeed: std_logic;
signal dteclkrecvyallspeeddelay: std_logic;
signal dteclkrecvyallspeeddelay2: std_logic;
signal pllcountertosave:std_logic;
signal pllpd2: std_logic;
signal cnt:std_logic_vector(3 downto 0);
signal delete: std_logic;
signal temp1:std_logic;
signal temp2: std_logic;
signal pd: std_logic;
begin
process (clockin,clk32mlocal) --to generate the reset signal
begin
if (clk32mlocal'event) and (clk32mlocal='1') then
tempclockin<=clockin;
end if;
end process;
process(dteclkrecvy) --to help the other speeds.
begin
if (dteclkrecvy'event) and (dteclkrecvy='1') then
dteclkrecvydiv<=dteclkrecvydiv+1;
end if;
end process;
-----no use 000 because 2m just pass through dteclkrecvydiv(0) when (ctrl="000") else
process(dteclkrecvy)
begin
if (dteclkrecvy'event) and (dteclkrecvy='1') then
dteclkrecvyallspeeddelay<=dteclkrecvyallspeed;---delay once
dteclkrecvyallspeeddelay2<=dteclkrecvyallspeeddelay;-----delay twice is a phase dector d flip flop clear signal
end if;
end process;
process(pllcountertosave)
begin
if (pllcountertosave'event) and (pllcountertosave='1') then
pdcounterresult<=pdcounter;
end if;
end process;
process(pllpd2,tempclockin)
begin
if (pllpd2='1') then------this is a d flip flop with reset port
pd<='0';
elsif (tempclockin'event) and (tempclockin='1') then
pd<='1';
end if;
end process;
process(clk32mlocal)
begin
if (clk32mlocal'event) and (clk32mlocal='1') then
if(pd='0') then --phase detector signal is zero, pd counter reset.
pdcounter<="000000";
elsif(pd='1') then
if (pdcounter="111111") then
pdcounter<="111111";
else
pdcounter<=pdcounter+1;
end if;
end if;
end if;
end process;
process(clk32mlocal)
begin
if(pllpd2='0') then
temp1<='0';
temp2<='0';
elsif (clk32mlocal'event) and (clk32mlocal='1') then
if ((pdcounterresult(3)='0') and (pdcounterresult(4)='0') and (pdcounterresult(5)='0')) then
temp1<='1';
temp2<=temp1;
end if;
end if;
end process;
process(clk32mlocal)
begin
if (clk32mlocal'event) and (clk32mlocal='1') then
if (delete='0') then ----/17 shiji wei kou pulse
if ((pdcounterresult(3)='1') and (pdcounterresult(4)='1') and (pdcounterresult(5)='1')) then
cnt<=cnt+2; --/15 to track faster
else cnt <=cnt+1; --/16 normal operation
end if;
end if;
end if;
end process;
process(clockout1)
begin
if (clockout1'event) and (clockout1='1') then
dataout1<=datain;
end if;
end process;
dteclkrecvyallspeed<= dteclkrecvydiv(0) when (ctrl="001") else
dteclkrecvydiv(1) when (ctrl="010") else
dteclkrecvydiv(2) when (ctrl="011") else
dteclkrecvydiv(3) when (ctrl="100") else
dteclkrecvydiv(4);
pllcountertosave <= dteclkrecvyallspeed and (not dteclkrecvyallspeeddelay); --to save the pd counter
pllpd2<=dteclkrecvyallspeeddelay and (not dteclkrecvyallspeeddelay2); -- to clear the d flip flop
delete<= temp1 and (not temp2);
dteclkrecvy<=cnt(3);
clockout1<=dteclkrecvy;
clockout<=clockin when ctrl= "000" else
clockout1;
dataout <=datain when ctrl= "000" else
dataout1;
end structure;
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