hdb3enc.vhd

HDB3编解码

--********************************************************************************--
--                                                                                --
--  HDB3 Encoder                                                                  --
--                                                                                --
--********************************************************************************--



library IEEE;
use IEEE.std_logic_1164.all;


entity hdb3enc is
	port
	(
		clk2m  : in std_logic ;
        	clk2mlocal: in std_logic;
--		ctrl: in std_logic;
                clkmod:in std_logic;
		data : in std_logic ;
		reset: in std_logic ;
        	hdbx : out std_logic ;
		hdby : out std_logic;
		Tclk_hdb3 : out std_logic;
		los: in std_logic 
	);
begin
end hdb3enc;


architecture structure of hdb3enc is
	signal d:std_logic_vector (3 downto 0);
	signal zero4:std_logic;
	signal code:std_logic;
	signal odd1s:std_logic;
	signal chs:std_logic;
	signal clk2mtmp:std_logic;
begin
	process(los,clk2mlocal,clk2m,clkmod)
	begin
		
		if(los='1') then
			clk2mtmp <= clk2mlocal;
		else	
			case clkmod is 
       		 	  when '0' =>
				clk2mtmp <= clk2mlocal;
        		  when '1' =>
			        clk2mtmp <= clk2m;
       		 	  when others =>
        		end case;
		end if;
			
	end process;

	Tclk_hdb3 <= not clk2mtmp;	

	process(clk2mtmp,reset)
	begin
    		if (reset='0') then
    			d<="0000";
			odd1s<='0';
			chs<='0';
	        elsif (clk2mtmp'event) and (clk2mtmp='0') then
	  		d(0)<=data;
			d(1)<=d(0) or zero4;
			d(2)<=d(1);
			d(3)<=d(2);
			odd1s<=(odd1s and (not zero4)) xor data;
			chs<=chs xor (code xor zero4);
		end if;
	end process;

	process(chs,code,clk2mtmp)
	begin
		case chs is
			when '0' =>
				hdbx<=code and clk2mtmp;
				hdby<='0';
			when '1' =>
				hdbx<='0';
				hdby<=code and clk2mtmp;
			when others =>
		end case;
	end process;

	process(d)
	begin
		if (d="0000") then
			zero4<='1';
		else
			zero4<='0';
		end if;
	end process;

	code<=d(3) or (zero4 and (not odd1s));
end structure;