📄 dsmlib.c
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if (dsmDebug) { printf ("FORMAT_Y len = %d\n", pY->len); printf (" obuf = %s\n", pY->obuf); printf (" rbuf = %s\n", pY->rbuf); printf (" mbuf = %s\n", pY->mbuf); printf (" ibuf = %s\n", pY->ibuf); printf (" dbuf = %s\n", pY->dbuf); } return; }/********************************************************************************* dsmPass1 - fill FORMAT_X structure.** RETURNS: N/A*/LOCAL void dsmPass1 ( FORMAT_X *pX, FORMAT_Y *pY ) { char *pS; /* pX->lenO = size of Opcode in bytes = 1, 2, or 3 */ if (pX->pI->flag & OP3) pX->lenO = 3; else if (pX->pI->flag & OP2) pX->lenO = 2; else pX->lenO = 1; /* get a Opecode */ if (pX->pI->flag & TTTN) { instKeeper = pX->pI->pOpc; pS = tttn[*(pX->pD + pX->lenO - 1) & 0x0f]; if (pX->pI->type == itCjmp) { bcopy ("J ", pY->obuf, 3); bcopy (pS, &pY->obuf[1], strlen (pS)); } if (pX->pI->type == itCset) { bcopy ("SET", pY->obuf, 3); bcopy (pS, &pY->obuf[3], strlen (pS)); } if (pX->pI->type == itCmovcc) { bcopy ("CMOV", pY->obuf, 4); bcopy (pS, &pY->obuf[4], strlen (pS)); } pX->pI->pOpc = pY->obuf; } if (pX->pI->flag & TTT) pX->pI->pOpc = ttt[(*(pX->pD + pX->lenO) & 0x38) >> 3]; /* get an MMX granularity */ if (pX->pI->flag & GG) { instKeeper = pX->pI->pOpc; pS = gg[*(pX->pD + pX->lenO - 1) & 0x03]; bcopy (pX->pI->pOpc, pY->obuf, strlen (pX->pI->pOpc)); bcopy (pS, &pY->obuf[strlen (pX->pI->pOpc)], strlen (pS)); pX->pI->pOpc = pY->obuf; } /* get a W */ if (pX->pI->flag & WFUL) { pX->w = *(pX->pD + pX->lenO - 1) & 0x01; if (pX->pI->type == itMovItoR) pX->w = (*pX->pD & 0x08) >> 3; } /* get a S */ if (pX->pI->flag & SEXT) pX->s = (*(pX->pD + pX->lenO - 1) & 0x02) >> 1; /* * get a D * * jhw - for our representation of data direction: * pX->d = 0 is an r/m -> reg transfer * pX->d = 1 is a reg -> r/m transfer */ if (pX->pI->flag & DISR) { /* * MMX instructions reference least significant opcode byte bit 4 for * data direction information. * * for Intel's representation: * D bit = 0 is an r/m -> reg transfer * D bit = 1 is a reg -> r/m transfer */ if (pX->pI->flag & (MMXREG|MMXRM)) pX->d = (*(pX->pD + pX->lenO - 1) & 0x10) >> 4; /* * XMM instructions reference least significant opcode byte bit 0 for * data direction information. * * for Intel's representation: * D bit = 0 is an r/m -> reg transfer * D bit = 1 is a reg -> r/m transfer */ else if (pX->pI->flag2 & (XMMREG|XMMRM)) pX->d = (*(pX->pD + pX->lenO - 1) & 0x01); /* * all others use least significant byte bit 1 for * data direction information. * * BUT... all other instructions use the opposite representation! * * for Intel's representation: * D bit = 1 is an r/m -> reg transfer * D bit = 0 is a reg -> r/m transfer */ else /* invert the state */ pX->d = (*(pX->pD + pX->lenO - 1) & 0x02) ? 0 : 1; /* evaluate the special case instructions! */ /* * PEXTRW is a SIMD instruction, but it operates on MMX * register. Therefore it deviates from the above rules. * The DISR flag is included in the definition because * the data dir is reg -> r/m regardless. */ if (pX->pI->type == itPextrw) pX->d = 1; } /* get a REG */ if (pX->pI->flag & SREG2) pX->reg = (*pX->pD & 0x18) >> 3; if (pX->pI->flag & SREG3) pX->reg = (*(pX->pD + pX->lenO) & 0x38) >> 3; if ( (pX->pI->flag & REG) || (pX->pI->flag & MMXREG) || (pX->pI->flag2 & XMMREG)) { if (pX->pI->flag & SF) pX->reg = *pX->pD & 0x07; else if (pX->pI->flag & MODRM) pX->reg = (*(pX->pD + pX->lenO) & 0x38) >> 3; else { printf ("dsmLib.c error 0: Invalid opcode flag definition.\n"); printf ("\top = 0x%02x 0x%02x 0x%02x 0x%02x\n", (UCHAR)*pX->pD, (UCHAR)*(pX->pD + 1), (UCHAR)*(pX->pD + 2), (UCHAR)*(pX->pD + 3)); } } if (pX->pI->flag & EEE) pX->reg = (*(pX->pD + pX->lenO) & 0x38) >> 3; /* get a ST for 387*/ if (pX->pI->flag & ST) pX->st = *(pX->pD + pX->lenO - 1) & 0x07; /* get a MF for 387*/ if (pX->pI->flag & MF) pX->mf = (*pX->pD & 0x06) >> 1; /* get a FD for 387 */ if (pX->pI->flag & FD) pX->fd = *pX->pD & 0x04; /* get a size of Immediate, 0, 1, 2, 4 */ if (pX->pI->flag & I8) pX->lenI = 1; if (pX->pI->flag & IMM) { if (pX->s) pX->lenI = 1; else pX->lenI = immL[(int)pX->d32][(int)pX->w]; } if (pX->pI->flag & OFFSEL) { /* * CALL/JMP ptr16:16/32 * The operand size attribute determines the size of offset (16/32). * The operand size attribute is the D flag in the segment desc. * The instruction prefix 0x66 can be used to select an operand * size other than the default. */ if (pX->d32) pX->lenI = 4; else pX->lenI = 2; } if ((pX->pI->flag & D16L8) || (pX->pI->flag & PORT)) pX->lenI = 2; /* get a size of Displacement, 0, 1, 2, 4 */ if (pX->pI->flag & D8) pX->lenD = 1; if (pX->pI->flag & (DIS|D16)) { if (pX->pI->flag & WFUL) { if (pX->pI->type == itMovAMtoMA) pX->lenD = immL[(int)pX->a32][(int)pX->w]; else pX->lenD = immL[(int)pX->d32][(int)pX->w]; } else pX->lenD = immL[(int)pX->d32][(int)pX->w]; } if (pX->pI->flag & OFFSEL) pX->lenD = 2; if (pX->pI->flag & D16L8) pX->lenD = 1; if (pX->pI->flag & MODRM) { pX->modrm = 1; pY->pD = pX->pD + pX->lenO; pX->mod = (*pY->pD & 0xc0) >> 6; pX->rm = *pY->pD & 0x07; if ((pX->a32 == 0) && (pX->mod != 3)) { if (pX->mod == 1) pX->lenD = 1; else if ((pX->mod == 2) || ((pX->mod == 0) && (pX->rm == 6))) pX->lenD = 2; } if ((pX->a32 == 1) && (pX->mod != 3)) { if (pX->rm == 4) { pX->sib = 1; pY->pD = pX->pD + pX->lenO + pX->modrm; pX->ss = (*pY->pD & 0xc0) >> 6; pX->index = (*pY->pD & 0x38) >> 3; pX->base = *pY->pD & 0x07; if (pX->mod == 1) pX->lenD = 1; else if ((pX->mod == 2) || ((pX->mod == 0) && (pX->base == 5))) pX->lenD = 4; } else { if (pX->mod == 1) pX->lenD = 1; else if ((pX->mod == 2) || ((pX->mod == 0) && (pX->rm == 5))) pX->lenD = 4; } } } } /********************************************************************************* dsmPass2 - fill FORMAT_Y structure.** RETURNS: N/A*/LOCAL void dsmPass2 ( FORMAT_X *pX, FORMAT_Y *pY ) { FAST char *pS = 0; /* get an instruction length, pY->len */ pY->len = pX->lenO + pX->modrm + pX->sib + pX->lenD + pX->lenI; /* get an opecode pointer, pY->pOpc */ pY->pOpc = pX->pI->pOpc; if (pX->pI->flag & MF) { pS = pY->obuf; if (pX->mf & 1) { bcopy (pX->pI->pOpc, pS + 1, strlen (pX->pI->pOpc)); bcopy ("FI", pS, 2); } else { bcopy (pX->pI->pOpc, pS, strlen (pX->pI->pOpc)); strcat (pS, mf[(int)pX->mf]); } pY->pOpc = pY->obuf; } if (pX->pI->flag & POP) { bcopy (pX->pI->pOpc, pY->obuf, strlen (pX->pI->pOpc)); strcat (pY->obuf, "P"); pY->pOpc = pY->obuf; } /* get a register operand buffer, pY->rbuf */ if (pX->pI->flag & SREG2) bcopy (sreg2[(int)pX->reg], pY->rbuf, strlen (sreg2[(int)pX->reg])); if (pX->pI->flag & SREG3) bcopy (sreg3[(int)pX->reg], pY->rbuf, strlen (sreg3[(int)pX->reg])); /* get register number */ if (pX->pI->flag & REG) { if (pX->pI->flag & WFUL) pS = regw[(int)pX->d32][(int)pX->w][(int)pX->reg]; else pS = reg[(int)pX->d32][(int)pX->reg]; bcopy (pS, pY->rbuf, strlen (pS)); } /* get MMX register number */ if (pX->pI->flag & MMXREG) { pS = regmmx[ (int) pX->reg]; bcopy (pS, pY->rbuf, strlen (pS)); } /* XMM register */ if (pX->pI->flag2 & XMMREG) { pS = regxmm[ (int) pX->reg]; memcpy ((void *) pY->rbuf, (void *) pS, strlen (pS)); } if (pX->pI->flag & EEE) { if (pX->pI->type == itMovC) pS = eeec[(int)pX->reg]; else if (pX->pI->type == itMovD) pS = eeed[(int)pX->reg]; else if (pX->pI->type == itMovT) pS = eeet[(int)pX->reg]; bcopy (pS, pY->rbuf, strlen (pS)); pS = reg[(int)pX->d32][(int)pX->rm]; bcopy (pS, pY->mbuf, strlen (pS)); } if (pX->pI->flag & AX) { if (pX->pI->flag & WFUL) { if (pX->pI->type == itMovAMtoMA) pS = regw[(int)pX->a32][(int)pX->w][0]; else pS = regw[(int)pX->d32][(int)pX->w][0]; } else pS = reg[(int)pX->d32][0]; if (pX->pI->flag & REG) bcopy (pS, pY->ibuf, strlen (pS)); else bcopy (pS, pY->rbuf, strlen (pS)); } if (pX->pI->flag & ST) sprintf (pY->rbuf, st, pX->st); /* get a displacement operand buffer, pY->dbuf */ if (pX->pI->flag & (D8|D16|DIS)) { pY->pD = pX->pD + pX->lenO + pX->modrm + pX->sib; if (pX->lenD == 1) pY->addr = *(pY->pD); else if (pX->lenD == 2) pY->addr = *(short *)pY->pD; else if (pX->lenD == 4) { if (pX->pI->flag & D16) pY->addr = *(int *)pY->pD & 0x0000ffff; else pY->addr = *(int *)pY->pD; } sprintf (pY->dbuf, "0x%x", pY->addr); } if (pX->pI->flag & OFFSEL) sprintf (pY->dbuf, "0x%x", *(USHORT *)(pX->pD + pX->lenO + pX->lenI)); if (pX->pI->flag & D16L8) sprintf (pY->dbuf, "0x%x", *(UCHAR *)(pX->pD + pX->lenO + pX->lenI)); /* get an immediate operand buffer, pY->ibuf */ if (pX->pI->flag & (IMM|I8)) { pY->pD = pX->pD + pX->lenO + pX->modrm + pX->sib + pX->lenD; if (pX->lenI == 1) { if (pX->s) sprintf (pY->ibuf, "%d", *pY->pD); else sprintf (pY->ibuf, "0x%x", *(UCHAR *)pY->pD); } if (pX->lenI == 2) sprintf (pY->ibuf, "0x%x", *(USHORT *)pY->pD); if (pX->lenI == 4) sprintf (pY->ibuf, "0x%x", *(UINT *)pY->pD); /* * CMPSS and CMPPS opcode string is modified based on * the imm value. */ if ((pX->pI->type == itCmpps) || (pX->pI->type == itCmpss)) { /* verify that (0 < imm < 8) */ if (*(UCHAR *)pY->pD < 8) { if (pX->pI->type == itCmpps) pY->pOpc = cmpps[*(UCHAR *)pY->pD]; else pY->pOpc = cmpss[*(UCHAR *)pY->pD]; } } } if (pX->pI->fla
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