📄 pcm1.mdl
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Model {
Name "pcm1"
Version 5.1
SaveDefaultBlockParams on
SampleTimeColors off
LibraryLinkDisplay "none"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
SortedOrder off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeVarName "covCumulativeData"
CovCumulativeReport off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
MinMaxOverflowArchiveMode "Overwrite"
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
Created "Sun Apr 25 16:40:43 2004"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "Only Me"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Sun May 09 11:47:02 2004"
ModelVersionFormat "1.%<AutoIncrement:5>"
ConfigurationManager "None"
SimParamPage "Solver"
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
BufferReuse on
RTWExpressionDepthLimit 5
SimulationMode "normal"
Solver "ode45"
SolverMode "Auto"
StartTime "0.0"
StopTime "10.0"
MaxOrder 5
MaxStep "auto"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "auto"
RelTol "1e-3"
AbsTol "auto"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
Refine "1"
LoadExternalInput off
ExternalInput "[t, u]"
LoadInitialState off
InitialState "xInitial"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
Decimation "1"
LimitDataPoints on
MaxDataPoints "1000"
SignalLoggingName "sigsOut"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
AlgebraicLoopMsg "warning"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
CheckForMatrixSingularity "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterPrecisionLossMsg "warning"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SfunCompatibilityCheckMsg "none"
RTWInlineParameters off
BlockReductionOpt on
BooleanDataType on
ConditionallyExecuteInputs on
ParameterPooling on
OptimizeBlockIOStorage on
ZeroCross on
AssertionControl "UseLocalSettings"
ProdHWDeviceType "Microprocessor"
ProdHWWordLengths "8,16,32,32"
RTWSystemTargetFile "grt.tlc"
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
RTWRetainRTWFile off
TLCProfiler off
TLCDebug off
TLCCoverage off
TLCAssertion off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType Abs
SaturateOnIntegerOverflow on
ZeroCross on
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
ShowAdditionalParam off
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
}
Block {
BlockType Demux
Outputs "4"
DisplayOption "none"
BusSelectionMode off
}
Block {
BlockType Inport
Port "1"
PortDimensions "-1"
ShowAdditionalParam off
LatchInput off
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
Interpolate on
}
Block {
BlockType Math
Operator "exp"
OutputSignalType "auto"
}
Block {
BlockType Outport
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
ShowAdditionalParam off
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
}
Block {
BlockType RelationalOperator
Operator ">="
ShowAdditionalParam off
InputSameDT on
LogicOutDataTypeMode "Logical (see Advanced Sim. Parameters)"
LogicDataType "uint(8)"
ZeroCross on
}
Block {
BlockType Scope
Floating off
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
}
Block {
BlockType "S-Function"
FunctionName "system"
PortCounts "[]"
SFunctionModules "''"
}
Block {
BlockType Signum
ZeroCross on
}
Block {
BlockType Sin
SineType "Time based"
Amplitude "1"
Bias "0"
Frequency "1"
Phase "0"
Samples "10"
Offset "0"
VectorParams1D on
}
Block {
BlockType StateSpace
A "1"
B "1"
C "1"
D "1"
X0 "0"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
ShowAdditionalParam off
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
ShowAdditionalParam off
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
}
Block {
BlockType Terminator
}
Block {
BlockType ZeroOrderHold
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "pcm1"
Location [119, 193, 981, 486]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "A-Law\nCompressor"
Ports [1, 1]
Position [125, 178, 205, 222]
FontSize 10
SourceBlock "commsrccod2/A-Law\nCompressor"
SourceType "A-Law Compressor"
A "87.6"
V "1"
}
Block {
BlockType Reference
Name "A-Law\nExpander"
Ports [1, 1]
Position [440, 178, 520, 222]
FontSize 10
SourceBlock "commsrccod2/A-Law\nExpander"
SourceType "A-Law Expander"
A "87.6"
V "1"
}
Block {
BlockType Reference
Name "Analog\nFilter Design"
Ports [1, 1]
Position [670, 172, 735, 228]
SourceBlock "dsparch4/Analog\nFilter Design"
SourceType "Analog Filter Design"
method "Butterworth"
filttype "Lowpass"
N "2"
Wlo "10"
Whi "80"
Rp "1"
Rs "40"
}
Block {
BlockType Reference
Name "Quantizer\nDecode"
Ports [1, 1]
Position [340, 178, 420, 222]
SourceBlock "commsrccod2/Quantizer\nDecode"
SourceType "Quantizer Decode"
codebook "codebook"
}
Block {
BlockType "S-Function"
Name "S-Function"
Ports [1, 1]
Position [535, 185, 595, 215]
FunctionName "timestwo"
}
Block {
BlockType Reference
Name "Sampled\nQuantizer Encode"
Ports [1, 3]
Position [220, 178, 300, 222]
SourceBlock "commsrccod2/Sampled\nQuantizer Encode"
SourceType "Sampled Quantizer Encode"
partition "partition"
codebook "codebook"
n "1"
sample_time "0.02"
}
Block {
BlockType Scope
Name "Scope"
Ports [5]
Position [790, 61, 830, 219]
Location [5, 60, 1029, 737]
Open on
NumInputPorts "5"
List {
ListType AxesTitles
axes1 "%<SignalLabel>原信号"
axes2 "%<SignalLabel>采样（t=0.02s）"
axes3 " pcm量化"
axes4 " "
axes5 "%<SignalLabel>"
}
List {
ListType SelectedSignals
axes1 ""
axes2 ""
axes3 ""
axes4 ""
axes5 ""
}
YMin "-1~-1~-1~-2~-2"
YMax "1~1~1~-1~-1"
DataFormat "StructureWithTime"
}
Block {
BlockType Sin
Name "Sine Wave"
Position [15, 185, 45, 215]
SineType "Time based"
Frequency "10"
SampleTime "0"
}
Block {
BlockType Terminator
Name "Terminator"
Position [245, 120, 265, 140]
}
Block {
BlockType ZeroOrderHold
Name "Zero-Order\nHold"
Position [65, 181, 100, 219]
SampleTime "0.02"
}
Line {
SrcBlock "Sine Wave"
SrcPort 1
Points [15, 0]
Branch {
DstBlock "Zero-Order\nHold"
DstPort 1
}
Branch {
Points [-15, 0; 0, -120]
DstBlock "Scope"
DstPort 1
}
}
Line {
SrcBlock "Zero-Order\nHold"
SrcPort 1
Points [5, 0]
Branch {
Points [0, -90]
DstBlock "Scope"
DstPort 2
}
Branch {
DstBlock "A-Law\nCompressor"
DstPort 1
}
}
Line {
SrcBlock "Sampled\nQuantizer Encode"
SrcPort 2
Points [15, 0]
Branch {
Points [0, 0; 0, -60]
DstBlock "Scope"
DstPort 3
}
Branch {
DstBlock "Quantizer\nDecode"
DstPort 1
}
}
Line {
SrcBlock "Quantizer\nDecode"
SrcPort 1
DstBlock "A-Law\nExpander"
DstPort 1
}
Line {
SrcBlock "Analog\nFilter Design"
SrcPort 1
DstBlock "Scope"
DstPort 5
}
Line {
SrcBlock "A-Law\nExpander"
SrcPort 1
DstBlock "S-Function"
DstPort 1
}
Line {
SrcBlock "A-Law\nCompressor"
SrcPort 1
DstBlock "Sampled\nQuantizer Encode"
DstPort 1
}
Line {
SrcBlock "S-Function"
SrcPort 1
Points [45, 0]
Branch {
DstBlock "Analog\nFilter Design"
DstPort 1
}
Branch {
Points [0, -30]
DstBlock "Scope"
DstPort 4
}
}
}
}
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