📄 fpsymbol.h
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.equ CP_PLTC_EQ_15, 0x0000000F ; pipeline timer count = 15 .equ CP_PLTC_POSITION, 0; .equ CP_MATC_MASK, 0x000000F0 ; mpy-acc timer count (MATC) mask .equ CP_MATC_EQ_2, 0x00000020 ; mpy-acc timer count = 2 .equ CP_MATC_EQ_3, 0x00000030 ; mpy-acc timer count = 3 .equ CP_MATC_EQ_4, 0x00000040 ; mpy-acc timer count = 4 .equ CP_MATC_EQ_5, 0x00000050 ; mpy-acc timer count = 5 .equ CP_MATC_EQ_6, 0x00000060 ; mpy-acc timer count = 6 .equ CP_MATC_EQ_7, 0x00000070 ; mpy-acc timer count = 7 .equ CP_MATC_EQ_8, 0x00000080 ; mpy-acc timer count = 8 .equ CP_MATC_EQ_9, 0x00000090 ; mpy-acc timer count = 9 .equ CP_MATC_EQ_10, 0x000000A0 ; mpy-acc timer count = 10 .equ CP_MATC_EQ_11, 0x000000B0 ; mpy-acc timer count = 11 .equ CP_MATC_EQ_12, 0x000000C0 ; mpy-acc timer count = 12 .equ CP_MATC_EQ_13, 0x000000D0 ; mpy-acc timer count = 13 .equ CP_MATC_EQ_14, 0x000000E0 ; mpy-acc timer count = 14 .equ CP_MATC_EQ_15, 0x000000F0 ; mpy-acc timer count = 15 .equ CP_MATC_POSITION, 4; .equ CP_MVTC_MASK, 0x00000F00 ; MOVE P timer count (MVTC) mask .equ CP_MVTC_EQ_2, 0x00000200 ; MOVE P timer count = 2 .equ CP_MVTC_EQ_3, 0x00000300 ; MOVE P timer count = 3 .equ CP_MVTC_EQ_4, 0x00000400 ; MOVE P timer count = 4 .equ CP_MVTC_EQ_5, 0x00000500 ; MOVE P timer count = 5 .equ CP_MVTC_EQ_6, 0x00000600 ; MOVE P timer count = 6 .equ CP_MVTC_EQ_7, 0x00000700 ; MOVE P timer count = 7 .equ CP_MVTC_EQ_8, 0x00000800 ; MOVE P timer count = 8 .equ CP_MVTC_EQ_9, 0x00000900 ; MOVE P timer count = 9 .equ CP_MVTC_EQ_10, 0x00000A00 ; MOVE P timer count = 10 .equ CP_MVTC_EQ_11, 0x00000B00 ; MOVE P timer count = 11 .equ CP_MVTC_EQ_12, 0x00000C00 ; MOVE P timer count = 12 .equ CP_MVTC_EQ_13, 0x00000D00 ; MOVE P timer count = 13 .equ CP_MVTC_EQ_14, 0x00000E00 ; MOVE P timer count = 14 .equ CP_MVTC_EQ_15, 0x00000F00 ; MOVE P timer count = 15 .equ CP_MVTC_POSITION, 8; .equ CP_AD_MASK, 0x00001000 ; .equ CP_ADVANCE_DRDY_MODE, 0x00001000 ; .equ CP_NORMAL_DRDY_MODE, 0x00000000 ; .equ CP_AD_POSITION, 12; .equ CP_HE_MASK, 0x00002000 ; Halt-on-error mask (HE) .equ CP_HALT_ON_ERROR_ENABLED, 0x00002000 ; Halt-on-error enabled (HE=1) .equ CP_HALT_ON_ERROR_DISABLED,0x00000000 ; Halt-on-error disabled (HE=0) .equ CP_HE_POSITION, 13; .equ CP_EX_MASK, 0x00004000 ; EXCP enable mask (EX) .equ CP_EXCP_ENABLED, 0x00004000 ; EXCP enabled (EX=1) .equ CP_EXCP_DISABLED, 0x00000000 ; EXCP disabled (EX=0) .equ CP_EX_POSITION, 14;;;; ______________________________________________________________________;|______________________________________________________________________|;| |;| SYMBOLS FOR DEFINING THE STATUS REGISTER WORD |;| |;|______________________________________________________________________|;|______________________________________________________________________|;; .equ CP_INVALID_OP_EXCP, 0x00000001 .equ CP_INVALID_OP_EXCP_POSITION, 0; .equ CP_RESERVED_OP_EXCP, 0x00000002 .equ CP_RESERVED_OP_EXCP_POSITION, 1; .equ CP_OVERFLOW_EXCP, 0x00000004 .equ CP_OVERFLOW_EXCP_POSITION, 2; .equ CP_UNDERFLOW_EXCP, 0x00000008 .equ CP_UNDERFLOW_EXCP_POSITION, 3; .equ CP_INEXACT_EXCP, 0x00000010 .equ CP_INEXACT_EXCP_POSITION, 4; .equ CP_ZERO_EXCP, 0x00000020 .equ CP_ZERO_EXCP_POSITION, 5; .equ CP_EXCP_STATUS_MASK, 0x00000040 .equ CP_EXCP_STATUS_FLAG_POSITION, 6; .equ CP_R_TEMP_VALID_MASK, 0x00000080 .equ R_TEMP_VALID_POSITION, 7; .equ CP_S_TEMP_VALID_MASK, 0x00000100 .equ CP_S_TEMP_VALID_POSITION, 8; .equ CP_I_TEMP_VALID_FLAG, 0x00000200 .equ CP_I_TEMP_VALID_POSITION, 9; .equ CP_OPERATION_PENDING_MASK, 0x00000400 .equ CP_OPERATION_PENDING_POSITION,10;;; ______________________________________________________________________;|______________________________________________________________________|;| |;| SYMBOLS FOR DEFINING THE FLAG REGISTER WORD |;| |;|______________________________________________________________________|;|______________________________________________________________________|;; .equ CP_INVALID_OP_FLAG, 0x00000001 .equ CP_INVALID_OP_FLAG_POSITION, 0; .equ CP_CARRY_FLAG, 0x00000001 .equ CP_CARRY_FLAG_POSITION, 0; .equ CP_RESERVED_OP_FLAG, 0x00000002 .equ CP_RESERVED_OP_FLAG_POSITION, 1; .equ CP_OVERFLOW_FLAG, 0x00000004 .equ CP_OVERFLOW_FLAG_POSITION, 2; .equ CP_UNORDERED_FLAG, 0x00000004 .equ CP_UNORDERED_FLAG_POSITION, 2; .equ CP_UNDERFLOW_FLAG, 0x00000008 .equ CP_UNDERFLOW_FLAG_POSITION, 3; .equ CP_LESS_THAN_FLAG, 0x00000008 .equ CP_LESS_THAN_POSITION, 3; .equ CP_WINNER_FLAG, 0x00000008 .equ CP_WINNER_FLAG_POSITION, 3; .equ CP_INEXACT_FLAG, 0x00000010 .equ CP_INEXACT_FLAG_POSITION, 4; .equ CP_GREATER_THAN_FLAG, 0x00000010 .equ CP_GREATER_THAN_FLAG_POSITION,4; .equ CP_ZERO_FLAG, 0x00000020 .equ CP_ZERO_FLAG_POSITION, 5; .equ CP_EQUAL_FLAG, 0x00000020 .equ CP_EQUAL_FLAG_POSITION, 5; .equ CP_SIGN_FLAG, 0x00000040 .equ CP_SIGN_FLAG_POSITION, 6;;; ______________________________________________________________________;|______________________________________________________________________|;| |;| SYMBOLS FOR TRANSACTION REQUEST TYPES |;| |;|______________________________________________________________________|;|______________________________________________________________________|;;; write requests;; Note: Each WRITE_* transaction request, plus ADV_TEMPS sets the CA; (Coprocessor Active) bit in the 29000 Current Processor Status Register.; .equ CP_WRITE_R, 0x20 ;write sing or doub to R register .equ CP_WRITE_S, 0x21 ;write sing or doub to S register .equ CP_WRITE_RS, 0x22 ;write sing operands to R and S .equ CP_WRITE_MODE, 0x23 ;write mode double word to 29027 .equ CP_WRITE_STATUS, 0x24 ;write status word to 29027 .equ CP_WRITE_PREC, 0x25 ;write reg. file precision word ; to 29027 .equ CP_WRITE_INST, 0x26 ;write instruction to 29027 .equ CP_ADV_TEMPS, 0x27 ;move R-Temp, S-Temp into R,S;; read requests; .equ CP_READ_MSBS, 0x00 ;read sing result or MSB of doub .equ CP_READ_LSBS, 0x01 ;read LSB of doub result .equ CP_READ_FLAGS, 0x02 ;read 29027 flag register .equ CP_READ_STATUS, 0x03 ;read 29027 status register .equ CP_SAVE_STATE, 0x04 ;read one word of 29027 state;; "start operation" symbol; this is "OR"ed with a WRITE_R, WRITE_S,; WRITE_RS, or WRITE_INST symbol.; .equ CP_START, 0b1000000 ;bit to start 29027 operation;; "suppress exceptions reporting" symbol; this is "OR"ed with a ed;; .equ CP_NO_ERR, 0b1000000 ;suppress exception reporting; ; during load.; cp_write_r - transfers 32- or 64-bit operand to Am29027; register R; cp_write_s - transfers 32- or 64-bit operand to Am29027; register S; cp_write_rs - transfers two 32-bit floating-point operands to; Am29027 registers R and S; cp_write_prec - transfers a word to the Am29027 precision register; cp_write_status - transfers a word to the Am29027 status register; cp_write_inst - transfers an instruction to the Am29027; instruction register; cp_advance_temps - transfers the contents of the Am29027 temporary; registers to the corresponding working registers; cp_write_mode - transfers a mode specification the the Am29027; mode register; cp_read_dp - read a double-precision floating-point result; from the Am29027; cp_read_sp - read a single-precision floating-point result; from the Am29027; cp_read_int - read an integer result from the Am29027; cp_read_flags - read the contents of the Am29027 flag register; cp_read_status - read the contents of the Am29027 status register; cp_read_state_wd - read a single Am29027 state word; cp_save_state - save Am29027 state; cp_restore_state - restore Am29027 state; cp_build_inst - build an Am29027 instruction; cp_build_inst_h - build 16 MSBs of an Am29027 instruction; cp_build_inst_l - build 16 LSBs of an Am29027 instruction;;;;============================================================================; MACRO NAME: cp_write_r;; WRITTEN BY: Bob Perlman;; MOST RECENT UPDATE: April 16, 1988;; FUNCTION: Transfers a 32- or 64-bit operand to Am29027 input register R;; PARAMETERS:; reg - the Am29000 g.p. register containing the 32-bit operand to be; transferred, or the 32 MSBs of the 64-bit operand to be; transferred.;; LSB_reg - the Am29000 g.p. register containing the 32 LSBs of the; 64-bit operand to be transferred;; INT - indicates that the operand to be transferred is a 32-bit; integer;; START - indicates that a new Am29027 operation is to be started; once the operand has been transferred;;; USAGE:;; cp_write_r reg [,LSB_reg] [,START] for floating-point operands; or cp_write_r reg, INT [,START] for integer operands;; Transferring double-precision floating-point operands - Either of; two forms is acceptable:;; cp_write_r reg; or cp_write_r reg, LSB_reg;; If LSB_reg is omitted, the LSBs are taken from the next g.p.; register.;; Ex: cp_write_r lr2 Transfers the contents of lr2 to; the most-significant half of Am29027; register R, and the contents of lr3; to the least-significant half.;; cp_write_r lr2,lr5 Transfers the contents of lr2 to; the most-significant half of Am29027; register R, and the contents of lr5; to the least-significant half.;;; Transferring single-precision floating-point operands - Use the; form:;; cp_write_r reg;;; Ex: cp_write_r lr2 Transfers the contents of lr2 to; the most-significant half of Am29027; register R, (the contents of lr3; will be transferred to the least-; significant half of register R, but; these bits are don't cares).;;; Transferring integer operands - Use the form:;; cp_write_r reg,INT;;; Ex: cp_write_r lr2,INT Transfers the contents of lr2 to; the least-significant half of Am29027; register R, (the contents of lr2; will also be transferred to the most-; significant half of register R, but; these bits are don't cares).;;; Starting an Am29027 operation - Any of the forms above may be; appended with parameter START, e.g.:;; cp_write_r lr2,START;; cp_write_r lr2,lr5,START;; cp_write_r lr2,INT,START;;;============================================================================; .macro cp_write_r,p1,p2,p3; .if $narg==0 .err .print "cp_WRITE_R: missing parameter(s)" .endif;; .if $narg==1 store 1,CP_WRITE_R,p1,%%((&p1)+1) .exitm .endif;; .if $narg==2; .ifeqs "@p2@","INT" store 1,CP_WRITE_R,p1,p1 .exitm .endif; .ifeqs "@p2@","START" store 1,CP_WRITE_R|CP_START,p1,%%((&p1)+1) .exitm .endif; store 1,CP_WRITE_R,p1,p2 .exitm; .endif;; .if $narg==3; .ifeqs "@p2@","START" .ifeqs "@p3@","INT" store 1,CP_WRITE_R|CP_START,p1,p1 .else .err .print "cp_write_r: bad parameter list" .endif .exitm .endif; .ifeqs "@p2@","INT" .ifeqs "@p3@","START" store 1,CP_WRITE_R|CP_START,p1,p1 .else .err .print "cp_write_r: bad parameter list" .endif .exitm .endif; .ifeqs "@p3@","START" store 1,CP_WRITE_R|CP_START,p1,p2 .else .err .print "cp_write_r: bad parameter list" .endif .exitm; .endif;; .if $narg>=4 .err .print "cp_write_r: too many parameters" .endif; .endm;;;;;;============================================================================; MACRO NAME: cp_write_s;; WRITTEN BY: Bob Perlman;; MOST RECENT UPDATE: April 16, 1988;; FUNCTION: Transfers a 32- or 64-bit operand to Am29027 input register S;; PARAMETERS:; reg - the Am29000 g.p. register containing the 32-bit operand to be; transferred, or the 32 MSBs of the 64-bit operand to be; transferred.;; LSB_reg - the Am29000 g.p. register containing the 32 LSBs of the; 64-bit operand to be transferred;; INT - indicates that the operand to be transferred is a 32-bit; integer;; START - indicates that a new Am29027 operation is to be started; once the operand has been transferred;;
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