📄 mainfilter.asm
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[!A1] STW .D2T2 B5,*+DP(_i$1) ; |193|
.line 6
[ A1] ZERO .D1 A0 ; |189|
[ A1] STW .D2T1 A0,*+DP(_i$1) ; |189|
.line 7
[ A1] LDW .D2T2 *+DP(_j$2),B4 ; |190|
NOP 4
[ A1] ADD .D2 1,B4,B4 ; |190|
[ A1] STW .D2T2 B4,*+DP(_j$2) ; |190|
.line 11
;----------------------------------------------------------------------
; 194 | if(j>200)
;----------------------------------------------------------------------
MVK .S2 200,B5 ; |194|
CMPGTU .L2 B4,B5,B0 ; |194|
.line 13
;----------------------------------------------------------------------
; 196 | j=0;
;----------------------------------------------------------------------
[ B0] ZERO .D1 A0 ; |196|
[ B0] ZERO .S2 B4 ; |196|
|| [ B0] STW .D2T1 A0,*+DP(_j$2) ; |196|
.line 15
;----------------------------------------------------------------------
; 198 | if(j>0&&j<100)
; 200 | GPIO_pinWrite(hGpio,GPIO_PIN13,1);
; 201 | GPIO_pinWrite(hGpio,GPIO_PIN15,0);
; 203 | else
;----------------------------------------------------------------------
CMPEQ .L2 B4,0,B5 ; |198|
|| MVK .S1 0x64,A0 ; |198|
XOR .S2 1,B5,B4 ; |198|
|| CMPLTU .L1X B4,A0,A0 ; |198|
AND .S1X A0,B4,A1 ; |198|
[ A1] B .S1 L1 ; |198|
NOP 5
; BRANCH OCCURS ; |198|
;** --------------------------------------------------------------------------*
.line 23
;----------------------------------------------------------------------
; 206 | GPIO_pinWrite(hGpio,GPIO_PIN13,0);
;----------------------------------------------------------------------
CALL .S1 _GPIO_pinWrite ; |206|
LDW .D2T1 *+DP(_hGpio),A4 ; |206|
MVKL .S2 RL0,B3 ; |206|
MVK .S2 0x2000,B4 ; |206|
MVKH .S2 RL0,B3 ; |206|
ZERO .D1 A6 ; |206|
RL0: ; CALL OCCURS ; |206|
.line 24
;----------------------------------------------------------------------
; 207 | GPIO_pinWrite(hGpio,GPIO_PIN15,1);
;----------------------------------------------------------------------
CALL .S1 _GPIO_pinWrite ; |207|
LDW .D2T1 *+DP(_hGpio),A4 ; |207|
MVKL .S2 RL1,B3 ; |207|
MVKH .S2 RL1,B3 ; |207|
ZERO .D2 B4 ; |207|
SET .S2 B4,0xf,0xf,B4 ; |207|
|| MVK .S1 0x1,A6 ; |207|
RL1: ; CALL OCCURS ; |207|
B .S1 L2 ; |207|
NOP 5
; BRANCH OCCURS ; |207|
;** --------------------------------------------------------------------------*
L1:
.line 17
CALL .S1 _GPIO_pinWrite ; |200|
LDW .D2T1 *+DP(_hGpio),A4 ; |200|
MVKL .S2 RL2,B3 ; |200|
MVK .S2 0x2000,B4 ; |200|
MVKH .S2 RL2,B3 ; |200|
MVK .S1 0x1,A6 ; |200|
RL2: ; CALL OCCURS ; |200|
.line 18
CALL .S1 _GPIO_pinWrite ; |201|
LDW .D2T1 *+DP(_hGpio),A4 ; |201|
MVKL .S2 RL3,B3 ; |201|
MVKH .S2 RL3,B3 ; |201|
ZERO .D2 B4 ; |201|
SET .S2 B4,0xf,0xf,B4 ; |201|
|| ZERO .D1 A6 ; |201|
RL3: ; CALL OCCURS ; |201|
;** --------------------------------------------------------------------------*
L2:
.line 26
LDDW .D2T2 *+SP(72),B5:B4 ; |209|
LDDW .D2T2 *+SP(64),B3:B2 ; |209|
LDDW .D2T2 *+SP(56),B1:B0 ; |209|
LDW .D2T2 *+SP(52),B8 ; |209|
LDW .D2T1 *+SP(48),A9 ; |209|
LDDW .D2T1 *+SP(40),A7:A6 ; |209|
LDDW .D2T1 *+SP(32),A5:A4 ; |209|
LDDW .D2T1 *+SP(24),A3:A2 ; |209|
LDDW .D2T1 *+SP(16),A1:A0 ; |209|
LDW .D2T1 *+SP(12),A8 ; |209|
RET .S2 IRP ; |209|
|| LDDW .D2T2 *+SP(80),B7:B6 ; |209|
LDW .D2T2 *++SP(88),B9 ; |209|
NOP 4
; BRANCH OCCURS ; |209|
.endfunc 209,003ff03ffh,88
.sect ".text"
.global _set_interrupts_edma
.sym _set_interrupts_edma,_set_interrupts_edma, 32, 2, 0
.func 149
;----------------------------------------------------------------------
; 149 | void set_interrupts_edma(void)
;----------------------------------------------------------------------
;******************************************************************************
;* FUNCTION NAME: _set_interrupts_edma *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,SP *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,SP *
;* Local Frame Size : 0 Args + 0 Auto + 4 Save = 4 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o3) may disable key optimizations! *
;* *
;******************************************************************************
_set_interrupts_edma:
;** --------------------------------------------------------------------------*
.line 2
;----------------------------------------------------------------------
; 151 | IRQ_reset(IRQ_EVT_EDMAINT);
; 152 | IRQ_disable(IRQ_EVT_EDMAINT);
; 153 | EDMA_intDisable(12); /* ch 12 for McBSP transmit event XEVT0 */
; 154 | EDMA_intDisable(13); /* ch 13 for McBSP receive event REVT0 */
; 155 | IRQ_clear(IRQ_EVT_EDMAINT);
; 156 | EDMA_intClear(12);
; 157 | EDMA_intClear(13);
; 158 | IRQ_enable(IRQ_EVT_EDMAINT);
; 159 | EDMA_intEnable(12);
; 160 | EDMA_intEnable(13);
; 162 | void init_edma(void)
; 164 | TI_EDMA_CFG();
; 165 | set_interrupts_edma();
; 166 | *(unsigned volatile int *)McBSP0_DXR=SendMcbspDat;
; 167 | *(unsigned volatile int *)McBSP1_DXR=SendMcbspDat;
; 168 | RecvMcbspDat=*(unsigned volatile int *)McBSP0_DRR;
; 171 | interrupt void xint0()
; 173 | if(SendCnt>10000)
; 174 | {SendCnt=0;}
; 175 | else
; 176 | {SendCnt++;}
; 177 | SendMcbspDat=RecvMcbspDat;
; 179 | interrupt void rint0()
; 181 | RecvMcbspDat=*(unsigned volatile int *)McBSP0_DRR;
; 182 | *(unsigned volatile int *)McBSP0_DXR=SendMcbspDat;
; 184 | interrupt void timer0_isr()
; 186 | static unsigned int i=0,j=0;
; 187 | if(i>100)
; 189 | i=0;
; 190 | j++;
; 192 | else
; 193 | {i++;}
; 194 | if(j>200)
; 196 | j=0;
; 198 | if(j>0&&j<100)
; 200 | GPIO_pinWrite(hGpio,GPIO_PIN13,1);
; 201 | GPIO_pinWrite(hGpio,GPIO_PIN15,0);
; 203 | else
; 206 | GPIO_pinWrite(hGpio,GPIO_PIN13,0);
; 207 | GPIO_pinWrite(hGpio,GPIO_PIN15,1);
; 210 | interrupt void ext_int4(void)
; 212 | static Uint32 ExtIntCnt=0;
; 213 | if(ExtIntCnt<0xffff)
; 214 | {ExtIntCnt++;}
; 215 | else
; 216 | {ExtIntCnt=0;}
; 218 | interrupt void c_int08(void) /* vecs.asm hooks this up to IRQ 08 */
; 220 | if (EDMA_intTest(12))
; 222 | xmit0_done = TRUE;
; 223 | EDMA_intClear(12); /* clear CIPR bit so future interrupts can be reco
; | gnized */
; 226 | else if (EDMA_intTest(13))
; 228 | recv0_done = TRUE;
; 229 | EDMA_intClear(13); /* clear CIPR bit so future interrupts can be reco
; | gnized */
; 231 | return;
; 233 | void initrecsendbuf(void)
; 235 | Uint32 i;
; 236 | for(i=0;i<256;i++)
; 237 | { gBufferRcvPing[i]=0x0;
; 238 | gBufferRcvPong[i]=0x0;
; 239 | gBufferXmtPing[i]=i+0xaaaa5555;
; 240 | gBufferXmtPong[i]=i+0xaaaa5555;
; 242 | for(i=0;i<1000;i++)
; 244 | inbuf[i]=0x5432+i;
; 245 | outbuf[i]=0x1000+i;
; 249 | Uint16 bypass_bit=0;
; 250 | void ProcessBlock(short pingpong)
; 252 | Uint16 i=0;
; 253 | if(pingpong==PING) //Ping module
; 255 | for(i=0;i<512;i++)
; 257 | Buffer_iir_l[i]=(float)(gBufferRcvPing[i*2]);
; 258 | Buffer_iir_r[i]=(float)(gBufferRcvPing[i*2+1]);
; 260 | if(bypass_bit==1)
; 262 | DSPF_sp_biquad(Buffer_iir_l,b0,a0,dlyl_0,mid_iir
; | ,512);
; 263 | DSPF_sp_biquad(mid_iir,b1,a1,dlyl_1,Buffer_iir_l
; | ,512);
; 265 | DSPF_sp_biquad(Buffer_iir_r,b0,a0,dlyr_0,mid_iir
; | ,512);
; 266 | DSPF_sp_biquad(mid_iir,b1,a1,dlyr_1,Buffer_iir_r
; | ,512);
; 268 | for(i=0;i<512;i++)
; 270 | gBufferXmtPing[i*2]=(int)(Buffer_iir_l[i]);
; 271 | gBufferXmtPing[i*2+1]=(int)(Buffer_iir_r[i]);
; 275 | if(pingpong==PONG) //Pong module
; 277 | for(i=0;i<512;i++)
; 279 | Buffer_iir_l[i]=(float)gBufferRcvPong[i*2];
;----------------------------------------------------------------------
STW .D2T2 B3,*SP--(8) ; |150|
;----------------------------------------------------------------------
; 280 | Buffer_iir_r[i]=(float)gBufferRcvPong[i*2+1];
;----------------------------------------------------------------------
MVKL .S1 __IRQ_eventTable+32,A0 ; |280|
MVKH .S1 __IRQ_eventTable+32,A0 ; |280|
LDW .D1T1 *A0,A0 ; |280|
NOP 4
MVC .S2 IER,B4 ; |280|
|| NOT .S1 A0,A3 ; |280|
AND .S1X A3,B4,A4 ; |280|
MVC .S2X A4,IER ; |280|
MVC .S2X A0,ICR ; |281|
MVC .S2 IER,B4 ; |241|
AND .S2X A3,B4,B4 ; |241|
MVC .S2 B4,IER ; |241|
.line 5
CALL .S1 _EDMA_intDisable ; |153|
MVKL .S2 RL4,B3 ; |153|
MVK .S1 0xc,A4 ; |153|
MVKH .S2 RL4,B3 ; |153|
NOP 2
RL4: ; CALL OCCURS ; |153|
.line 6
CALL .S1 _EDMA_intDisable ; |154|
MVKL .S2 RL5,B3 ; |154|
MVKH .S2 RL5,B3 ; |154|
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