📄 main.lss
字号:
64e: ca df rcall .-108 ; 0x5e4 <halSpiWriteReg>
650: f8 01 movw r30, r16
652: 64 81 ldd r22, Z+4 ; 0x04
654: 8f e0 ldi r24, 0x0F ; 15
656: c6 df rcall .-116 ; 0x5e4 <halSpiWriteReg>
658: f8 01 movw r30, r16
65a: 65 81 ldd r22, Z+5 ; 0x05
65c: 80 e1 ldi r24, 0x10 ; 16
65e: c2 df rcall .-124 ; 0x5e4 <halSpiWriteReg>
660: f8 01 movw r30, r16
662: 66 81 ldd r22, Z+6 ; 0x06
664: 81 e1 ldi r24, 0x11 ; 17
666: be df rcall .-132 ; 0x5e4 <halSpiWriteReg>
668: f8 01 movw r30, r16
66a: 67 81 ldd r22, Z+7 ; 0x07
66c: 82 e1 ldi r24, 0x12 ; 18
66e: ba df rcall .-140 ; 0x5e4 <halSpiWriteReg>
670: f8 01 movw r30, r16
672: 60 85 ldd r22, Z+8 ; 0x08
674: 83 e1 ldi r24, 0x13 ; 19
676: b6 df rcall .-148 ; 0x5e4 <halSpiWriteReg>
678: f8 01 movw r30, r16
67a: 61 85 ldd r22, Z+9 ; 0x09
67c: 84 e1 ldi r24, 0x14 ; 20
67e: b2 df rcall .-156 ; 0x5e4 <halSpiWriteReg>
680: f8 01 movw r30, r16
682: 62 85 ldd r22, Z+10 ; 0x0a
684: 8a e0 ldi r24, 0x0A ; 10
686: ae df rcall .-164 ; 0x5e4 <halSpiWriteReg>
688: f8 01 movw r30, r16
68a: 63 85 ldd r22, Z+11 ; 0x0b
68c: 85 e1 ldi r24, 0x15 ; 21
68e: aa df rcall .-172 ; 0x5e4 <halSpiWriteReg>
690: f8 01 movw r30, r16
692: 64 85 ldd r22, Z+12 ; 0x0c
694: 81 e2 ldi r24, 0x21 ; 33
696: a6 df rcall .-180 ; 0x5e4 <halSpiWriteReg>
698: f8 01 movw r30, r16
69a: 65 85 ldd r22, Z+13 ; 0x0d
69c: 82 e2 ldi r24, 0x22 ; 34
69e: a2 df rcall .-188 ; 0x5e4 <halSpiWriteReg>
6a0: 6f e0 ldi r22, 0x0F ; 15
6a2: 87 e1 ldi r24, 0x17 ; 23
6a4: 9f df rcall .-194 ; 0x5e4 <halSpiWriteReg>
6a6: f8 01 movw r30, r16
6a8: 66 85 ldd r22, Z+14 ; 0x0e
6aa: 88 e1 ldi r24, 0x18 ; 24
6ac: 9b df rcall .-202 ; 0x5e4 <halSpiWriteReg>
6ae: f8 01 movw r30, r16
6b0: 67 85 ldd r22, Z+15 ; 0x0f
6b2: 89 e1 ldi r24, 0x19 ; 25
6b4: 97 df rcall .-210 ; 0x5e4 <halSpiWriteReg>
6b6: f8 01 movw r30, r16
6b8: 60 89 ldd r22, Z+16 ; 0x10
6ba: 8a e1 ldi r24, 0x1A ; 26
6bc: 93 df rcall .-218 ; 0x5e4 <halSpiWriteReg>
6be: f8 01 movw r30, r16
6c0: 61 89 ldd r22, Z+17 ; 0x11
6c2: 8b e1 ldi r24, 0x1B ; 27
6c4: 8f df rcall .-226 ; 0x5e4 <halSpiWriteReg>
6c6: f8 01 movw r30, r16
6c8: 62 89 ldd r22, Z+18 ; 0x12
6ca: 8c e1 ldi r24, 0x1C ; 28
6cc: 8b df rcall .-234 ; 0x5e4 <halSpiWriteReg>
6ce: f8 01 movw r30, r16
6d0: 63 89 ldd r22, Z+19 ; 0x13
6d2: 8d e1 ldi r24, 0x1D ; 29
6d4: 87 df rcall .-242 ; 0x5e4 <halSpiWriteReg>
6d6: f8 01 movw r30, r16
6d8: 64 89 ldd r22, Z+20 ; 0x14
6da: 83 e2 ldi r24, 0x23 ; 35
6dc: 83 df rcall .-250 ; 0x5e4 <halSpiWriteReg>
6de: f8 01 movw r30, r16
6e0: 65 89 ldd r22, Z+21 ; 0x15
6e2: 84 e2 ldi r24, 0x24 ; 36
6e4: 7f df rcall .-258 ; 0x5e4 <halSpiWriteReg>
6e6: f8 01 movw r30, r16
6e8: 66 89 ldd r22, Z+22 ; 0x16
6ea: 85 e2 ldi r24, 0x25 ; 37
6ec: 7b df rcall .-266 ; 0x5e4 <halSpiWriteReg>
6ee: f8 01 movw r30, r16
6f0: 67 89 ldd r22, Z+23 ; 0x17
6f2: 86 e2 ldi r24, 0x26 ; 38
6f4: 77 df rcall .-274 ; 0x5e4 <halSpiWriteReg>
6f6: f8 01 movw r30, r16
6f8: 60 8d ldd r22, Z+24 ; 0x18
6fa: 89 e2 ldi r24, 0x29 ; 41
6fc: 73 df rcall .-282 ; 0x5e4 <halSpiWriteReg>
6fe: f8 01 movw r30, r16
700: 61 8d ldd r22, Z+25 ; 0x19
702: 8c e2 ldi r24, 0x2C ; 44
704: 6f df rcall .-290 ; 0x5e4 <halSpiWriteReg>
706: f8 01 movw r30, r16
708: 62 8d ldd r22, Z+26 ; 0x1a
70a: 8d e2 ldi r24, 0x2D ; 45
70c: 6b df rcall .-298 ; 0x5e4 <halSpiWriteReg>
70e: f8 01 movw r30, r16
710: 63 8d ldd r22, Z+27 ; 0x1b
712: 8e e2 ldi r24, 0x2E ; 46
714: 67 df rcall .-306 ; 0x5e4 <halSpiWriteReg>
716: f8 01 movw r30, r16
718: 64 8d ldd r22, Z+28 ; 0x1c
71a: 80 e0 ldi r24, 0x00 ; 0
71c: 63 df rcall .-314 ; 0x5e4 <halSpiWriteReg>
71e: f8 01 movw r30, r16
720: 65 8d ldd r22, Z+29 ; 0x1d
722: 82 e0 ldi r24, 0x02 ; 2
724: 5f df rcall .-322 ; 0x5e4 <halSpiWriteReg>
726: f8 01 movw r30, r16
728: 66 8d ldd r22, Z+30 ; 0x1e
72a: 87 e0 ldi r24, 0x07 ; 7
72c: 5b df rcall .-330 ; 0x5e4 <halSpiWriteReg>
72e: f8 01 movw r30, r16
730: 67 8d ldd r22, Z+31 ; 0x1f
732: 88 e0 ldi r24, 0x08 ; 8
734: 57 df rcall .-338 ; 0x5e4 <halSpiWriteReg>
736: f8 01 movw r30, r16
738: 60 a1 ldd r22, Z+32 ; 0x20
73a: 89 e0 ldi r24, 0x09 ; 9
73c: 53 df rcall .-346 ; 0x5e4 <halSpiWriteReg>
73e: f8 01 movw r30, r16
740: 61 a1 ldd r22, Z+33 ; 0x21
742: 86 e0 ldi r24, 0x06 ; 6
744: 4f df rcall .-354 ; 0x5e4 <halSpiWriteReg>
746: 62 e1 ldi r22, 0x12 ; 18
748: 84 e0 ldi r24, 0x04 ; 4
74a: 4c df rcall .-360 ; 0x5e4 <halSpiWriteReg>
74c: 64 e3 ldi r22, 0x34 ; 52
74e: 85 e0 ldi r24, 0x05 ; 5
750: 49 df rcall .-366 ; 0x5e4 <halSpiWriteReg>
752: 41 e0 ldi r20, 0x01 ; 1
754: 61 e7 ldi r22, 0x71 ; 113
756: 70 e0 ldi r23, 0x00 ; 0
758: 8e e3 ldi r24, 0x3E ; 62
75a: 52 df rcall .-348 ; 0x600 <halSpiWriteBurstReg>
75c: 1f 91 pop r17
75e: 0f 91 pop r16
760: 08 95 ret
00000762 <halWait>:
...
}// halSpiWriteBurstReg
//-------------------------------------------------------------------------------------------------------
// void halRfSendPacket(BYTE *txBuffer, UINT8 size)
// 发送一个数据包
// 最大数据包长度<63; GDO0 设置成监听数据包: halSpiWriteReg(CCxxx0_IOCFG0, 0x06);
// 不定长数据包格式,数据包里的第一个字节为数据包长度
// DESCRIPTION:
// This function can be used to transmit a packet with packet length up to 63 bytes.
// To use this function, GD00 must be configured to be asserted when sync word is sent and
// de-asserted at the end of the packet => halSpiWriteReg(CCxxx0_IOCFG0, 0x06);
// The function implements polling of GDO0. First it waits for GD00 to be set and then it waits
// for it to be cleared.
//
// ARGUMENTS:
// BYTE *txBuffer
// Pointer to a buffer containing the data that are going to be transmitted
//
// UINT8 size
// The size of the txBuffer
//-------------------------------------------------------------------------------------------------------
void halRfSendPacket(BYTE *txBuffer, UINT8 size) {
unsigned char i;
//写发送缓冲区
halSpiWriteBurstReg(CCxxx0_TXFIFO, txBuffer, size);
// 进入发送状态
halSpiStrobe(CCxxx0_STX);
// Wait for GDO0 to be set -> sync transmitted
//等待同步字节发出
//inverse the GDO0 pin
while (GDO0_PIN);
// Wait for GDO0 to be cleared -> end of packet
//等待数据包发送完毕
//inverse the GDO0 pin
while (!GDO0_PIN);
// Flush RX FIFO;
//清接收缓冲区
halSpiStrobe(CCxxx0_SFRX);
// Flush TX FIFO;
//清发送缓冲区
halSpiStrobe(CCxxx0_SFTX);
halSpiStrobe(CCxxx0_SIDLE );
for (i=0;i<5;i++)
halWait(200);
}// halRfSendPacket
//-------------------------------------------------------------------------------------------------------
// BOOL halRfReceivePacket(BYTE *rxBuffer, UINT8 *length)
// 接收一个数据包
// 最大数据包长度<63; GDO0 设置成监听数据包: halSpiWriteReg(CCxxx0_IOCFG0, 0x06);
// 不定长数据包格式,数据包里的第一个字节为数据包长度
// DESCRIPTION:
// This function can be used to receive a packet of variable packet length (first byte in the packet
// must be the length byte). The packet length should not exceed the RX FIFO size.
// To use this function, GD00 must be configured to be asserted when sync word is sent and
// de-asserted at the end of the packet => halSpiWriteReg(CCxxx0_IOCFG0, 0x06);
// Also, APPEND_STATUS in the PKTCTRL1 register must be enabled.
// The function implements polling of GDO0. First it waits for GD00 to be set and then it waits
// for it to be cleared.
// After the GDO0 pin has been de-asserted, the RXBYTES register is read to make sure that there
// are bytes in the FIFO. This is because the GDO signal will indicate sync received even if the
// FIFO is flushed due to address filtering, CRC filtering, or packet length filtering.
//
// ARGUMENTS:
// BYTE *rxBuffer
// Pointer to the buffer where the incoming data should be stored
// UINT8 *length
// Pointer to a variable containing the size of the buffer where the incoming data should be
// stored. After this function returns, that variable holds the packet length.
//
// RETURN VALUE:
// BOOL
// TRUE: CRC OK
// FALSE: CRC NOT OK (or no packet was put in the RX FIFO due to filtering)
//-------------------------------------------------------------------------------------------------------
BOOL halRfReceivePacket(BYTE *rxBuffer, UINT8 length) {
BYTE status[2];
UINT8 packetLength;
BYTE *p;
#if 0
//进入接收状态
halSpiStrobe(CCxxx0_SRX);
// Wait for GDO0 to be set -> sync received
//等待同步字节到来
while (!GDO0_PIN);
// Wait for GDO0 to be cleared -> end of packet
//等待数据包接收完毕
while (GDO0_PIN);
#endif
//判断缓冲区里字节数
if ((halSpiReadStatus(CCxxx0_RXBYTES) & BYTES_IN_RXFIFO)) {
// Read length byte
//读取缓冲区里字节数
packetLength = halSpiReadReg(CCxxx0_RXFIFO);
//UART0_WAIT_AND_SEND(packetLength);
//UART0_WAIT_AND_SEND(length);
p = rxBuffer;
p++;
// Read data from RX FIFO and store in rxBuffer
//从接收缓冲区里读取数据
if (packetLength <= length) {
//halSpiReadBurstReg(CCxxx0_RXFIFO, rxBuffer, packetLength);
halSpiReadBurstReg(CCxxx0_RXFIFO, p, packetLength);
rxBuffer[0] = packetLength;
// writeln(rxBuffer);
// Read the 2 appended status bytes (status[0] = RSSI, status[1] = LQI)
//最后两位为数据包完整性校验字节;系统芯片自己加上
halSpiReadBurstReg(CCxxx0_RXFIFO, status, 2);
// Flush RX FIFO;
//清接收缓冲区
halSpiStrobe(CCxxx0_SFRX);
// MSB of LQI is the CRC_OK bit
//回返校验位情况
return (status[LQI] & CRC_OK);
//return 1;
} else {
//*length = packetLength;
writeln("Error !!!");
// Flush RX FIFO
//清接收缓冲区
halSpiStrobe(CCxxx0_SFRX);
return FALSE;
}
} else
{ return FALSE;
}
}// halRfReceivePacket
//-------------------------------------------------------------------------------------------------------
// void halWait(BYTE timeout)
//
// DESCRIPTION:
// Runs an idle loop for [timeout] microseconds.
//
// ARGUMENTS:
// BYTE timeout
// The timeout in microseconds
//-------------------------------------------------------------------------------------------------------
void halWait(BYTE timeout)
{
// This sequence uses exactly 8 clock cycle for each round
do {
NOP();
NOP();
NOP();
NOP();
} while (--timeout);
76a: 81 50 subi r24, 0x01 ; 1
76c: d1 f7 brne .-12 ; 0x762 <halWait>
76e: 08 95 ret
00000770 <halRfSendPacket>:
770: cf 93 push r28
772: 9c 01 movw r18, r24
774: 46 2f mov r20, r22
776: b9 01 movw r22, r18
778: 8f e3 ldi r24, 0x3F ; 63
77a: 42 df rcall .-380 ; 0x600 <halSpiWriteBurstReg>
77c: 85 e3 ldi r24, 0x35 ; 53
77e: 27 df rcall .-434 ; 0x5ce <halSpiStrobe>
780: 83 99 sbic 0x10, 3 ; 16
782: fe cf rjmp .-4 ; 0x780 <halRfSendPacket+0x10>
784: 83 9b sbis 0x10, 3 ; 16
786: fe cf rjmp .-4 ; 0x784 <halRfSendPacket+0x14>
788: 8a e3 ldi r24, 0x3A ; 58
78a: 21 df rcall .-446 ; 0x5ce <halSpiStrobe>
78c: 8b e3 ldi r24, 0x3B ; 59
78e: 1f df rcall .-450 ; 0x5ce <halSpiStrobe>
790: 86 e3 ldi r24, 0x36 ; 54
792: 1d df rcall .-454 ; 0x5ce <halSpiStrobe>
794: c4 e0 ldi r28, 0x04 ; 4
796: 88 ec ldi r24, 0xC8 ; 200
798: e4 df rcall .-56 ; 0x762 <halWait>
79a: c1 50 subi r28, 0x01 ; 1
79c: c7 ff sbrs r28, 7
79e: fb cf rjmp .-10 ; 0x796 <halRfSendPacket+0x26>
7a0: cf 91 pop r28
7a2: 08 95 ret
000007a4 <halRfReceivePacket>:
7a4: ef 92 push r14
7a6: ff 92 push r15
7a8: 0f 93 push r16
7aa: 1f 93 push r17
7ac: cf 93 push r28
7ae: df 93 push r29
7b0: cd b7 in r28, 0x3d ; 61
7b2: de b7 in r29, 0x3e ; 62
7b4: 22 97 sbiw r28, 0x02 ; 2
7b6: 0f b6 in r0, 0x3f ; 63
7b8: f8 94 cli
7ba: de bf out 0x3e, r29 ; 62
7bc: 0f be out 0x3f, r0 ; 63
7be: cd bf out 0x3d, r28 ; 61
7c0: 7c 01 movw r14, r24
7c2: 06 2f mov r16, r22
7c4: 8b e3 ldi r24, 0x3B ; 59
7c6: d6 de rcall .-596 ; 0x574 <halSpiReadStatus>
7c8: 99 27 eor r25, r25
7ca: 8f 77 andi r24, 0x7F ; 127
7cc: 90 70 andi r25, 0x00 ; 0
7ce: 00 97 sbiw r24, 0x00 ; 0
7d0: 09 f1 breq .+66 ; 0x814 <halRfReceivePacket+0x70>
7d2: 8f e3 ldi r24, 0x3F ; 63
7d4: be de rcall .-644 ; 0x552 <halSpiReadReg>
7d6: 18 2f mov r17, r24
7d8: b7 01 movw r22, r14
7da: 6f 5f subi r22, 0xFF ; 255
7dc: 7f 4f
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