📄 main.lss
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526: 85 bf out 0x35, r24 ; 53
528: 85 b7 in r24, 0x35 ; 53
52a: 8f 77 andi r24, 0x7F ; 127
52c: 85 bf out 0x35, r24 ; 53
52e: c0 e0 ldi r28, 0x00 ; 0
530: d0 e0 ldi r29, 0x00 ; 0
532: 80 91 b6 04 lds r24, 0x04B6
536: 88 23 and r24, r24
538: 39 f4 brne .+14 ; 0x548 <wor_ctr+0x70>
53a: 88 ec ldi r24, 0xC8 ; 200
53c: 12 d1 rcall .+548 ; 0x762 <halWait>
53e: 21 96 adiw r28, 0x01 ; 1
540: 87 e0 ldi r24, 0x07 ; 7
542: c0 3d cpi r28, 0xD0 ; 208
544: d8 07 cpc r29, r24
546: a8 f3 brcs .-22 ; 0x532 <wor_ctr+0x5a>
548: 10 92 b6 04 sts 0x04B6, r1
54c: df 91 pop r29
54e: cf 91 pop r28
550: 08 95 ret
00000552 <halSpiReadReg>:
// Value of the accessed CCxxx0 register.
//-------------------------------------------------------------------------------------------------------
BYTE halSpiReadReg(BYTE addr) {
UINT8 x;
SPI_ENABLE();
552: c2 98 cbi 0x18, 2 ; 24
NOP();
554: 00 00 nop
while(MISO_1);
556: b4 99 sbic 0x16, 4 ; 22
558: fe cf rjmp .-4 ; 0x556 <halSpiReadReg+0x4>
NOP();
55a: 00 00 nop
FASTSPI_TX(addr | READ_SINGLE);
55c: 80 68 ori r24, 0x80 ; 128
55e: 8f b9 out 0x0f, r24 ; 15
560: 77 9b sbis 0x0e, 7 ; 14
562: fe cf rjmp .-4 ; 0x560 <halSpiReadReg+0xe>
FASTSPI_RX(x);
564: 1f b8 out 0x0f, r1 ; 15
566: 77 9b sbis 0x0e, 7 ; 14
568: fe cf rjmp .-4 ; 0x566 <halSpiReadReg+0x14>
56a: 8f b1 in r24, 0x0f ; 15
NOP();
56c: 00 00 nop
SPI_DISABLE();
56e: c2 9a sbi 0x18, 2 ; 24
return x;
}// halSpiReadReg
570: 99 27 eor r25, r25
572: 08 95 ret
00000574 <halSpiReadStatus>:
//-------------------------------------------------------------------------------------------------------
// BYTE halSpiReadStatus(BYTE addr)
// 读CC1100 状态寄存器
// DESCRIPTION:
// This function reads a CCxxx0 status register.
//
// ARGUMENTS:
// BYTE addr
// Address of the CCxxx0 status register to be accessed.
//
// RETURN VALUE:
// BYTE
// Value of the accessed CCxxx0 status register.
//-------------------------------------------------------------------------------------------------------
BYTE halSpiReadStatus(BYTE addr) {
UINT8 x;
SPI_ENABLE();
574: c2 98 cbi 0x18, 2 ; 24
NOP();
576: 00 00 nop
while(MISO_1);
578: b4 99 sbic 0x16, 4 ; 22
57a: fe cf rjmp .-4 ; 0x578 <halSpiReadStatus+0x4>
NOP();
57c: 00 00 nop
FASTSPI_TX(addr | READ_BURST);
57e: 80 6c ori r24, 0xC0 ; 192
580: 8f b9 out 0x0f, r24 ; 15
582: 77 9b sbis 0x0e, 7 ; 14
584: fe cf rjmp .-4 ; 0x582 <halSpiReadStatus+0xe>
FASTSPI_RX(x);
586: 1f b8 out 0x0f, r1 ; 15
588: 77 9b sbis 0x0e, 7 ; 14
58a: fe cf rjmp .-4 ; 0x588 <halSpiReadStatus+0x14>
58c: 8f b1 in r24, 0x0f ; 15
NOP();
58e: 00 00 nop
SPI_DISABLE();
590: c2 9a sbi 0x18, 2 ; 24
return x;
}// halSpiReadStatus
592: 99 27 eor r25, r25
594: 08 95 ret
00000596 <halSpiReadBurstReg>:
//-------------------------------------------------------------------------------------------------------
// void halSpiReadBurstReg(BYTE addr, BYTE *buffer, BYTE count)
// 连续读取缓冲区数据
// DESCRIPTION:
// This function reads multiple CCxxx0 register, using SPI burst access.
//
// ARGUMENTS:
// BYTE addr
// Address of the first CCxxx0 register to be accessed.
// BYTE *buffer
// Pointer to a byte array which stores the values read from a
// corresponding range of CCxxx0 registers.
// BYTE count
// Number of bytes to be written to the subsequent CCxxx0 registers.
//-------------------------------------------------------------------------------------------------------
void halSpiReadBurstReg(BYTE addr, BYTE *buffer, BYTE count) {
596: db 01 movw r26, r22
UINT8 i;
SPI_ENABLE();
598: c2 98 cbi 0x18, 2 ; 24
while(MISO_1);
59a: b4 99 sbic 0x16, 4 ; 22
59c: fe cf rjmp .-4 ; 0x59a <halSpiReadBurstReg+0x4>
NOP();
59e: 00 00 nop
FASTSPI_TX(addr | READ_BURST);
5a0: 80 6c ori r24, 0xC0 ; 192
5a2: 8f b9 out 0x0f, r24 ; 15
5a4: 77 9b sbis 0x0e, 7 ; 14
5a6: fe cf rjmp .-4 ; 0x5a4 <halSpiReadBurstReg+0xe>
for (i = 0; i < count; i++)
5a8: 90 e0 ldi r25, 0x00 ; 0
5aa: 94 17 cp r25, r20
5ac: 50 f4 brcc .+20 ; 0x5c2 <halSpiReadBurstReg+0x2c>
{
FASTSPI_RX(buffer[i]);
5ae: 1f b8 out 0x0f, r1 ; 15
5b0: 77 9b sbis 0x0e, 7 ; 14
5b2: fe cf rjmp .-4 ; 0x5b0 <halSpiReadBurstReg+0x1a>
5b4: fd 01 movw r30, r26
5b6: e9 0f add r30, r25
5b8: f1 1d adc r31, r1
5ba: 8f b1 in r24, 0x0f ; 15
5bc: 80 83 st Z, r24
5be: 9f 5f subi r25, 0xFF ; 255
5c0: f4 cf rjmp .-24 ; 0x5aa <halSpiReadBurstReg+0x14>
}
NOP();
5c2: 00 00 nop
SPI_DISABLE();
5c4: c2 9a sbi 0x18, 2 ; 24
buffer[i] = 0; // add a terminal char
5c6: a9 0f add r26, r25
5c8: b1 1d adc r27, r1
5ca: 1c 92 st X, r1
5cc: 08 95 ret
000005ce <halSpiStrobe>:
}// halSpiReadBurstReg
//-------------------------------------------------------------------------------------------------------
// void halSpiStrobe(BYTE strobe)
// 发送命令字节
// DESCRIPTION:
// Function for writing a strobe command to the CCxxx0
//
// ARGUMENTS:
// BYTE strobe
// Strobe command
//-------------------------------------------------------------------------------------------------------
void halSpiStrobe(BYTE strobe) {
SPI_ENABLE();
5ce: c2 98 cbi 0x18, 2 ; 24
NOP();
5d0: 00 00 nop
while(MISO_1);
5d2: b4 99 sbic 0x16, 4 ; 22
5d4: fe cf rjmp .-4 ; 0x5d2 <halSpiStrobe+0x4>
NOP();
5d6: 00 00 nop
FASTSPI_TX(strobe);
5d8: 8f b9 out 0x0f, r24 ; 15
5da: 77 9b sbis 0x0e, 7 ; 14
5dc: fe cf rjmp .-4 ; 0x5da <halSpiStrobe+0xc>
NOP();
5de: 00 00 nop
SPI_DISABLE();
5e0: c2 9a sbi 0x18, 2 ; 24
5e2: 08 95 ret
000005e4 <halSpiWriteReg>:
// FASTSPI_STROBE(strobe);
}// halSpiStrobe
//-------------------------------------------------------------------------------------------------------
// void halSpiWriteReg(BYTE addr, BYTE value)
// 写单个寄存器
// DESCRIPTION:
// Function for writing to a single CCxxx0 register
//
// ARGUMENTS:
// BYTE addr
// Address of a specific CCxxx0 register to accessed.
// BYTE value
// Value to be written to the specified CCxxx0 register.
//-------------------------------------------------------------------------------------------------------
void halSpiWriteReg(BYTE addr, BYTE value) {
SPI_ENABLE();
5e4: c2 98 cbi 0x18, 2 ; 24
NOP();
5e6: 00 00 nop
while(MISO_1);
5e8: b4 99 sbic 0x16, 4 ; 22
5ea: fe cf rjmp .-4 ; 0x5e8 <halSpiWriteReg+0x4>
NOP();
5ec: 00 00 nop
FASTSPI_TX(addr);
5ee: 8f b9 out 0x0f, r24 ; 15
5f0: 77 9b sbis 0x0e, 7 ; 14
5f2: fe cf rjmp .-4 ; 0x5f0 <halSpiWriteReg+0xc>
FASTSPI_TX(value);
5f4: 6f b9 out 0x0f, r22 ; 15
5f6: 77 9b sbis 0x0e, 7 ; 14
5f8: fe cf rjmp .-4 ; 0x5f6 <halSpiWriteReg+0x12>
NOP();
5fa: 00 00 nop
SPI_DISABLE();
5fc: c2 9a sbi 0x18, 2 ; 24
5fe: 08 95 ret
00000600 <halSpiWriteBurstReg>:
}// halSpiWriteReg
//-------------------------------------------------------------------------------------------------------
// void RfWriteRfSettings(RF_SETTINGS *pRfSettings)
// 设置寄存器
// DESCRIPTION:
// This function is used to configure the CC2500 based on a given rf setting
//
// ARGUMENTS:
// RF_SETTINGS *pRfSettings
// Pointer to a struct containing rf register settings
//-------------------------------------------------------------------------------------------------------
void halRfWriteRfSettings(RF_SETTINGS *pRfSettings) {
// Write register settings
halSpiWriteReg(CCxxx0_FSCTRL1, pRfSettings->FSCTRL1);
halSpiWriteReg(CCxxx0_FSCTRL0, pRfSettings->FSCTRL0);
halSpiWriteReg(CCxxx0_FREQ2, pRfSettings->FREQ2);
halSpiWriteReg(CCxxx0_FREQ1, pRfSettings->FREQ1);
halSpiWriteReg(CCxxx0_FREQ0, pRfSettings->FREQ0);
halSpiWriteReg(CCxxx0_MDMCFG4, pRfSettings->MDMCFG4);
halSpiWriteReg(CCxxx0_MDMCFG3, pRfSettings->MDMCFG3);
halSpiWriteReg(CCxxx0_MDMCFG2, pRfSettings->MDMCFG2);
halSpiWriteReg(CCxxx0_MDMCFG1, pRfSettings->MDMCFG1);
halSpiWriteReg(CCxxx0_MDMCFG0, pRfSettings->MDMCFG0);
halSpiWriteReg(CCxxx0_CHANNR, pRfSettings->CHANNR);
halSpiWriteReg(CCxxx0_DEVIATN, pRfSettings->DEVIATN);
#ifdef _DEV_RX_
halSpiWriteReg(CCxxx0_WOREVT1, 0x0E); // sleep counter
halSpiWriteReg(CCxxx0_WOREVT0, 0xEE); //
#endif
halSpiWriteReg(CCxxx0_FREND1, pRfSettings->FREND1);
halSpiWriteReg(CCxxx0_FREND0, pRfSettings->FREND0);
#ifdef _DEV_RX_
halSpiWriteReg(CCxxx0_MCSM2 , 0x00 ); // about 1.95% working counter
#endif
halSpiWriteReg(CCxxx0_MCSM1 ,0x0F);
halSpiWriteReg(CCxxx0_MCSM0 , pRfSettings->MCSM0 );
halSpiWriteReg(CCxxx0_FOCCFG, pRfSettings->FOCCFG);
halSpiWriteReg(CCxxx0_BSCFG, pRfSettings->BSCFG);
halSpiWriteReg(CCxxx0_AGCCTRL2, pRfSettings->AGCCTRL2);
halSpiWriteReg(CCxxx0_AGCCTRL1, pRfSettings->AGCCTRL1);
halSpiWriteReg(CCxxx0_AGCCTRL0, pRfSettings->AGCCTRL0);
halSpiWriteReg(CCxxx0_FSCAL3, pRfSettings->FSCAL3);
halSpiWriteReg(CCxxx0_FSCAL2, pRfSettings->FSCAL2);
halSpiWriteReg(CCxxx0_FSCAL1, pRfSettings->FSCAL1);
halSpiWriteReg(CCxxx0_FSCAL0, pRfSettings->FSCAL0);
halSpiWriteReg(CCxxx0_FSTEST, pRfSettings->FSTEST);
halSpiWriteReg(CCxxx0_TEST2, pRfSettings->TEST2);
halSpiWriteReg(CCxxx0_TEST1, pRfSettings->TEST1);
halSpiWriteReg(CCxxx0_TEST0, pRfSettings->TEST0);
halSpiWriteReg(CCxxx0_IOCFG2, pRfSettings->IOCFG2);
halSpiWriteReg(CCxxx0_IOCFG0, pRfSettings->IOCFG0);
halSpiWriteReg(CCxxx0_PKTCTRL1, pRfSettings->PKTCTRL1);
halSpiWriteReg(CCxxx0_PKTCTRL0, pRfSettings->PKTCTRL0);
halSpiWriteReg(CCxxx0_ADDR, pRfSettings->ADDR);
halSpiWriteReg(CCxxx0_PKTLEN, pRfSettings->PKTLEN);
// Set Syn Byte
halSpiWriteReg(CCxxx0_SYNC1, 0x12); //
halSpiWriteReg(CCxxx0_SYNC0, 0x34);
halSpiWriteBurstReg(CCxxx0_PATABLE, paTable, sizeof(paTable));
}// halRfWriteRfSettings
//-------------------------------------------------------------------------------------------------------
// void halSpiWriteBurstReg(BYTE addr, BYTE *buffer, BYTE count)
// 写多个寄存器
// DESCRIPTION:
// This function writes to multiple CCxxx0 register, using SPI burst access.
//
// ARGUMENTS:
// BYTE addr
// Address of the first CCxxx0 register to be accessed.
// BYTE *buffer
// Array of bytes to be written into a corresponding range of
// CCxx00 registers, starting by the address specified in _addr_.
// BYTE count
// Number of bytes to be written to the subsequent CCxxx0 registers.
//-------------------------------------------------------------------------------------------------------
void halSpiWriteBurstReg(BYTE addr, BYTE *buffer, BYTE count) {
UINT8 i;
SPI_ENABLE();
600: c2 98 cbi 0x18, 2 ; 24
while((MISO_1));
602: b4 99 sbic 0x16, 4 ; 22
604: fe cf rjmp .-4 ; 0x602 <halSpiWriteBurstReg+0x2>
FASTSPI_TX(addr | WRITE_BURST);
606: 80 64 ori r24, 0x40 ; 64
608: 8f b9 out 0x0f, r24 ; 15
60a: 77 9b sbis 0x0e, 7 ; 14
60c: fe cf rjmp .-4 ; 0x60a <halSpiWriteBurstReg+0xa>
for (i = 0; i < count; i++) {
60e: 90 e0 ldi r25, 0x00 ; 0
610: 94 17 cp r25, r20
612: 48 f4 brcc .+18 ; 0x626 <halSpiWriteBurstReg+0x26>
FASTSPI_TX(buffer[i]);
614: fb 01 movw r30, r22
616: e9 0f add r30, r25
618: f1 1d adc r31, r1
61a: 80 81 ld r24, Z
61c: 8f b9 out 0x0f, r24 ; 15
61e: 77 9b sbis 0x0e, 7 ; 14
620: fe cf rjmp .-4 ; 0x61e <halSpiWriteBurstReg+0x1e>
622: 9f 5f subi r25, 0xFF ; 255
624: f5 cf rjmp .-22 ; 0x610 <halSpiWriteBurstReg+0x10>
}
SPI_DISABLE();
626: c2 9a sbi 0x18, 2 ; 24
628: 08 95 ret
0000062a <halRfWriteRfSettings>:
62a: 0f 93 push r16
62c: 1f 93 push r17
62e: 8c 01 movw r16, r24
630: fc 01 movw r30, r24
632: 60 81 ld r22, Z
634: 8b e0 ldi r24, 0x0B ; 11
636: d6 df rcall .-84 ; 0x5e4 <halSpiWriteReg>
638: f8 01 movw r30, r16
63a: 61 81 ldd r22, Z+1 ; 0x01
63c: 8c e0 ldi r24, 0x0C ; 12
63e: d2 df rcall .-92 ; 0x5e4 <halSpiWriteReg>
640: f8 01 movw r30, r16
642: 62 81 ldd r22, Z+2 ; 0x02
644: 8d e0 ldi r24, 0x0D ; 13
646: ce df rcall .-100 ; 0x5e4 <halSpiWriteReg>
648: f8 01 movw r30, r16
64a: 63 81 ldd r22, Z+3 ; 0x03
64c: 8e e0 ldi r24, 0x0E ; 14
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