📄 uart.c
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#include "include.h"
void decode_cmd(void);
enum
{
SCI_IDLE=0,
SCI_DIR,
SCI_NUM,
//SCI_DATA,
SCI_CHECK_END
}SCI_state;
//#define
union
{
unsigned char val[SCI_FIFO_SIZE];
struct
{
unsigned char header;
unsigned char ucDir;
unsigned char ucNum;
unsigned long ulSiteAddr;
unsigned long ulRouter[3];
unsigned char ucCmd;
unsigned char *ucData;
};
}ucUART_FIFO;
volatile unsigned char ucFIFO[SCI_FIFO_SIZE], UartReadPos, UartWritePos, ucSCI_newFlag, ucSCI_Cnt;
//volatile unsigned char UartReadPos, UartWritePos, ucSCInew;
extern _DEF_ADDR_ ulNetAddr, ulRouter[3];
//--------------------------------------------------------------------
#define MAX_CYL 100
#define DATA_POS 5 //
void ucCheckUart(void)
{
unsigned char ucUartRxData;
unsigned char ucCyl,i,j,k;
//unsigned char ucTotal;
SCI_state = SCI_IDLE;
ucSCI_Cnt = 0;
i = 0;
for(ucCyl = 0;ucCyl<MAX_CYL; ucCyl++)
{
for (j = 0;j<25;j++) //wait the cmd string to be finished; about 5ms each cylcle.
halWait(200);
//while (UartReadPos != UartWritePos||newData_SCI||(rdLoop!=wrLoop))
while ((UartReadPos != UartWritePos))
{
switch (SCI_state)
{
case SCI_IDLE:
ucUartRxData = ucFIFO[UartReadPos++];
if(ucUartRxData == 0x68)
{
//SCI_state = SCI_DIR;
SCI_state = SCI_CHECK_END;
ucUART_FIFO.val[i++] = ucUartRxData;
//i++;
}else{
ucSCI_newFlag = 0;
}
if(UartReadPos >=SCI_FIFO_SIZE)
UartReadPos = 0;
break;
#if 0
case SCI_DIR:
ucUartRxData = ucFIFO[UartReadPos++];
ucUART_FIFO.val[i++] = ucUartRxData;
if(UartReadPos >=SCI_FIFO_SIZE)
UartReadPos = 0;
SCI_state = SCI_NUM;
break;
case SCI_NUM:
ucUartRxData = ucFIFO[UartReadPos++];
ucUART_FIFO.val[i++] = ucUartRxData;
if(UartReadPos >=SCI_FIFO_SIZE)
UartReadPos = 0;
SCI_state = SCI_CHECK_END;
break;
//case SCI_DATA:
//break;
#endif
case SCI_CHECK_END:
ucUartRxData = ucFIFO[UartReadPos++];
if(i>=DATA_POS)
{
if(ucUartRxData !=0x16)
{ucUART_FIFO.val[i++] = ucUartRxData;
}else{
ucUART_FIFO.val[i++] = ucUartRxData;
ucUART_FIFO.val[i] = 0; // add a terminal char
SCI_state = SCI_IDLE;
ucCyl =MAX_CYL;
ucSCI_Cnt = i;
decode_cmd();
}
}else{
ucUART_FIFO.val[i++] = ucUartRxData;
}
//check the read pointer pos.
if(UartReadPos >=SCI_FIFO_SIZE)
UartReadPos = 0;
//SCI_state = SCI_CHECK_END;
//ucSCI_newFlag = 1;
break;
default:
SCI_state = SCI_IDLE;
ucCyl =MAX_CYL;
break;
} //switch
} //while
} //for
//return
} //unsigned char ucCheckUart(void)
//--------------------------------------------------------------------
void decode_cmd(void)
{
unsigned char i;
unsigned long addr_f;
switch (ucUART_FIFO.ucDir)
{
case 0xA1: //modify address
ulNetAddr.val = ucUART_FIFO.ulSiteAddr;
ulRouter[0].val = ucUART_FIFO.ulRouter[0];
ulRouter[1].val = ucUART_FIFO.ulRouter[1];
ulRouter[2].val = ucUART_FIFO.ulRouter[2];
//enable it when needed
#if 1
write("\n\rAddr - ");
for(i=0;i<4;i++)
UART0_WAIT_AND_SEND(ulNetAddr.ucByte[i]);
//write("\n\rR1 - ");
for(i=0;i<4;i++)
UART0_WAIT_AND_SEND(ulRouter[0].ucByte[i]);
//write("\n\rR1 - ");
for(i=0;i<4;i++)
UART0_WAIT_AND_SEND(ulRouter[1].ucByte[i]);
for(i=0;i<4;i++)
UART0_WAIT_AND_SEND(ulRouter[2].ucByte[i]);
#endif
//example
addr_f = ulNetAddr.ucByte[i];
//halSpiWriteReg(CCxxx0_SYNC1, ulRouter[0].ucByte[0]);
//halSpiWriteReg(CCxxx0_SYNC0, ulRouter[0].ucByte[1]);
//end
//eeprom_write_block()
ucSCI_Cnt = 0;
break;
case 0x00:
ulRouter[0].val = ucUART_FIFO.ulRouter[0];
DISABLE_GLOBAL_INT(); // Enable all interrupts
UART0_WAIT_AND_SEND(ulRouter[0].ucByte[0]);
UART0_WAIT_AND_SEND(ulRouter[0].ucByte[1]);
halSpiWriteReg(CCxxx0_SYNC1,(unsigned char)( ulRouter[0].ucByte[0]));
halSpiWriteReg(CCxxx0_SYNC0, (unsigned char)(ulRouter[0].ucByte[1]));
halWait(200);
ENABLE_GLOBAL_INT(); // Enable all interrupts
if(ucUART_FIFO.ucNum >0)
{for(i=3;i<ucSCI_Cnt;i++)
ucUART_FIFO.val[i] = ucUART_FIFO.val[i+4];}
break;
default:
break;
}
}
//--------------------------------------------------------------------
SIGNAL(SIG_UART_RECV)
{
unsigned char ucRxChar,tmpchar,ucCtlFlag;
ucRxChar = UDR;
ucSCI_newFlag = 1;
ucFIFO[UartWritePos] = ucRxChar;
if(++UartWritePos >=SCI_FIFO_SIZE)
UartWritePos = 0;
} //SIGNAL(SIG_UART_RECV)
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