📄 uart_main.s
字号:
.module uart_main.c
.area text(rom, con, rel)
.dbfile D:\ICCTES~1\1128\uart_main.c
.dbfunc e test _test fV
.even
_test::
.dbline -1
.dbline 13
; // ICC-AVR application builder : 2007-11-28 8:53:26
; // Target : M48
; // Crystal: 8.0000Mhz
;
; #include <iom48v.h>
; #include <macros.h>
; #include "main.h"
; #include "modbus.h"
; #include "timer2.h"
; #include "led.h"
;
; void test(void)
; {
.dbline 15
; // LedShowLink = 5678;
; testVarAnalog = 0x0102;
ldi R24,258
ldi R25,1
sts _testVarAnalog+1,R25
sts _testVarAnalog,R24
.dbline 16
; testVarPoint = 0x0304;
ldi R24,772
ldi R25,3
sts _testVarPoint+1,R25
sts _testVarPoint,R24
.dbline 17
; testVarInputUp = 0x0506;
ldi R24,1286
ldi R25,5
sts _testVarInputUp+1,R25
sts _testVarInputUp,R24
.dbline 18
; testVarInputDown = 0x0708;
ldi R24,1800
ldi R25,7
sts _testVarInputDown+1,R25
sts _testVarInputDown,R24
.dbline -2
L5:
.dbline 0 ; func end
ret
.dbend
.dbfunc e delay _delay fV
; num -> R16,R17
.even
_delay::
.dbline -1
.dbline 22
; }
;
; void delay(uint num)
; {
L7:
.dbline 24
L8:
.dbline 23
; while(num-->0)
movw R2,R16
subi R16,1
sbci R17,0
tst R2
brne L7
tst R3
brne L7
X0:
.dbline -2
L6:
.dbline 0 ; func end
ret
.dbsym r num 16 i
.dbend
.dbfunc e port_init _port_init fV
.even
_port_init::
.dbline -1
.dbline 28
; ;
; }
;
; void port_init(void)
; {
.dbline 29
; PORTB = 0x00;
clr R2
out 0x5,R2
.dbline 30
; DDRB = 0x00;
out 0x4,R2
.dbline 31
; PORTC = 0x00; //m103 output only
out 0x8,R2
.dbline 32
; DDRC = 0x00;
out 0x7,R2
.dbline 33
; PORTD = 0x00;
out 0xb,R2
.dbline 34
; DDRD = 0x00;
out 0xa,R2
.dbline -2
L10:
.dbline 0 ; func end
ret
.dbend
.area vector(rom, abs)
.org 18
rjmp _timer2_ovf_isr
.area text(rom, con, rel)
.dbfile D:\ICCTES~1\1128\uart_main.c
.dbfunc e timer2_ovf_isr _timer2_ovf_isr fV
.even
_timer2_ovf_isr::
st -y,R24
in R24,0x3f
st -y,R24
.dbline -1
.dbline 39
; }
;
; #pragma interrupt_handler timer2_ovf_isr:10
; void timer2_ovf_isr(void)
; {
.dbline 40
; TCNT2 = 0x83; //reload counter value
ldi R24,131
sts 178,R24
.dbline 42
;
; timeBase.bits.bt1ms = 1;
lds R24,_timeBase
ori R24,2
sts _timeBase,R24
.dbline -2
L11:
ld R24,y+
out 0x3f,R24
ld R24,y+
.dbline 0 ; func end
reti
.dbend
.area vector(rom, abs)
.org 36
rjmp _uart0_rx_isr
.area text(rom, con, rel)
.dbfile D:\ICCTES~1\1128\uart_main.c
.dbfunc e uart0_rx_isr _uart0_rx_isr fV
; tmp -> R16
.even
_uart0_rx_isr::
st -y,R2
st -y,R16
st -y,R24
st -y,R25
st -y,R30
st -y,R31
in R2,0x3f
st -y,R2
.dbline -1
.dbline 47
; }
;
; #pragma interrupt_handler uart0_rx_isr:19
; void uart0_rx_isr(void)
; {
.dbline 49
; uint8 tmp;
; receTimeOut = 10; //通讯超时值
ldi R24,10
sts _receTimeOut,R24
.dbline 53
; //PORTC ^= 0x02;
;
;
; if(UCSR0A&BIT(FE0) != 0) //帧错. //if(FERR==1)
lds R2,192
sbrs R2,0
rjmp L13
.dbline 54
; {
.dbline 55
; UCSR0B &= ~BIT(RXEN0); //CREN = 0;
lds R24,193
andi R24,239
sts 193,R24
.dbline 56
; UCSR0A &= ~BIT(FE0); //FERR = 0;
lds R24,192
andi R24,239
sts 192,R24
.dbline 57
; UCSR0B |= BIT(RXEN0); //CREN = 1;
lds R24,193
ori R24,16
sts 193,R24
.dbline 58
; tmp = UDR0;
lds R16,198
.dbline 60
; //PORTC ^= 0x02;
; }
rjmp L14
L13:
.dbline 62
; //else if(OERR==1)
; else if(UCSR0A&BIT(DOR0)) //溢出错.
lds R2,192
sbrs R2,3
rjmp L15
.dbline 63
; {
.dbline 64
; UCSR0B &= ~BIT(RXEN0); //CREN = 0;
lds R24,193
andi R24,239
sts 193,R24
.dbline 65
; UCSR0A &= ~BIT(DOR0); //OERR = 0;
lds R24,192
andi R24,247
sts 192,R24
.dbline 66
; UCSR0B |= BIT(RXEN0); //CREN = 1;
lds R24,193
ori R24,16
sts 193,R24
.dbline 67
; tmp = UDR0;
lds R16,198
.dbline 69
; //PORTC ^= 0x02;
; }
rjmp L16
L15:
.dbline 71
; else //奇偶校验的问题.
; {
.dbline 74
; // RX9DBuf = RX9D;
; // 读取接受寄存器中的数据.
; receBuf[receCount] = UDR0; // RCREG;
ldi R24,<_receBuf
ldi R25,>_receBuf
lds R30,_receCount
clr R31
add R30,R24
adc R31,R25
lds R2,198
std z+0,R2
.dbline 77
; // 奇校验判断.
; //if(RX9DBuf != ParityBit(&receBuf[receCount]))
; if(UCSR0A&BIT(UPE0)!=0) //奇校验硬件完成.
lds R2,192
sbrs R2,0
rjmp L17
.dbline 78
; {
.dbline 80
; //PORTC ^= 0x02;
; UCSR0A |= BIT(UPE0);
lds R24,192
ori R24,4
sts 192,R24
.dbline 81
; checkoutError = 1;
ldi R24,1
sts _checkoutError,R24
.dbline 82
; }
L17:
.dbline 83
; receCount++; // 接收地址偏移寄存器加1.
lds R24,_receCount
subi R24,255 ; addi 1
sts _receCount,R24
.dbline 84
; receCount &= 0x0f; // 最多接受16个字节.
andi R24,15
sts _receCount,R24
.dbline 86
; // PORTC ^= 0x02;
; } //
L16:
L14:
.dbline -2
L12:
ld R2,y+
out 0x3f,R2
ld R31,y+
ld R30,y+
ld R25,y+
ld R24,y+
ld R16,y+
ld R2,y+
.dbline 0 ; func end
reti
.dbsym r tmp 16 c
.dbend
.area vector(rom, abs)
.org 40
rjmp _uart0_udre_isr
.area text(rom, con, rel)
.dbfile D:\ICCTES~1\1128\uart_main.c
.dbfunc e uart0_udre_isr _uart0_udre_isr fV
.even
_uart0_udre_isr::
st -y,R2
st -y,R3
st -y,R24
st -y,R25
st -y,R30
st -y,R31
in R2,0x3f
st -y,R2
.dbline -1
.dbline 92
; } //void uart0_rx_isr(void)
;
;
; #pragma interrupt_handler uart0_udre_isr:21
; void uart0_udre_isr(void)
; {
.dbline 95
; //character transferred to shift register so UDR is now empty
; // UDR0 = 0x01;
; if(sendPosi<sendCount)
lds R2,_sendCount
lds R3,_sendPosi
cp R3,R2
brsh L20
.dbline 96
; {
.dbline 97
; sendPosi++;
lds R24,_sendPosi
subi R24,255 ; addi 1
sts _sendPosi,R24
.dbline 99
; // TX9D = ParityBit(sendBuf[sendPosi]);
; UDR0 = sendBuf[sendPosi];
ldi R24,<_sendBuf
ldi R25,>_sendBuf
lds R30,_sendPosi
clr R31
add R30,R24
adc R31,R25
ldd R2,z+0
sts 198,R2
.dbline 100
; }
rjmp L21
L20:
.dbline 102
; else
; {
.dbline 104
; // receEnable(); //485芯片
; if(UCSR0A&BIT(TXC0) != 0) //if(TRMT)
lds R2,192
sbrs R2,0
rjmp L22
.dbline 105
; {
.dbline 106
; receCount = 0;
clr R2
sts _receCount,R2
.dbline 107
; checkoutError = 0;
sts _checkoutError,R2
.dbline 110
; //--------------------------
; //UCSR0B &= ~BIT(UDRIE0); //RXCIE0 清零. TXIE = 0;//在一组数据发送完成后关闭
; UCSR0B &= ~BIT(TXCIE0);
lds R24,193
andi R24,191
sts 193,R24
.dbline 112
; //TXEN = 0;
; UCSR0B &= ~BIT(TXEN0);
lds R24,193
andi R24,247
sts 193,R24
.dbline 113
; sendCount = 0;
sts _sendCount,R2
.dbline 116
; //--------------------------
; // flag_bit = 0; //&&&&&&&&
; }
L22:
.dbline 117
L21:
.dbline -2
L19:
ld R2,y+
out 0x3f,R2
ld R31,y+
ld R30,y+
ld R25,y+
ld R24,y+
ld R3,y+
ld R2,y+
.dbline 0 ; func end
reti
.dbend
.dbfunc e test_pin _test_pin fV
.even
_test_pin::
.dbline -1
.dbline 121
; }
; }
;
; void test_pin(void)
; {
.dbline 122
; DDRC |= 0x02;
sbi 0x7,1
.dbline 123
; PORTC |= 0x02;
sbi 0x8,1
.dbline -2
L24:
.dbline 0 ; func end
ret
.dbend
.dbfunc e init_devices _init_devices fV
.even
_init_devices::
.dbline -1
.dbline 128
; }
;
; //call this routine to initialize all peripherals
; void init_devices(void)
; {
.dbline 130
; //stop errant interrupts until set up
; CLI(); //disable all interrupts
cli
.dbline 131
; port_init();
rcall _port_init
.dbline 132
; uart0_init();
rcall _uart0_init
.dbline 133
; timer2_init();
rcall _timer2_init
.dbline 134
; led_init();
rcall _led_init
.dbline 136
;
; test_pin();
rcall _test_pin
.dbline 138
;
; MCUCR = 0x00;
clr R2
out 0x35,R2
.dbline 139
; EICRA = 0x00; //extended ext ints
sts 105,R2
.dbline 140
; EIMSK = 0x00;
out 0x1d,R2
.dbline 142
;
; TIMSK0 = 0x00; //timer 0 interrupt sources
sts 110,R2
.dbline 143
; TIMSK1 = 0x00; //timer 1 interrupt sources
sts 111,R2
.dbline 144
; TIMSK2 = 0x01; //timer 2 interrupt sources
ldi R24,1
sts 112,R24
.dbline 146
;
; PCMSK0 = 0x00; //pin change mask 0
sts 107,R2
.dbline 147
; PCMSK1 = 0x00; //pin change mask 1
sts 108,R2
.dbline 148
; PCMSK2 = 0x00; //pin change mask 2
sts 109,R2
.dbline 149
; PCICR = 0x00; //pin change enable
sts 104,R2
.dbline 150
; PRR = 0x84; //power controller
ldi R24,132
sts 100,R24
.dbline 151
; SEI(); //re-enable interrupts
sei
.dbline -2
L25:
.dbline 0 ; func end
ret
.dbend
.dbfunc e main _main fV
.even
_main::
.dbline -1
.dbline 157
; //all peripherals are now initialized
; }
;
; //
; void main(void)
; {
.dbline 158
; NOP();
nop
.dbline 159
; init_devices();
rcall _init_devices
.dbline 160
; NOP();
nop
.dbline 161
; singleKeyTranmit();
rcall _singleKeyTranmit
.dbline 162
; delay(50000);
ldi R16,50000
ldi R17,195
rcall _delay
.dbline 163
; singleKeyTranmit();
rcall _singleKeyTranmit
.dbline 164
; test();
rcall _test
rjmp L28
L27:
.dbline 168
;
;
; while(1)
; {
.dbline 170
;
; ReceiveFrameDisFun();
rcall _ReceiveFrameDisFun
.dbline 173
;
; //UDR0 = 0x01;
; if(timeBase.bits.bt1ms)
lds R24,_timeBase
lsr R24
andi R24,1
breq L30
.dbline 174
; time_mission();
rcall _time_mission
L30:
.dbline 175
; if(ledControl.bits.once128ms) // if(var_a == 1) //
lds R24,_ledControl
andi R24,1
breq L32
.dbline 176
; {
.dbline 178
; //PORTC ^= 0x02;
; ledControl.bits.once128ms=0; //var_a = 0; //
lds R24,_ledControl
andi R24,254
sts _ledControl,R24
.dbline 179
; sub2();
rcall _sub2
.dbline 180
; }
L32:
.dbline 181
; if(ledControl.bits.refurbish) //if(var_b == 1) //
lds R24,_ledControl
lsr R24
andi R24,1
breq L34
.dbline 182
; {
.dbline 184
; //PORTC ^= 0x02;
; ledControl.bits.refurbish=0;//var_b = 0; //
lds R24,_ledControl
andi R24,253
sts _ledControl,R24
.dbline 185
; subled();
rcall _subled
.dbline 186
; }
L34:
.dbline 188
L28:
.dbline 167
rjmp L27
X1:
.dbline -2
L26:
.dbline 0 ; func end
ret
.dbend
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