dds_n1.mdl

来自「用MATLAB中的SIMULINK工具实现DDS的仿真模型」· MDL 代码 · 共 1,847 行 · 第 1/4 页

MDL
1,847
字号
		  Name			  "Time"
		  Position		  [40, 63, 70, 77]
		  Port			  "1"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		  Port {
		    PortNumber		    1
		    Name		    "Time of current edge"
		    RTWStorageClass	    "Auto"
		    DataLoggingNameMode	    "SignalName"
		    ShowSigGenPortName	    on
		  }
		}
		Block {
		  BlockType		  TriggerPort
		  Name			  "Trigger"
		  Ports			  []
		  Position		  [75, 110, 95, 130]
		  ZeroCross		  off
		}
		Block {
		  BlockType		  Constant
		  Name			  "Constant"
		  Position		  [270, 110, 300, 140]
		  ShowName		  off
		  Value			  "0"
		}
		Block {
		  BlockType		  Memory
		  Name			  "Memory"
		  Position		  [125, 55, 155, 85]
		  InheritSampleTime	  on
		  Port {
		    PortNumber		    1
		    Name		    "Time of previous edge"
		    RTWStorageClass	    "Auto"
		    DataLoggingNameMode	    "SignalName"
		    ShowSigGenPortName	    on
		  }
		}
		Block {
		  BlockType		  Product
		  Name			  "Product"
		  Ports			  [1, 1]
		  Position		  [375, 24, 405, 56]
		  ShowName		  off
		  Inputs		  "/"
		  RndMeth		  "Floor"
		  Port {
		    PortNumber		    1
		    Name		    "Frequency"
		    RTWStorageClass	    "Auto"
		    DataLoggingNameMode	    "SignalName"
		    ShowSigGenPortName	    on
		  }
		}
		Block {
		  BlockType		  RelationalOperator
		  Name			  "Relational\nOperator"
		  Position		  [365, 102, 395, 133]
		  ShowName		  off
		  Operator		  "~="
		  Port {
		    PortNumber		    1
		    Name		    "Gating signal"
		    RTWStorageClass	    "Auto"
		    DataLoggingNameMode	    "SignalName"
		    ShowSigGenPortName	    on
		  }
		}
		Block {
		  BlockType		  Product
		  Name			  "Set to Zero\nif previous time\nwas "
"zero"
		  Ports			  [2, 1]
		  Position		  [535, 32, 565, 63]
		  RndMeth		  "Floor"
		}
		Block {
		  BlockType		  Sum
		  Name			  "Sum"
		  Ports			  [2, 1]
		  Position		  [305, 30, 325, 50]
		  ShowName		  off
		  IconShape		  "round"
		  Inputs		  "|+-"
		  Port {
		    PortNumber		    1
		    Name		    "Period"
		    RTWStorageClass	    "Auto"
		    DataLoggingNameMode	    "SignalName"
		    ShowSigGenPortName	    on
		  }
		}
		Block {
		  BlockType		  Outport
		  Name			  "Freq"
		  Position		  [615, 43, 645, 57]
		  IconDisplay		  "Port number"
		  BusOutputAsStruct	  off
		  InitialOutput		  "0"
		}
		Line {
		  Name			  "Gating signal"
		  Labels		  [2, 0]
		  SrcBlock		  "Relational\nOperator"
		  SrcPort		  1
		  Points		  [55, 0; 0, -65]
		  DstBlock		  "Set to Zero\nif previous time\nwas "
"zero"
		  DstPort		  2
		}
		Line {
		  SrcBlock		  "Constant"
		  SrcPort		  1
		  DstBlock		  "Relational\nOperator"
		  DstPort		  2
		}
		Line {
		  SrcBlock		  "Set to Zero\nif previous time\nwas "
"zero"
		  SrcPort		  1
		  DstBlock		  "Freq"
		  DstPort		  1
		}
		Line {
		  Name			  "Time of previous edge"
		  Labels		  [1, 1]
		  SrcBlock		  "Memory"
		  SrcPort		  1
		  Points		  [155, 0]
		  Branch {
		    Points		    [0, 40]
		    DstBlock		    "Relational\nOperator"
		    DstPort		    1
		  }
		  Branch {
		    DstBlock		    "Sum"
		    DstPort		    2
		  }
		}
		Line {
		  Name			  "Frequency"
		  Labels		  [1, 0]
		  SrcBlock		  "Product"
		  SrcPort		  1
		  DstBlock		  "Set to Zero\nif previous time\nwas "
"zero"
		  DstPort		  1
		}
		Line {
		  Name			  "Period"
		  Labels		  [-1, 1]
		  SrcBlock		  "Sum"
		  SrcPort		  1
		  DstBlock		  "Product"
		  DstPort		  1
		}
		Line {
		  Name			  "Time of current edge"
		  SrcBlock		  "Time"
		  SrcPort		  1
		  Points		  [35, 0]
		  Branch {
		    DstBlock		    "Memory"
		    DstPort		    1
		  }
		  Branch {
		    Labels		    [2, 0]
		    Points		    [0, -30]
		    DstBlock		    "Sum"
		    DstPort		    1
		  }
		}
		Annotation {
		  Name			  "Ensure frequency calculation\nonly "
"for full period"
		  Position		  [507, 151]
		}
	      }
	    }
	    Block {
	      BlockType		      Clock
	      Name		      "Clock"
	      Position		      [25, 90, 45, 110]
	      Decimation	      "1"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out1"
	      Position		      [190, 93, 220, 107]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Calculate single tone \nfrequency"
	      SrcPort		      1
	      DstBlock		      "Out1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Clock"
	      SrcPort		      1
	      DstBlock		      "Calculate single tone \nfrequency"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "In1"
	      SrcPort		      1
	      DstBlock		      "Calculate single tone \nfrequency"
	      DstPort		      trigger
	    }
	  }
	}
	Block {
	  BlockType		  RelationalOperator
	  Name			  "Relational\nOperator"
	  Position		  [90, 27, 120, 58]
	  Operator		  ">"
	  LogicDataType		  "double"
	  ZeroCross		  off
	  SampleTime		  "0.01/RF"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [160, 38, 190, 52]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out2"
	  Position		  [285, 103, 315, 117]
	  Port			  "2"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  Points		  [0, -40]
	  DstBlock		  "Relational\nOperator"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational\nOperator"
	  SrcPort		  1
	  Points		  [0, 0; 15, 0]
	  Branch {
	    DstBlock		    "Frequency of\nsingle tone"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Out1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  DstBlock		  "Relational\nOperator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Frequency of\nsingle tone"
	  SrcPort		  1
	  DstBlock		  "Out2"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Display
      Name		      "Synthesized Frequency\nin Hz"
      Ports		      [1]
      Position		      [790, 420, 880, 450]
      Decimation	      "1"
    }
    Block {
      BlockType		      Display
      Name		      "Synthesized Frequency\nin Hz1"
      Ports		      [1]
      Position		      [785, 35, 875, 65]
      Decimation	      "1"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace"
      Position		      [780, 180, 840, 210]
      VariableName	      "simout"
      MaxDataPoints	      "inf"
      SampleTime	      "-1"
      SaveFormat	      "Array"
      FixptAsFi		      on
    }
    Block {
      BlockType		      SubSystem
      Name		      "Triggered\nSubsystem"
      Ports		      [1, 1, 0, 1]
      Position		      [260, 104, 360, 146]
      TreatAsAtomicUnit	      on
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      System {
	Name			"Triggered\nSubsystem"
	Location		[353, 328, 855, 680]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "In1"
	  Position		  [110, 103, 140, 117]
	  Port			  "1"
	  IconDisplay		  "Port number"
	  LatchInput		  off
	}
	Block {
	  BlockType		  TriggerPort
	  Name			  "Trigger"
	  Ports			  []
	  Position		  [225, 20, 245, 40]
	  StatesWhenEnabling	  "held"
	}
	Block {
	  BlockType		  "S-Function"
	  Name			  "S-Function"
	  Ports			  [1, 1]
	  Position		  [225, 95, 285, 125]
	  FunctionName		  "addcontrolk"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [360, 103, 390, 117]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  DstBlock		  "S-Function"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S-Function"
	  SrcPort		  1
	  DstBlock		  "Out1"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Clock
      Name		      "Clock1"
      Position		      [220, 445, 240, 465]
      IOType		      "siggen"
      Decimation	      "10"
    }
    Line {
      SrcBlock		      "Pulse\nGenerator"
      SrcPort		      1
      Points		      [0, 0; 60, 0]
      Branch {
	DstBlock		"Triggered\nSubsystem"
	DstPort			trigger
      }
      Branch {
	Points			[60, 0]
	Branch {
	  DstBlock		  "Frequency of\nsingle tone1"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 445]
	  DstBlock		  "Spectrum\nAnalyzer"
	  DstPort		  2
	}
      }
    }
    Line {
      SrcBlock		      "Constant"
      SrcPort		      1
      DstBlock		      "Triggered\nSubsystem"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Frequency of\nsingle tone1"
      SrcPort		      1
      DstBlock		      "Synthesized Frequency\nin Hz1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Analog\nFilter Design1"
      SrcPort		      1
      Points		      [0, 0; 45, 0]
      Branch {
	Points			[0, 70]
	Branch {
	  DstBlock		  "To Workspace"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 135]
	  Branch {
	    DstBlock		    "Power Spectral\nDensity"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 90]
	    Branch {
	      DstBlock		      "Subsystem1"
	      DstPort		      1
	    }
	    Branch {
	      Points		      [0, 60]
	      DstBlock		      "Spectrum\nAnalyzer"
	      DstPort		      1
	    }
	  }
	}
      }
      Branch {
	DstBlock		"Scope"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Subsystem"
      SrcPort		      1
      DstBlock		      "Analog\nFilter Design1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Triggered\nSubsystem"
      SrcPort		      1
      DstBlock		      "Subsystem"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Subsystem1"
      SrcPort		      2
      DstBlock		      "Synthesized Frequency\nin Hz"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Subsystem1"
      SrcPort		      1
      DstBlock		      "Scope1"
      DstPort		      1
    }
  }
}

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