sst39vf400a.h

DSPBOOTLOADER程序

/* -------------------------------------------------------------------- */
/*  Filename: 	SST39VF400A.h											*/
/*	Function:	external routines declaration                           */                      
/* -------------------------------------------------------------------- */
#ifndef SST39VF400A_h
#define SST39VF400A_h

extern void     Delay_150_Nano_Seconds();
extern void     Delay_25_Milli_Seconds();
extern void     Delay_100_Milli_Seconds();

extern int 	Check_SST_39VF400A();	// Check manufacturer and device ID
extern void CFI_Query();			// CFI Query Entry/Exit command sequence
extern void Erase_One_Sector();		// Erase a sector of 2048 words
extern void Erase_One_Block();		// Erase a block of 32K words
extern void Erase_Entire_Chip();	// Erase the contents of the entire chip
extern void Program_One_Word();		// Alter data in one word
extern void Program_One_Sector();	// Alter data in 2048 word sector
extern void Program_One_Block();	// Alter data in 32K word block
//extern void Check_Toggle_Ready();	// End of internal program or erase detection using 
									// Toggle bit                      
extern void Check_Data_Polling();	// End of internal program or erase detection using
                       				// Data# polling
                      
/****************************************************************************/
/*	declare boot table const												*/
/****************************************************************************/
/* PLL configuration */
#define PLLCSR_add	0x1C80
#define PLLCSR_pll_on	0x0049
#define PLLCSR_pll_off	0x0040

#define WAIT_add	0xFFFF

#define CK3SEL_add  0x1C82
#define CK3SEL_con  0x000B	

#define PLLM_add	0x1C88
#define PLLM_con	0x000A

#define PLLDIV0_add 0x1C8A
#define PLLDIV0_con 0x0000

#define PLLDIV1_add 0x1C8C
#define PLLDIV1_con 0x0001

#define PLLDIV2_add 0x1C8E
#define PLLDIV2_con 0x0001

#define PLLDIV3_add 0x1C90
#define PLLDIV3_con 0x0003

#define OSCDIV1_add 0x1C92
#define OSCDIV1_con 0x0000

#define WKEN_add	0x1C98
#define WKEN_con	0x001F

#define CLKMD_add	0x8C00
#define CLKMD_con	0x8C00

#define CLKOUTSR_add	0x8400
#define CLKOUTSR_con	0x0001

/* EMIF configuration */

#define XBSR_add	0x6C00
#define	XBSR_con	0x0001

#define GBLCTL1_add	0x0800	
#define GBLCTL1_con	0x0060

#define GBLCTL2_add	0x0801	
#define GBLCTL2_con	0x0002

#define CE1CTL1_add 0x0802
#define CE1CTL1_con 0xC613

#define CE1CTL2_add 0x0803
#define CE1CTL2_con 0x42A2

#endif

/**********************************************************************************/
//	No	more
/***********************************************************************************/