block1.map.eqn

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--D1L881 is ROM:inst2|Mux~605
--operation mode is normal

D1L881 = B1_dou[2] & (J1_q[2] # D1L631) # !B1_dou[2] & !J1_q[2] & D1L531;


--D1L731 is ROM:inst2|Mux~413
--operation mode is normal

D1L731 = !J1_q[0] & !J1_q[3] & (J1_q[1] $ B1_dou[0]);


--D1L981 is ROM:inst2|Mux~606
--operation mode is normal

D1L981 = D1L881 & (D1L731 # !J1_q[2]) # !D1L881 & D1L212 & J1_q[2];


--D1L331 is ROM:inst2|Mux~403
--operation mode is normal

D1L331 = !J1_q[0] & (J1_q[1] & !J1_q[2] & !J1_q[3] # !J1_q[1] & (J1_q[2] $ J1_q[3]));


--D1L231 is ROM:inst2|Mux~401
--operation mode is normal

D1L231 = J1_q[1] & (J1_q[0] $ !J1_q[3] # !J1_q[2]) # !J1_q[1] & (J1_q[0] # J1_q[2] # J1_q[3]);


--D1L131 is ROM:inst2|Mux~399
--operation mode is normal

D1L131 = J1_q[0] & (!J1_q[3] # !J1_q[2] # !J1_q[1]) # !J1_q[0] & (J1_q[1] # J1_q[2] # J1_q[3]);


--D1L681 is ROM:inst2|Mux~603
--operation mode is normal

D1L681 = B1_dou[0] & (B1_dou[2] # !D1L231) # !B1_dou[0] & !B1_dou[2] & D1L131;


--D1L431 is ROM:inst2|Mux~405
--operation mode is normal

D1L431 = J1_q[0] & !J1_q[1] & !J1_q[2] & J1_q[3] # !J1_q[0] & J1_q[1] & !J1_q[3];


--D1L781 is ROM:inst2|Mux~604
--operation mode is normal

D1L781 = D1L681 & (D1L431 # !B1_dou[2]) # !D1L681 & D1L331 & B1_dou[2];


--D1L4 is ROM:inst2|dout[1]~1542
--operation mode is normal

D1L4 = D1L3 & (B1_dou[1] & D1L981 # !B1_dou[1] & D1L781);


--D1L5 is ROM:inst2|dout[1]~1543
--operation mode is normal

D1L5 = !CR & (B1_dou[1] & D1L981 # !B1_dou[1] & D1L781);


--D1L3 is ROM:inst2|dout[1]~1514
--operation mode is normal

D1L3 = D1L4 # D1L5 # D1L3 & CR;


--D1L931 is ROM:inst2|Mux~418
--operation mode is normal

D1L931 = !J1_q[0] & (J1_q[1] & !B1_dou[0] & !J1_q[3] # !J1_q[1] & B1_dou[0] & J1_q[3]);


--D1L441 is ROM:inst2|Mux~531
--operation mode is normal

D1L441 = J1_q[1] & B1_dou[0] & !J1_q[3];


--D1L831 is ROM:inst2|Mux~415
--operation mode is normal

D1L831 = J1_q[0] & !J1_q[1] & B1_dou[0] # !J1_q[0] & (J1_q[1] & !B1_dou[0] & !J1_q[3] # !J1_q[1] & J1_q[3]);


--D1L091 is ROM:inst2|Mux~607
--operation mode is normal

D1L091 = J1_q[2] & (B1_dou[1] # D1L441) # !J1_q[2] & !B1_dou[1] & D1L831;


--D1L041 is ROM:inst2|Mux~420
--operation mode is normal

D1L041 = !J1_q[1] & !B1_dou[0] & (J1_q[0] $ J1_q[3]);


--D1L191 is ROM:inst2|Mux~608
--operation mode is normal

D1L191 = D1L091 & (D1L041 # !B1_dou[1]) # !D1L091 & D1L931 & B1_dou[1];


--D1L741 is ROM:inst2|Mux~557
--operation mode is normal

D1L741 = J1_q[1] & J1_q[2] & (J1_q[0] $ B1_dou[1]);


--D1L912 is ROM:inst2|Mux~2053
--operation mode is normal

D1L912 = !J1_q[2] & !J1_q[1] & !J1_q[0];


--D1L022 is ROM:inst2|Mux~2054
--operation mode is normal

D1L022 = B1_dou[0] & D1L741 # !B1_dou[0] & D1L912 & !B1_dou[1];


--D1L122 is ROM:inst2|Mux~2055
--operation mode is normal

D1L122 = B1_dou[2] & D1L191 # !B1_dou[2] & D1L022 & !J1_q[3];


--D1L1 is ROM:inst2|dout[0]~1515
--operation mode is normal

D1L1 = D1L1 & (D1L122 # CR) # !D1L1 & D1L122 & !CR;


--F1_clkout5k is clock800:inst4|clkout5k
--operation mode is normal

F1_clkout5k_lut_out = F1L61 & (L1_unreg_res_node[9] # N3_cs_buffer[7] & F1L81);
F1_clkout5k = DFFEA(F1_clkout5k_lut_out, clkin, , , , , );


--F1_count1[2] is clock800:inst4|count1[2]
--operation mode is normal

F1_count1[2]_lut_out = N3_cs_buffer[2] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[2] = DFFEA(F1_count1[2]_lut_out, clkin, , , , , );


--F1_count1[1] is clock800:inst4|count1[1]
--operation mode is normal

F1_count1[1]_lut_out = N3_cs_buffer[1] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[1] = DFFEA(F1_count1[1]_lut_out, clkin, , , , , );


--F1L71 is clock800:inst4|LessThan~185
--operation mode is normal

F1L71 = !F1_count1[1] # !F1_count1[2];


--F1_count1[0] is clock800:inst4|count1[0]
--operation mode is arithmetic

F1_count1[0]_lut_out = !F1_count1[0] & F1L61;
F1_count1[0] = DFFEA(F1_count1[0]_lut_out, clkin, , , , , );

--N3_cout[0] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

N3_cout[0] = CARRY(F1_count1[0]);


--F1_count1[4] is clock800:inst4|count1[4]
--operation mode is normal

F1_count1[4]_lut_out = N3_cs_buffer[4] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[4] = DFFEA(F1_count1[4]_lut_out, clkin, , , , , );


--F1_count1[3] is clock800:inst4|count1[3]
--operation mode is normal

F1_count1[3]_lut_out = N3_cs_buffer[3] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[3] = DFFEA(F1_count1[3]_lut_out, clkin, , , , , );


--F1L41 is clock800:inst4|LessThan~63
--operation mode is normal

F1L41 = F1L71 # !F1_count1[3] # !F1_count1[4] # !F1_count1[0];


--F1_count1[7] is clock800:inst4|count1[7]
--operation mode is normal

F1_count1[7]_lut_out = N3_cs_buffer[7] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[7] = DFFEA(F1_count1[7]_lut_out, clkin, , , , , );


--F1_count1[6] is clock800:inst4|count1[6]
--operation mode is normal

F1_count1[6]_lut_out = N3_cs_buffer[6] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[6] = DFFEA(F1_count1[6]_lut_out, clkin, , , , , );


--F1_count1[5] is clock800:inst4|count1[5]
--operation mode is normal

F1_count1[5]_lut_out = N3_cs_buffer[5] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[5] = DFFEA(F1_count1[5]_lut_out, clkin, , , , , );


--F1L51 is clock800:inst4|LessThan~77
--operation mode is normal

F1L51 = F1L41 & !F1_count1[7] & !F1_count1[6] & !F1_count1[5];


--F1_count1[9] is clock800:inst4|count1[9]
--operation mode is normal

F1_count1[9]_lut_out = L1_unreg_res_node[9] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[9] = DFFEA(F1_count1[9]_lut_out, clkin, , , , , );


--F1_count1[8] is clock800:inst4|count1[8]
--operation mode is normal

F1_count1[8]_lut_out = N3_cs_buffer[8] & (F1L51 # !F1_count1[8] # !F1_count1[9]);
F1_count1[8] = DFFEA(F1_count1[8]_lut_out, clkin, , , , , );


--F1L61 is clock800:inst4|LessThan~83
--operation mode is normal

F1L61 = F1L51 # !F1_count1[8] # !F1_count1[9];


--N3_cs_buffer[7] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]
--operation mode is arithmetic

N3_cs_buffer[7] = F1_count1[7] $ N3_cout[6];

--N3_cout[7] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[7]
--operation mode is arithmetic

N3_cout[7] = CARRY(F1_count1[7] & N3_cout[6]);


--N3_cs_buffer[8] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[8]
--operation mode is arithmetic

N3_cs_buffer[8] = F1_count1[8] $ N3_cout[7];

--N3_cout[8] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[8]
--operation mode is arithmetic

N3_cout[8] = CARRY(F1_count1[8] & N3_cout[7]);


--F1L31 is clock800:inst4|count1~11
--operation mode is normal

F1L31 = N3_cs_buffer[8] & (F1L51 # !F1_count1[8] # !F1_count1[9]);


--N3_cs_buffer[6] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

N3_cs_buffer[6] = F1_count1[6] $ N3_cout[5];

--N3_cout[6] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

N3_cout[6] = CARRY(F1_count1[6] & N3_cout[5]);


--N3_cs_buffer[5] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

N3_cs_buffer[5] = F1_count1[5] $ N3_cout[4];

--N3_cout[5] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

N3_cout[5] = CARRY(F1_count1[5] & N3_cout[4]);


--N3_cs_buffer[4] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

N3_cs_buffer[4] = F1_count1[4] $ N3_cout[3];

--N3_cout[4] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

N3_cout[4] = CARRY(F1_count1[4] & N3_cout[3]);


--F1L81 is clock800:inst4|LessThan~186
--operation mode is normal

F1L81 = F1L31 & (N3_cs_buffer[6] # N3_cs_buffer[5] # N3_cs_buffer[4]);


--D1L541 is ROM:inst2|Mux~547
--operation mode is normal

D1L541 = J1_q[0] & (!J1_q[2] # !J1_q[1]) # !J1_q[0] & (J1_q[1] # J1_q[2] # B1_dou[1]);


--D1L422 is ROM:inst2|Mux~2065
--operation mode is normal

D1L422 = (J1_q[3] # B1_dou[2] # D1L541 # !B1_dou[0]) & CASCADE(D1L522);


--N3_cs_buffer[2] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

N3_cs_buffer[2] = F1_count1[2] $ N3_cout[1];

--N3_cout[2] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

N3_cout[2] = CARRY(F1_count1[2] & N3_cout[1]);


--N3_cs_buffer[1] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

N3_cs_buffer[1] = F1_count1[1] $ N3_cout[0];

--N3_cout[1] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

N3_cout[1] = CARRY(F1_count1[1] & N3_cout[0]);


--N3_cs_buffer[3] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

N3_cs_buffer[3] = F1_count1[3] $ N3_cout[2];

--N3_cout[3] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

N3_cout[3] = CARRY(F1_count1[3] & N3_cout[2]);


--L1_unreg_res_node[9] is clock800:inst4|lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[9]
--operation mode is normal

L1_unreg_res_node[9] = N3_cout[8] $ F1_count1[9];


--D1L222 is ROM:inst2|Mux~2062
--operation mode is normal

D1L222 = B1_dou[1] & B1_dou[2] & !J1_q[1] & !J1_q[2];


--D1L322 is ROM:inst2|Mux~2063
--operation mode is normal

D1L322 = J1_q[3] # !B1_dou[0] # !J1_q[0] # !D1L222;


--D1L522 is ROM:inst2|Mux~2066
--operation mode is normal

D1L522 = (!J1_q[1] # !J1_q[2] # !G1L5 # !D1L102) & CASCADE(D1L322);


--CR is CR
--operation mode is input

CR = INPUT();


--hzsel is hzsel
--operation mode is input

hzsel = INPUT();


--clkin is clkin
--operation mode is input

clkin = INPUT();


--L15 is L15
--operation mode is output

L15 = OUTPUT(D1L54);


--L14 is L14
--operation mode is output

L14 = OUTPUT(D1L34);


--L13 is L13
--operation mode is output

L13 = OUTPUT(D1L14);


--L12 is L12
--operation mode is output

L12 = OUTPUT(D1L73);


--L11 is L11
--operation mode is output

L11 = OUTPUT(D1L33);


--L10 is L10
--operation mode is output

L10 = OUTPUT(D1L92);


--L9 is L9
--operation mode is output

L9 = OUTPUT(D1L72);


--L8 is L8
--operation mode is output

L8 = OUTPUT(D1L32);


--L7 is L7
--operation mode is output

L7 = OUTPUT(D1L12);


--L6 is L6
--operation mode is output

L6 = OUTPUT(D1L91);


--L5 is L5
--operation mode is output

L5 = OUTPUT(D1L71);


--L4 is L4
--operation mode is output

L4 = OUTPUT(D1L31);


--L3 is L3
--operation mode is output

L3 = OUTPUT(D1L11);


--L2 is L2
--operation mode is output

L2 = OUTPUT(D1L7);


--L1 is L1
--operation mode is output

L1 = OUTPUT(D1L3);


--L0 is L0
--operation mode is output

L0 = OUTPUT(D1L1);


--G is G
--operation mode is output

G = OUTPUT(G1L6);


--F is F
--operation mode is output

F = OUTPUT(!G1L5);


--E is E
--operation mode is output

E = OUTPUT(!D1L291);


--D is D
--operation mode is output

D = OUTPUT(G1L4);


--C is C
--operation mode is output

C = OUTPUT(!G1L3);


--B is B
--operation mode is output

B = OUTPUT(G1L2);


--A is A
--operation mode is output

A = OUTPUT(G1L1);


--SEL3 is SEL3
--operation mode is output

SEL3 = OUTPUT(J1_q[3]);


--SEL2 is SEL2
--operation mode is output

SEL2 = OUTPUT(J1_q[2]);


--SEL1 is SEL1
--operation mode is output

SEL1 = OUTPUT(J1_q[1]);


--SEL0 is SEL0
--operation mode is output

SEL0 = OUTPUT(J1_q[0]);


--LED[7] is LED[7]
--operation mode is output

LED[7] = OUTPUT(E1L1);


--LED[6] is LED[6]
--operation mode is output

LED[6] = OUTPUT(E1L2);


--LED[5] is LED[5]
--operation mode is output

LED[5] = OUTPUT(E1L3);


--LED[4] is LED[4]
--operation mode is output

LED[4] = OUTPUT(E1L4);


--LED[3] is LED[3]
--operation mode is output

LED[3] = OUTPUT(E1L5);


--LED[2] is LED[2]
--operation mode is output

LED[2] = OUTPUT(!E1L7);


--LED[1] is LED[1]
--operation mode is output

LED[1] = OUTPUT(!D1L291);


--LED[0] is LED[0]
--operation mode is output

LED[0] = OUTPUT(E1L6);