block1.fit.eqn

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--operation mode is normal

D1L202 = !J1_q[2] & !J1_q[1] & D1L102 & B1_dou[2];


--D1L28 is ROM:inst2|Mux~294 at LC2_A4
--operation mode is normal

D1L28 = !J1_q[3] & J1_q[1] & (J1_q[2] $ B1_dou[2]);


--D1L18 is ROM:inst2|Mux~292 at LC3_A10
--operation mode is normal

D1L18 = J1_q[2] & !J1_q[3] & !J1_q[1] & !B1_dou[2] # !J1_q[2] & J1_q[1] & (J1_q[3] $ B1_dou[2]);


--D1L302 is ROM:inst2|Mux~2037 at LC2_A10
--operation mode is normal

D1L302 = J1_q[0] & (B1_dou[0] & D1L28 # !B1_dou[0] & D1L18);


--D1L402 is ROM:inst2|Mux~2038 at LC8_A19
--operation mode is normal

D1L402 = B1_dou[1] & D1L561 # !B1_dou[1] & (D1L302 # D1L202);


--D1L72 is ROM:inst2|dout[9]~1506 at LC7_A19
--operation mode is normal

D1L72 = CR & D1L72 # !CR & D1L402;


--D1L39 is ROM:inst2|Mux~316 at LC3_C12
--operation mode is normal

D1L39 = !J1_q[3] & J1_q[1] & (B1_dou[0] $ !J1_q[0]);


--D1L29 is ROM:inst2|Mux~314 at LC4_C12
--operation mode is normal

D1L29 = !J1_q[1] & (J1_q[3] & !J1_q[0] # !J1_q[3] & B1_dou[0] & J1_q[0]);


--D1L19 is ROM:inst2|Mux~312 at LC6_C12
--operation mode is normal

D1L19 = J1_q[3] & (B1_dou[0] & J1_q[1] & !J1_q[0] # !B1_dou[0] & J1_q[0]) # !J1_q[3] & J1_q[1] & J1_q[0];


--D1L861 is ROM:inst2|Mux~585 at LC7_C12
--operation mode is normal

D1L861 = B1_dou[2] & (D1L29 # J1_q[2]) # !B1_dou[2] & D1L19 & !J1_q[2];


--D1L49 is ROM:inst2|Mux~319 at LC8_C12
--operation mode is normal

D1L49 = !J1_q[0] & !J1_q[1] & !J1_q[3] & B1_dou[0];


--D1L961 is ROM:inst2|Mux~586 at LC2_C12
--operation mode is normal

D1L961 = D1L861 & (D1L49 # !J1_q[2]) # !D1L861 & J1_q[2] & D1L39;


--D1L88 is ROM:inst2|Mux~306 at LC2_C8
--operation mode is normal

D1L88 = J1_q[3] & !J1_q[2] & (!J1_q[0] # !J1_q[1]) # !J1_q[3] & (J1_q[0] & J1_q[2] # !J1_q[0] & J1_q[1]);


--D1L98 is ROM:inst2|Mux~308 at LC6_A11
--operation mode is normal

D1L98 = J1_q[0] & (J1_q[3] $ J1_q[2] # !J1_q[1]) # !J1_q[0] & (J1_q[3] # J1_q[2]);


--D1L78 is ROM:inst2|Mux~304 at LC7_A11
--operation mode is normal

D1L78 = J1_q[1] & !J1_q[0] & (J1_q[3] $ J1_q[2]);


--D1L661 is ROM:inst2|Mux~583 at LC4_A11
--operation mode is normal

D1L661 = B1_dou[0] & (D1L98 # B1_dou[2]) # !B1_dou[0] & D1L78 & !B1_dou[2];


--D1L09 is ROM:inst2|Mux~310 at LC4_C8
--operation mode is normal

D1L09 = J1_q[3] & !J1_q[2] & !J1_q[1] & J1_q[0] # !J1_q[3] & J1_q[1] & (J1_q[2] $ J1_q[0]);


--D1L761 is ROM:inst2|Mux~584 at LC5_C8
--operation mode is normal

D1L761 = D1L661 & (D1L09 # !B1_dou[2]) # !D1L661 & B1_dou[2] & D1L88;


--D1L42 is ROM:inst2|dout[8]~1529 at LC6_C8
--operation mode is normal

D1L42 = D1L32 & (B1_dou[1] & D1L961 # !B1_dou[1] & D1L761);


--D1L52 is ROM:inst2|dout[8]~1530 at LC7_C8
--operation mode is normal

D1L52 = !CR & (B1_dou[1] & D1L961 # !B1_dou[1] & D1L761);


--D1L32 is ROM:inst2|dout[8]~1507 at LC3_C8
--operation mode is normal

D1L32 = D1L52 # D1L42 # CR & D1L32;


--D1L79 is ROM:inst2|Mux~327 at LC3_C6
--operation mode is normal

D1L79 = B1_dou[0] & J1_q[0] & (B1_dou[2] $ J1_q[1]) # !B1_dou[0] & !B1_dou[2] & J1_q[1];


--D1L89 is ROM:inst2|Mux~329 at LC4_C6
--operation mode is normal

D1L89 = B1_dou[0] & (J1_q[1] & J1_q[0] # !J1_q[1] & !B1_dou[2]) # !B1_dou[0] & (J1_q[0] & B1_dou[2] # !J1_q[0] & J1_q[1]);


--D1L502 is ROM:inst2|Mux~2039 at LC5_C6
--operation mode is normal

D1L502 = D1L89 & !J1_q[3] & D1L79 # !D1L89 & (J1_q[3] # D1L79);


--D1L99 is ROM:inst2|Mux~331 at LC6_C6
--operation mode is normal

D1L99 = J1_q[0] & (!B1_dou[0] & B1_dou[2] # !J1_q[1]) # !J1_q[0] & (B1_dou[0] $ B1_dou[2]);


--D1L602 is ROM:inst2|Mux~2040 at LC2_C6
--operation mode is normal

D1L602 = J1_q[2] & !D1L99 & !J1_q[3] # !J1_q[2] & D1L502;


--D1L59 is ROM:inst2|Mux~322 at LC2_B4
--operation mode is normal

D1L59 = B1_dou[0] & J1_q[1] & (J1_q[3] $ B1_dou[2]);


--D1L69 is ROM:inst2|Mux~324 at LC3_B4
--operation mode is normal

D1L69 = B1_dou[2] & (J1_q[1] $ (J1_q[3] & B1_dou[0])) # !B1_dou[2] & !J1_q[1] & (J1_q[3] $ B1_dou[0]);


--D1L702 is ROM:inst2|Mux~2041 at LC4_B4
--operation mode is normal

D1L702 = !J1_q[1] & !B1_dou[0] & B1_dou[2] & J1_q[3];


--D1L071 is ROM:inst2|Mux~587 at LC5_B4
--operation mode is normal

D1L071 = J1_q[0] & (D1L69 # J1_q[2]) # !J1_q[0] & D1L702 & !J1_q[2];


--D1L341 is ROM:inst2|Mux~482 at LC6_B4
--operation mode is normal

D1L341 = !B1_dou[2] & !J1_q[3] & J1_q[1];


--D1L171 is ROM:inst2|Mux~588 at LC7_B4
--operation mode is normal

D1L171 = D1L071 & (D1L341 # !J1_q[2]) # !D1L071 & J1_q[2] & D1L59;


--D1L802 is ROM:inst2|Mux~2042 at LC8_B4
--operation mode is normal

D1L802 = B1_dou[1] & D1L602 # !B1_dou[1] & D1L171;


--D1L12 is ROM:inst2|dout[7]~1508 at LC1_B4
--operation mode is normal

D1L12 = CR & D1L12 # !CR & D1L802;


--D1L641 is ROM:inst2|Mux~551 at LC1_C11
--operation mode is normal

D1L641 = B1_dou[0] & (B1_dou[2] & !B1_dou[1] # !B1_dou[2] & J1_q[0]) # !B1_dou[0] & B1_dou[1] & (B1_dou[2] $ !J1_q[0]);


--D1L902 is ROM:inst2|Mux~2043 at LC3_C11
--operation mode is normal

D1L902 = J1_q[3] & !J1_q[0] & D1L291 # !J1_q[3] & D1L641;


--D1L201 is ROM:inst2|Mux~337 at LC5_C11
--operation mode is normal

D1L201 = !B1_dou[2] & (J1_q[3] & J1_q[1] & !J1_q[0] # !J1_q[3] & J1_q[0]);


--D1L101 is ROM:inst2|Mux~335 at LC4_C5
--operation mode is normal

D1L101 = J1_q[0] & (J1_q[3] $ !J1_q[1] # !B1_dou[2]) # !J1_q[0] & (J1_q[1] # J1_q[3] $ B1_dou[2]);


--D1L001 is ROM:inst2|Mux~333 at LC5_C5
--operation mode is normal

D1L001 = J1_q[0] & B1_dou[2] & J1_q[1] # !J1_q[0] & J1_q[3] & (!J1_q[1] # !B1_dou[2]);


--D1L271 is ROM:inst2|Mux~589 at LC1_C5
--operation mode is normal

D1L271 = B1_dou[0] & (B1_dou[1] # !D1L101) # !B1_dou[0] & D1L001 & !B1_dou[1];


--D1L301 is ROM:inst2|Mux~339 at LC6_C11
--operation mode is normal

D1L301 = J1_q[3] & !J1_q[0] & (B1_dou[2] $ J1_q[1]) # !J1_q[3] & J1_q[0] & (B1_dou[2] # J1_q[1]);


--D1L371 is ROM:inst2|Mux~590 at LC7_C11
--operation mode is normal

D1L371 = D1L271 & (D1L301 # !B1_dou[1]) # !D1L271 & B1_dou[1] & D1L201;


--D1L012 is ROM:inst2|Mux~2044 at LC8_C11
--operation mode is normal

D1L012 = J1_q[2] & D1L902 & J1_q[1] # !J1_q[2] & D1L371;


--D1L91 is ROM:inst2|dout[6]~1509 at LC2_C11
--operation mode is normal

D1L91 = CR & D1L91 # !CR & D1L012;


--D1L801 is ROM:inst2|Mux~352 at LC4_C18
--operation mode is normal

D1L801 = !B1_dou[0] & !J1_q[0] & !B1_dou[2] & J1_q[3];


--D1L701 is ROM:inst2|Mux~349 at LC5_C18
--operation mode is normal

D1L701 = J1_q[3] & (B1_dou[2] & !B1_dou[0] # !B1_dou[2] & !J1_q[0]) # !J1_q[3] & (B1_dou[2] $ J1_q[0]);


--D1L601 is ROM:inst2|Mux~347 at LC6_C18
--operation mode is normal

D1L601 = B1_dou[2] & (J1_q[3] & !J1_q[0] # !J1_q[3] & B1_dou[0] & J1_q[0]);


--D1L471 is ROM:inst2|Mux~591 at LC7_C18
--operation mode is normal

D1L471 = J1_q[1] & (D1L701 # J1_q[2]) # !J1_q[1] & D1L601 & !J1_q[2];


--D1L901 is ROM:inst2|Mux~353 at LC8_C18
--operation mode is normal

D1L901 = J1_q[3] # B1_dou[2] # B1_dou[0] $ J1_q[0];


--D1L571 is ROM:inst2|Mux~592 at LC2_C18
--operation mode is normal

D1L571 = D1L471 & (!J1_q[2] # !D1L901) # !D1L471 & J1_q[2] & D1L801;


--D1L401 is ROM:inst2|Mux~341 at LC6_C10
--operation mode is normal

D1L401 = J1_q[3] # J1_q[2] # J1_q[1] & J1_q[0];


--D1L501 is ROM:inst2|Mux~343 at LC7_C10
--operation mode is normal

D1L501 = J1_q[3] & (!J1_q[1] # !J1_q[2]) # !J1_q[3] & (J1_q[2] # J1_q[1] & J1_q[0]);


--D1L112 is ROM:inst2|Mux~2045 at LC8_C10
--operation mode is normal

D1L112 = B1_dou[0] & !B1_dou[2] & D1L401 # !B1_dou[0] & (D1L501 # !B1_dou[2]);


--D1L212 is ROM:inst2|Mux~2046 at LC1_C12
--operation mode is normal

D1L212 = !J1_q[3] & J1_q[0] & J1_q[1] & B1_dou[0];


--D1L312 is ROM:inst2|Mux~2047 at LC1_C10
--operation mode is normal

D1L312 = D1L112 # !J1_q[2] & D1L212 & B1_dou[2];


--D1L412 is ROM:inst2|Mux~2048 at LC1_C22
--operation mode is normal

D1L412 = B1_dou[1] & D1L571 # !B1_dou[1] & D1L312;


--D1L71 is ROM:inst2|dout[5]~1510 at LC4_C22
--operation mode is normal

D1L71 = CR & D1L71 # !CR & D1L412;


--D1L611 is ROM:inst2|Mux~367 at LC3_C2
--operation mode is normal

D1L611 = B1_dou[1] & (J1_q[3] $ (J1_q[1] # J1_q[0]));


--D1L511 is ROM:inst2|Mux~365 at LC4_C2
--operation mode is normal

D1L511 = B1_dou[1] & (J1_q[0] # J1_q[3] & !J1_q[1]) # !B1_dou[1] & (J1_q[1] & (!J1_q[0] # !J1_q[3]) # !J1_q[1] & J1_q[0]);


--D1L411 is ROM:inst2|Mux~363 at LC5_C2
--operation mode is normal

D1L411 = J1_q[1] & (B1_dou[1] & !J1_q[3] & !J1_q[0] # !B1_dou[1] & J1_q[0]) # !J1_q[1] & J1_q[3] & !J1_q[0];


--D1L871 is ROM:inst2|Mux~595 at LC6_C2
--operation mode is normal

D1L871 = B1_dou[0] & (D1L511 # J1_q[2]) # !B1_dou[0] & D1L411 & !J1_q[2];


--D1L711 is ROM:inst2|Mux~369 at LC7_C2
--operation mode is normal

D1L711 = !J1_q[3] & (J1_q[0] $ (!B1_dou[1] & J1_q[1]));


--D1L971 is ROM:inst2|Mux~596 at LC1_C2
--operation mode is normal

D1L971 = D1L871 & (D1L711 # !J1_q[2]) # !D1L871 & J1_q[2] & D1L611;


--D1L111 is ROM:inst2|Mux~358 at LC3_A2
--operation mode is normal

D1L111 = !B1_dou[0] & !J1_q[2] & J1_q[0] & J1_q[3];


--D1L211 is ROM:inst2|Mux~359 at LC4_A10
--operation mode is normal

D1L211 = J1_q[2] & B1_dou[0] & (J1_q[3] $ J1_q[0]);


--D1L011 is ROM:inst2|Mux~356 at LC5_A10
--operation mode is normal

D1L011 = !B1_dou[0] & !J1_q[0] & !J1_q[2] & J1_q[3];


--D1L671 is ROM:inst2|Mux~593 at LC8_A10
--operation mode is normal

D1L671 = J1_q[1] & (D1L211 # B1_dou[1]) # !J1_q[1] & D1L011 & !B1_dou[1];


--D1L311 is ROM:inst2|Mux~361 at LC4_A2
--operation mode is normal

D1L311 = J1_q[3] & !J1_q[2] & B1_dou[0] & !J1_q[0] # !J1_q[3] & (J1_q[0] $ (J1_q[2] & !B1_dou[0]));


--D1L771 is ROM:inst2|Mux~594 at LC5_A2
--operation mode is normal

D1L771 = D1L671 & (D1L311 # !B1_dou[1]) # !D1L671 & B1_dou[1] & D1L111;


--D1L41 is ROM:inst2|dout[4]~1535 at LC7_A2
--operation mode is normal

D1L41 = D1L31 & (B1_dou[2] & D1L971 # !B1_dou[2] & D1L771);


--D1L51 is ROM:inst2|dout[4]~1536 at LC8_A2
--operation mode is normal

D1L51 = !CR & (B1_dou[2] & D1L971 # !B1_dou[2] & D1L771);


--D1L31 is ROM:inst2|dout[4]~1511 at LC6_A2
--operation mode is normal

D1L31 = D1L51 # D1L41 # CR & D1L31;


--D1L321 is ROM:inst2|Mux~383 at LC2_B7
--operation mode is normal

D1L321 = !J1_q[0] & (B1_dou[1] & B1_dou[2] & !J1_q[1] # !B1_dou[1] & !B1_dou[2] & J1_q[1]);


--D1L221 is ROM:inst2|Mux~381 at LC3_B7
--operation mode is normal

D1L221 = B1_dou[1] & (!J1_q[1] # !B1_dou[2]) # !B1_dou[1] & J1_q[1] & (B1_dou[2] $ J1_q[0]);


--D1L512 is ROM:inst2|Mux~2049 at LC4_B7
--operation mode is normal

D1L512 = J1_q[0] & J1_q[1];


--D1L612 is ROM:inst2|Mux~2050 at LC5_B7
--operation mode is normal

D1L612 = D1L512 & (E1L7 # D1L221 & B1_dou[0]) # !D1L512 & D1L221 & B1_dou[0];


--D1L712 is ROM:inst2|Mux~2051 at LC6_B7
--operation mode is normal

D1L712 = J1_q[3] & D1L321 & B1_dou[0] # !J1_q[3] & D1L612;


--D1L021 is ROM:inst2|Mux~375 at LC3_B12
--operation mode is normal

D1L021 = J1_q[1] & !B1_dou[1] & B1_dou[2] & !J1_q[0] # !J1_q[1] & J1_q[0] & (B1_dou[1] $ !B1_dou[2]);


--D1L911 is ROM:inst2|Mux~373 at LC4_B12
--operation mode is normal

D1L911 = J1_q[1] & (B1_dou[2] & !J1_q[0] # !B1_dou[2] & !B1_dou[1]) # !J1_q[1] & (B1_dou[1] & B1_dou[2] # !B1_dou[1] & J1_q[0]);


--D1L811 is ROM:inst2|Mux~371 at LC5_B12
--operation mode is normal

D1L811 = B1_dou[2] & (B1_dou[1] & J1_q[1] & J1_q[0] # !B1_dou[1] & (J1_q[1] # J1_q[0]));


--D1L081 is ROM:inst2|Mux~597 at LC6_B12
--operation mode is normal

D1L081 = J1_q[3] & (B1_dou[0] # !D1L911) # !J1_q[3] & D1L811 & !B1_dou[0];


--D1L121 is ROM:inst2|Mux~377 at LC7_B12
--operation mode is normal

D1L121 = !J1_q[1] & (B1_dou[1] & !B1_dou[2] # !B1_dou[1] & B1_dou[2] & J1_q[0]);


--D1L181 is ROM:inst2|Mux~598 at LC1_B12
--operation mode is normal

D1L181 = D1L081 & (D1L121 # !B1_dou[0]) # !D1L081 & B1_dou[0] & D1L021;


--D1L812 is ROM:inst2|Mux~2052 at LC7_B7
--operation mode is normal

D1L812 = J1_q[2] & D1L712 # !J1_q[2] & D1L181;


--D1L11 is ROM:inst2|dout[3]~1512 at LC8_B7
--operation mode is normal

D1L11 = CR & D1L11 # !CR & D1L812;


--D1L921 is ROM:inst2|Mux~395 at LC2_A8
--operation mode is normal

D1L921 = B1_dou[0] & (J1_q[2] # !J1_q[1] & J1_q[0]) # !B1_dou[0] & J1_q[2] & (J1_q[0] # !J1_q[1]);


--D1L821 is ROM:inst2|Mux~393 at LC6_A10
--operation mode is normal

D1L821 = J1_q[2] # J1_q[0] & J1_q[1] # !J1_q[0] & B1_dou[0];


--D1L721 is ROM:inst2|Mux~391 at LC7_A10
--operation mode is normal

D1L721 = J1_q[0] & !B1_dou[0] & J1_q[2] # !J1_q[0] & J1_q[1];


--D1L481 is ROM:inst2|Mux~601 at LC1_A10
--operation mode is normal

D1L481 = J1_q[3] & (B1_dou[1] # !D1L821) # !J1_q[3] & D1L721 & !B1_dou[1];


--D1L031 is ROM:inst2|Mux~397 at LC1_A15
--operation mode is normal

D1L031 = B1_dou[0] & J1_q[2] & (J1_q[1] # J1_q[0]) # !B1_dou[0] & (J1_q[2] # J1_q[1] & J1_q[0]);


--D1L581 is ROM:inst2|Mux~602 at LC3_A8
--operation mode is normal

D1L581 = D1L481 & (!B1_dou[1] # !D1L031) # !D1L481 & B1_dou[1] & D1L921;


--D1L521 is ROM:inst2|Mux~387 at LC4_A8
--operation mode is normal

D1L521 = J1_q[3] & !J1_q[1] & (J1_q[2] $ J1_q[0]);


--D1L421 is ROM:inst2|Mux~386 at LC8_A11
--operation mode is normal

D1L421 = !J1_q[0] & !J1_q[1] & !J1_q[2] & J1_q[3];


--D1L281 is ROM:inst2|Mux~599 at LC1_A11
--operation mode is normal

D1L281 = B1_dou[0] & (D1L98 # B1_dou[1]) # !B1_dou[0] & D1L421 & !B1_dou[1];


--D1L621 is ROM:inst2|Mux~390 at LC5_A8
--operation mode is normal

D1L621 = !J1_q[3] & J1_q[0] & J1_q[1] & J1_q[2];


--D1L381 is ROM:inst2|Mux~600 at LC6_A8
--operation mode is normal

D1L381 = D1L281 & (D1L621 # !B1_dou[1]) # !D1L281 & B1_dou[1] & D1L521;


--D1L8 is ROM:inst2|dout[2]~1539 at LC7_A8
--operation mode is normal

D1L8 = D1L7 & (B1_dou[2] & D1L581 # !B1_dou[2] & D1L381);


--D1L9 is ROM:inst2|dout[2]~1540 at LC8_A8
--operation mode is normal

D1L9 = !CR & (B1_dou[2] & D1L581 # !B1_dou[2] & D1L381);


--D1L7 is ROM:inst2|dout[2]~1513 at LC1_A8
--operation mode is normal

D1L7 = D1L9 # D1L8 # CR & D1L7;


--D1L631 is ROM:inst2|Mux~411 at LC6_C5
--operation mode is normal

D1L631 = B1_dou[0] & (J1_q[3] $ (J1_q[1] # J1_q[0])) # !B1_dou[0] & J1_q[1] & (J1_q[3] # J1_q[0]);


--D1L531 is ROM:inst2|Mux~408 at LC7_C5
--operation mode is normal

D1L531 = !B1_dou[0] & !J1_q[1] & J1_q[0] & J1_q[3];


--D1L881 is ROM:inst2|Mux~605 at LC2_C5
--operation mode is normal

D1L881 = B1_dou[2] & (D1L631 # J1_q[2]) # !B1_dou[2] & D1L531 & !J1_q[2];


--D1L731 is ROM:inst2|Mux~413 at LC1_C3
--operation mode is normal

D1L731 = !J1_q[3] & !J1_q[0] & (B1_dou[0] $ J1_q[1]);


--D1L981 is ROM:inst2|Mux~606 at LC2_C3
--operation mode is normal

D1L981 = D1L881 & (D1L731 # !J1_q[2]) # !D1L881 & J1_q[2] & D1L212;