block1.fit.eqn

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--B1_dou[2] is AND1:inst|dou[2] at LC4_B11
--operation mode is normal

B1_dou[2]_lut_out = B1_dou[2] $ (B1_dou[0] & B1_dou[1]);
B1_dou[2] = DFFEA(B1_dou[2]_lut_out, !hzsel, !CR, , , , );


--B1_dou[1] is AND1:inst|dou[1] at LC6_B11
--operation mode is normal

B1_dou[1]_lut_out = B1_dou[0] $ B1_dou[1];
B1_dou[1] = DFFEA(B1_dou[1]_lut_out, !hzsel, !CR, , , , );


--B1_dou[0] is AND1:inst|dou[0] at LC2_B11
--operation mode is normal

B1_dou[0]_lut_out = !B1_dou[0];
B1_dou[0] = DFFEA(B1_dou[0]_lut_out, !hzsel, !CR, , , , );


--G1L6 is DELED:inst8|d1out[6]~33 at LC7_C13
--operation mode is normal

G1L6 = B1_dou[2] # B1_dou[0] $ B1_dou[1];


--G1L5 is DELED:inst8|d1out[5]~204 at LC5_C15
--operation mode is normal

G1L5 = !B1_dou[1] & B1_dou[2];


--D1L291 is ROM:inst2|Mux~2025 at LC4_C11
--operation mode is normal

D1L291 = !B1_dou[1] & !B1_dou[2] & B1_dou[0];


--G1L4 is DELED:inst8|d1out[3]~205 at LC3_C21
--operation mode is normal

G1L4 = B1_dou[1] & (B1_dou[0] $ !B1_dou[2]) # !B1_dou[1] & (B1_dou[0] # B1_dou[2]);


--G1L3 is DELED:inst8|d1out[2]~34 at LC5_B11
--operation mode is normal

G1L3 = !B1_dou[2] & B1_dou[1] # !B1_dou[0];


--G1L2 is DELED:inst8|d1out[1]~206 at LC3_B11
--operation mode is normal

G1L2 = B1_dou[1] & B1_dou[0] # !B1_dou[1] & B1_dou[2];


--G1L1 is DELED:inst8|d1out[0]~35 at LC1_B10
--operation mode is normal

G1L1 = B1_dou[0] # B1_dou[1] $ B1_dou[2];


--J1_q[3] is ANDL:inst1|lpm_counter:dou_rtl_0|alt_counter_f10ke:wysi_counter|q[3] at LC5_A3
--operation mode is up_dn_cntr

J1_q[3]_lut_out = J1_q[3] $ J1L7;
J1_q[3] = DFFEA(J1_q[3]_lut_out, GLOBAL(F1_clkout5k), !CR, , , , );


--J1_q[2] is ANDL:inst1|lpm_counter:dou_rtl_0|alt_counter_f10ke:wysi_counter|q[2] at LC4_A3
--operation mode is up_dn_cntr

J1_q[2]_lut_out = J1_q[2] $ J1L5;
J1_q[2] = DFFEA(J1_q[2]_lut_out, GLOBAL(F1_clkout5k), !CR, , , , );

--J1L7 is ANDL:inst1|lpm_counter:dou_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC4_A3
--operation mode is up_dn_cntr

J1L7 = CARRY(J1_q[2] & J1L5);


--J1_q[1] is ANDL:inst1|lpm_counter:dou_rtl_0|alt_counter_f10ke:wysi_counter|q[1] at LC3_A3
--operation mode is up_dn_cntr

J1_q[1]_lut_out = J1_q[1] $ J1L3;
J1_q[1] = DFFEA(J1_q[1]_lut_out, GLOBAL(F1_clkout5k), !CR, , , , );

--J1L5 is ANDL:inst1|lpm_counter:dou_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC3_A3
--operation mode is up_dn_cntr

J1L5 = CARRY(J1_q[1] & J1L3);


--J1_q[0] is ANDL:inst1|lpm_counter:dou_rtl_0|alt_counter_f10ke:wysi_counter|q[0] at LC2_A3
--operation mode is up_dn_cntr

J1_q[0]_lut_out = !J1_q[0];
J1_q[0] = DFFEA(J1_q[0]_lut_out, GLOBAL(F1_clkout5k), !CR, , , , );

--J1L3 is ANDL:inst1|lpm_counter:dou_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC2_A3
--operation mode is up_dn_cntr

J1L3 = CARRY(J1_q[0]);


--E1L1 is YIMAQI:inst3|LED[0]~59 at LC4_C19
--operation mode is normal

E1L1 = !B1_dou[0] # !B1_dou[2] # !B1_dou[1];


--E1L2 is YIMAQI:inst3|LED[0]~60 at LC7_B11
--operation mode is normal

E1L2 = B1_dou[0] # !B1_dou[2] # !B1_dou[1];


--E1L3 is YIMAQI:inst3|LED[0]~61 at LC1_B11
--operation mode is normal

E1L3 = B1_dou[1] # !B1_dou[0] # !B1_dou[2];


--E1L4 is YIMAQI:inst3|LED[0]~62 at LC4_C9
--operation mode is normal

E1L4 = B1_dou[1] # B1_dou[0] # !B1_dou[2];


--E1L5 is YIMAQI:inst3|LED[0]~63 at LC1_C9
--operation mode is normal

E1L5 = B1_dou[2] # !B1_dou[0] # !B1_dou[1];


--E1L7 is YIMAQI:inst3|LED[0]~120 at LC1_B7
--operation mode is normal

E1L7 = !B1_dou[2] & !B1_dou[0] & B1_dou[1];


--E1L6 is YIMAQI:inst3|LED[0]~65 at LC7_C21
--operation mode is normal

E1L6 = B1_dou[1] # B1_dou[2] # B1_dou[0];


--D1L54 is ROM:inst2|dout[15]~1500 at LC1_C15
--operation mode is normal

D1L54 = D1L422 & CR & D1L54 # !D1L422 & (D1L54 # !CR);


--D1L391 is ROM:inst2|Mux~2027 at LC3_A15
--operation mode is normal

D1L391 = !J1_q[2] & J1_q[0] & J1_q[3] & B1_dou[2];


--D1L25 is ROM:inst2|Mux~226 at LC4_A15
--operation mode is normal

D1L25 = B1_dou[2] & !J1_q[1] & (J1_q[2] $ J1_q[0]) # !B1_dou[2] & J1_q[2] & J1_q[1] & J1_q[0];


--D1L491 is ROM:inst2|Mux~2028 at LC5_A15
--operation mode is normal

D1L491 = J1_q[3] & D1L391 & J1_q[1] # !J1_q[3] & (D1L25 # D1L391 & J1_q[1]);


--D1L15 is ROM:inst2|Mux~224 at LC6_A15
--operation mode is normal

D1L15 = !B1_dou[2] & (J1_q[2] & J1_q[1] & !J1_q[0] # !J1_q[2] & !J1_q[1] & J1_q[0]);


--D1L591 is ROM:inst2|Mux~2029 at LC7_A15
--operation mode is normal

D1L591 = B1_dou[0] & D1L491 # !B1_dou[0] & !J1_q[3] & D1L15;


--D1L84 is ROM:inst2|Mux~218 at LC2_A7
--operation mode is normal

D1L84 = J1_q[3] # J1_q[2] & (!J1_q[0] # !J1_q[1]) # !J1_q[2] & J1_q[1];


--D1L94 is ROM:inst2|Mux~220 at LC1_A3
--operation mode is normal

D1L94 = J1_q[3] & (!J1_q[1] # !J1_q[2]) # !J1_q[3] & (J1_q[0] & J1_q[2] # !J1_q[0] & J1_q[1]);


--D1L74 is ROM:inst2|Mux~216 at LC3_C10
--operation mode is normal

D1L74 = J1_q[0] & (J1_q[3] & J1_q[2] & J1_q[1] # !J1_q[3] & !J1_q[2] & !J1_q[1]);


--D1L841 is ROM:inst2|Mux~565 at LC6_A3
--operation mode is normal

D1L841 = B1_dou[2] & (D1L94 # B1_dou[0]) # !B1_dou[2] & D1L74 & !B1_dou[0];


--D1L05 is ROM:inst2|Mux~222 at LC8_A3
--operation mode is normal

D1L05 = J1_q[2] & !J1_q[3] & (J1_q[1] $ J1_q[0]) # !J1_q[2] & J1_q[1] & (J1_q[3] # J1_q[0]);


--D1L941 is ROM:inst2|Mux~566 at LC7_A3
--operation mode is normal

D1L941 = D1L841 & (D1L05 # !B1_dou[0]) # !D1L841 & B1_dou[0] & !D1L84;


--D1L691 is ROM:inst2|Mux~2030 at LC8_A15
--operation mode is normal

D1L691 = B1_dou[1] & D1L591 # !B1_dou[1] & D1L941;


--D1L34 is ROM:inst2|dout[14]~1501 at LC2_A15
--operation mode is normal

D1L34 = CR & D1L34 # !CR & D1L691;


--D1L75 is ROM:inst2|Mux~238 at LC2_C7
--operation mode is normal

D1L75 = J1_q[0] & (B1_dou[2] & !J1_q[1] # !B1_dou[2] & J1_q[2] & J1_q[1]);


--D1L85 is ROM:inst2|Mux~241 at LC4_C10
--operation mode is normal

D1L85 = !J1_q[0] & !J1_q[1] & !J1_q[2] & B1_dou[2];


--D1L65 is ROM:inst2|Mux~236 at LC5_C10
--operation mode is normal

D1L65 = !B1_dou[2] & (J1_q[1] # J1_q[2] & !J1_q[0]);


--D1L051 is ROM:inst2|Mux~567 at LC2_C10
--operation mode is normal

D1L051 = J1_q[3] & (D1L85 # B1_dou[0]) # !J1_q[3] & D1L65 & !B1_dou[0];


--D1L95 is ROM:inst2|Mux~242 at LC2_C2
--operation mode is normal

D1L95 = B1_dou[2] & !J1_q[0] & (J1_q[2] $ J1_q[1]);


--D1L151 is ROM:inst2|Mux~568 at LC3_C7
--operation mode is normal

D1L151 = D1L051 & (D1L95 # !B1_dou[0]) # !D1L051 & B1_dou[0] & D1L75;


--D1L55 is ROM:inst2|Mux~234 at LC4_C7
--operation mode is normal

D1L55 = J1_q[2] & !J1_q[3] & (J1_q[1] $ !J1_q[0]) # !J1_q[2] & J1_q[0] & (J1_q[3] $ J1_q[1]);


--D1L35 is ROM:inst2|Mux~230 at LC5_C7
--operation mode is normal

D1L35 = J1_q[3] & J1_q[2] & J1_q[1] # !J1_q[3] & !J1_q[2] & !J1_q[1] & J1_q[0];


--D1L791 is ROM:inst2|Mux~2031 at LC6_C7
--operation mode is normal

D1L791 = B1_dou[2] & D1L55 & B1_dou[0] # !B1_dou[2] & (D1L35 # B1_dou[0]);


--D1L45 is ROM:inst2|Mux~232 at LC7_C7
--operation mode is normal

D1L45 = J1_q[1] & !J1_q[3] & !J1_q[2] & J1_q[0] # !J1_q[1] & !J1_q[0] & (J1_q[3] $ J1_q[2]);


--D1L891 is ROM:inst2|Mux~2032 at LC8_C7
--operation mode is normal

D1L891 = D1L791 # !B1_dou[0] & D1L45 & B1_dou[2];


--D1L991 is ROM:inst2|Mux~2033 at LC1_C7
--operation mode is normal

D1L991 = B1_dou[1] & D1L151 # !B1_dou[1] & D1L891;


--D1L14 is ROM:inst2|dout[13]~1502 at LC2_C13
--operation mode is normal

D1L14 = CR & D1L14 # !CR & D1L991;


--D1L56 is ROM:inst2|Mux~256 at LC4_A5
--operation mode is normal

D1L56 = B1_dou[2] & (J1_q[3] & J1_q[2] & !J1_q[0] # !J1_q[3] & !J1_q[2] & J1_q[0]);


--D1L46 is ROM:inst2|Mux~254 at LC5_A5
--operation mode is normal

D1L46 = !J1_q[3] & J1_q[0] & (J1_q[2] $ B1_dou[2]);


--D1L002 is ROM:inst2|Mux~2034 at LC6_A5
--operation mode is normal

D1L002 = !J1_q[0] & !J1_q[2] & B1_dou[2] & J1_q[3];


--D1L451 is ROM:inst2|Mux~571 at LC7_A5
--operation mode is normal

D1L451 = J1_q[1] & (D1L46 # B1_dou[1]) # !J1_q[1] & D1L002 & !B1_dou[1];


--D1L66 is ROM:inst2|Mux~258 at LC8_A5
--operation mode is normal

D1L66 = J1_q[3] & !J1_q[2] & !J1_q[0] # !J1_q[3] & (B1_dou[2] & J1_q[2] & !J1_q[0] # !B1_dou[2] & J1_q[0]);


--D1L551 is ROM:inst2|Mux~572 at LC2_A5
--operation mode is normal

D1L551 = D1L451 & (D1L66 # !B1_dou[1]) # !D1L451 & B1_dou[1] & D1L56;


--D1L16 is ROM:inst2|Mux~246 at LC3_A4
--operation mode is normal

D1L16 = J1_q[3] & !J1_q[2] & !J1_q[1] # !J1_q[3] & J1_q[2] & J1_q[1] & !B1_dou[1];


--D1L26 is ROM:inst2|Mux~248 at LC1_B5
--operation mode is normal

D1L26 = B1_dou[1] & (J1_q[1] $ (J1_q[3] # J1_q[2])) # !B1_dou[1] & J1_q[3] & J1_q[2];


--D1L06 is ROM:inst2|Mux~244 at LC2_B12
--operation mode is normal

D1L06 = J1_q[1] & (J1_q[3] & J1_q[2] & !B1_dou[1] # !J1_q[3] & (J1_q[2] $ !B1_dou[1]));


--D1L251 is ROM:inst2|Mux~569 at LC8_B12
--operation mode is normal

D1L251 = J1_q[0] & (D1L26 # B1_dou[2]) # !J1_q[0] & D1L06 & !B1_dou[2];


--D1L36 is ROM:inst2|Mux~250 at LC4_A4
--operation mode is normal

D1L36 = J1_q[2] & !J1_q[3] & J1_q[1] # !J1_q[2] & !B1_dou[1] & (J1_q[3] $ J1_q[1]);


--D1L351 is ROM:inst2|Mux~570 at LC5_A4
--operation mode is normal

D1L351 = D1L251 & (D1L36 # !B1_dou[2]) # !D1L251 & B1_dou[2] & D1L16;


--D1L83 is ROM:inst2|dout[12]~1519 at LC6_A4
--operation mode is normal

D1L83 = D1L73 & (B1_dou[0] & D1L551 # !B1_dou[0] & D1L351);


--D1L93 is ROM:inst2|dout[12]~1520 at LC7_A4
--operation mode is normal

D1L93 = !CR & (B1_dou[0] & D1L551 # !B1_dou[0] & D1L351);


--D1L73 is ROM:inst2|dout[12]~1503 at LC1_A4
--operation mode is normal

D1L73 = D1L93 # D1L83 # CR & D1L73;


--D1L27 is ROM:inst2|Mux~271 at LC1_A5
--operation mode is normal

D1L27 = J1_q[0] & J1_q[3] & B1_dou[1] & B1_dou[2];


--D1L141 is ROM:inst2|Mux~452 at LC2_A11
--operation mode is normal

D1L141 = !J1_q[0] & !B1_dou[2] & B1_dou[1];


--D1L17 is ROM:inst2|Mux~269 at LC5_A11
--operation mode is normal

D1L17 = !B1_dou[1] & !B1_dou[2] & J1_q[0] & J1_q[3];


--D1L851 is ROM:inst2|Mux~575 at LC3_A11
--operation mode is normal

D1L851 = J1_q[1] & (D1L141 # B1_dou[0]) # !J1_q[1] & D1L17 & !B1_dou[0];


--D1L37 is ROM:inst2|Mux~273 at LC1_A6
--operation mode is normal

D1L37 = !J1_q[3] & (J1_q[0] $ (B1_dou[2] & B1_dou[1]));


--D1L951 is ROM:inst2|Mux~576 at LC2_A6
--operation mode is normal

D1L951 = D1L851 & (D1L37 # !B1_dou[0]) # !D1L851 & B1_dou[0] & D1L27;


--D1L96 is ROM:inst2|Mux~264 at LC4_A6
--operation mode is normal

D1L96 = J1_q[3] & (J1_q[1] $ (J1_q[0] # !B1_dou[0])) # !J1_q[3] & J1_q[1] & J1_q[0];


--D1L86 is ROM:inst2|Mux~262 at LC5_C12
--operation mode is normal

D1L86 = J1_q[3] & !J1_q[1] & !J1_q[0] # !J1_q[3] & J1_q[1] & (J1_q[0] # !B1_dou[0]);


--D1L76 is ROM:inst2|Mux~261 at LC2_A2
--operation mode is normal

D1L76 = !J1_q[3] & !B1_dou[0] & J1_q[0] & J1_q[1];


--D1L651 is ROM:inst2|Mux~573 at LC1_A2
--operation mode is normal

D1L651 = B1_dou[2] & (D1L86 # B1_dou[1]) # !B1_dou[2] & D1L76 & !B1_dou[1];


--D1L07 is ROM:inst2|Mux~266 at LC5_A6
--operation mode is normal

D1L07 = J1_q[3] & !J1_q[0] & (B1_dou[0] $ !J1_q[1]) # !J1_q[3] & B1_dou[0] & (J1_q[1] $ J1_q[0]);


--D1L751 is ROM:inst2|Mux~574 at LC6_A6
--operation mode is normal

D1L751 = D1L651 & (D1L07 # !B1_dou[1]) # !D1L651 & B1_dou[1] & D1L96;


--D1L43 is ROM:inst2|dout[11]~1522 at LC7_A6
--operation mode is normal

D1L43 = D1L33 & (J1_q[2] & D1L951 # !J1_q[2] & D1L751);


--D1L53 is ROM:inst2|dout[11]~1523 at LC8_A6
--operation mode is normal

D1L53 = !CR & (J1_q[2] & D1L951 # !J1_q[2] & D1L751);


--D1L33 is ROM:inst2|dout[11]~1504 at LC3_A6
--operation mode is normal

D1L33 = D1L53 # D1L43 # CR & D1L33;


--D1L87 is ROM:inst2|Mux~285 at LC1_A9
--operation mode is normal

D1L87 = !B1_dou[2] & !J1_q[2] & J1_q[1] & J1_q[3];


--D1L97 is ROM:inst2|Mux~286 at LC2_A9
--operation mode is normal

D1L97 = !J1_q[2] & !B1_dou[2] & (J1_q[3] $ J1_q[1]);


--D1L77 is ROM:inst2|Mux~282 at LC3_A9
--operation mode is normal

D1L77 = J1_q[3] & !J1_q[1] & (J1_q[2] $ B1_dou[2]) # !J1_q[3] & J1_q[2] & J1_q[1] & !B1_dou[2];


--D1L261 is ROM:inst2|Mux~579 at LC4_A9
--operation mode is normal

D1L261 = J1_q[0] & (D1L97 # B1_dou[0]) # !J1_q[0] & D1L77 & !B1_dou[0];


--D1L08 is ROM:inst2|Mux~288 at LC3_A5
--operation mode is normal

D1L08 = J1_q[3] & !J1_q[1] & B1_dou[2] # !J1_q[3] & (J1_q[1] # !J1_q[2] & B1_dou[2]);


--D1L361 is ROM:inst2|Mux~580 at LC6_A9
--operation mode is normal

D1L361 = D1L261 & (D1L08 # !B1_dou[0]) # !D1L261 & B1_dou[0] & D1L87;


--D1L47 is ROM:inst2|Mux~276 at LC3_A7
--operation mode is normal

D1L47 = J1_q[3] & !J1_q[2] & (!J1_q[0] # !J1_q[1]) # !J1_q[3] & (J1_q[0] # J1_q[2] & J1_q[1]);


--D1L57 is ROM:inst2|Mux~278 at LC4_A7
--operation mode is normal

D1L57 = J1_q[3] & (!J1_q[0] # !J1_q[1] # !J1_q[2]) # !J1_q[3] & J1_q[2];


--D1L241 is ROM:inst2|Mux~455 at LC5_A7
--operation mode is normal

D1L241 = !J1_q[0] & !J1_q[1] & J1_q[2];


--D1L061 is ROM:inst2|Mux~577 at LC6_A7
--operation mode is normal

D1L061 = B1_dou[0] & (D1L57 # B1_dou[2]) # !B1_dou[0] & D1L241 & !B1_dou[2];


--D1L67 is ROM:inst2|Mux~280 at LC7_A7
--operation mode is normal

D1L67 = J1_q[3] & !J1_q[2] & !J1_q[1] & !J1_q[0] # !J1_q[3] & J1_q[1] & J1_q[0];


--D1L161 is ROM:inst2|Mux~578 at LC1_A7
--operation mode is normal

D1L161 = D1L061 & (D1L67 # !B1_dou[2]) # !D1L061 & B1_dou[2] & D1L47;


--D1L03 is ROM:inst2|dout[10]~1525 at LC7_A9
--operation mode is normal

D1L03 = D1L92 & (B1_dou[1] & D1L361 # !B1_dou[1] & D1L161);


--D1L13 is ROM:inst2|dout[10]~1526 at LC8_A9
--operation mode is normal

D1L13 = !CR & (B1_dou[1] & D1L361 # !B1_dou[1] & D1L161);


--D1L92 is ROM:inst2|dout[10]~1505 at LC5_A9
--operation mode is normal

D1L92 = D1L13 # D1L03 # CR & D1L92;


--D1L48 is ROM:inst2|Mux~298 at LC1_A19
--operation mode is normal

D1L48 = J1_q[3] & (!J1_q[1] & !J1_q[0] # !J1_q[2]) # !J1_q[3] & J1_q[2];


--D1L58 is ROM:inst2|Mux~300 at LC2_A19
--operation mode is normal

D1L58 = J1_q[1] & (J1_q[3] & !J1_q[2] & !J1_q[0] # !J1_q[3] & J1_q[0]);


--D1L38 is ROM:inst2|Mux~296 at LC3_A19
--operation mode is normal

D1L38 = J1_q[3] & (J1_q[2] & !J1_q[1] & !J1_q[0] # !J1_q[2] & (J1_q[1] $ J1_q[0])) # !J1_q[3] & J1_q[1] & (J1_q[2] $ J1_q[0]);


--D1L461 is ROM:inst2|Mux~581 at LC4_A19
--operation mode is normal

D1L461 = B1_dou[0] & (D1L58 # B1_dou[2]) # !B1_dou[0] & D1L38 & !B1_dou[2];


--D1L68 is ROM:inst2|Mux~302 at LC5_A19
--operation mode is normal

D1L68 = J1_q[2] & !J1_q[3] & (J1_q[1] $ !J1_q[0]) # !J1_q[2] & !J1_q[1] & J1_q[0];


--D1L561 is ROM:inst2|Mux~582 at LC6_A19
--operation mode is normal

D1L561 = D1L461 & (D1L68 # !B1_dou[2]) # !D1L461 & B1_dou[2] & D1L48;


--D1L102 is ROM:inst2|Mux~2035 at LC1_C18
--operation mode is normal

D1L102 = !B1_dou[0] & !J1_q[0] & J1_q[3];


--D1L202 is ROM:inst2|Mux~2036 at LC3_C18