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📄 ram256x8.fit

📁 在Maxplus软件平台开发的
💻 FIT
字号:
-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 02/15/2003 10:19:10      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "ram256x8"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "address0"                     : INPUT_PIN  = 7      ;
    "address1"                     : INPUT_PIN  = 70     ;
    "address2"                     : INPUT_PIN  = 16     ;
    "address3"                     : INPUT_PIN  = 37     ;
    "address4"                     : INPUT_PIN  = 9      ;
    "address5"                     : INPUT_PIN  = 84     ;
    "address6"                     : INPUT_PIN  = 44     ;
    "address7"                     : INPUT_PIN  = 42     ;
    "data0"                        : INPUT_PIN  = 17     ;
    "data1"                        : INPUT_PIN  = 36     ;
    "data2"                        : INPUT_PIN  = 11     ;
    "data3"                        : INPUT_PIN  = 39     ;
    "data4"                        : INPUT_PIN  = 3      ;
    "data5"                        : INPUT_PIN  = 19     ;
    "data6"                        : INPUT_PIN  = 10     ;
    "data7"                        : INPUT_PIN  = 73     ;
    "inclock"                      : INPUT_PIN  = 43     ;
    "outclock"                     : INPUT_PIN  = 1      ;
    "we"                           : INPUT_PIN  = 2      ;
    "q0"                           : OUTPUT_PIN = 28     ;
    "q1"                           : OUTPUT_PIN = 18     ;
    "q2"                           : OUTPUT_PIN = 69     ;
    "q3"                           : OUTPUT_PIN = 30     ;
    "q4"                           : OUTPUT_PIN = 22     ;
    "q5"                           : OUTPUT_PIN = 60     ;
    "q6"                           : OUTPUT_PIN = 72     ;
    "q7"                           : OUTPUT_PIN = 71     ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_0" : LOCATION   = EC3_A  ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_1" : LOCATION   = EC1_A  ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_2" : LOCATION   = EC5_A  ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_3" : LOCATION   = EC8_A  ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_4" : LOCATION   = EC2_A  ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_5" : LOCATION   = EC7_A  ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_6" : LOCATION   = EC6_A  ;
    "|lpm_ram_dq:inst_1|altram:sram|segment0_7" : LOCATION   = EC4_A  ;

END;

INTERNAL_INFO "ram256x8"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OV0C2P7 : LORAX = "1:V1C2,HHL21R0,RP15R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
    OH4R0P70 : LORAX = "1:G47R0,RP3R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
    OH8R0P16 : LORAX = "1:G13R0,RP0R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
    OV3C8P37 : LORAX = "1:V18C8,HHL40R0,RP9R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
    OV1C1P9 : LORAX = "1:V8C1,G2R0,RP13R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
    OD0P84  : LORAX = "1:FB0|2:FH0R0,RP12R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A||";
    OD2P44  : LORAX = "1:FB2|2:FH2R0,RP21R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A||";
    OD3P42  : LORAX = "1:FB3|2:FH3R0,RP5R0->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A||";
    OH10R0P17 : LORAX = "1:G41R0,RP18R0->EC3_A|";
    OV2C6P36 : LORAX = "1:V14C6,HHL41R0,RP8R0->EC1_A|";
    OV1C0P11 : LORAX = "1:V8C0,HHL3R0,RP19R0->EC5_A|";
    OV3C10P39 : LORAX = "1:V18C10,HHL31R0,RP4R0->EC8_A|";
    OV0C11P3 : LORAX = "1:V1C11,HHL20R0,RP16R0->EC2_A|";
    OH14R0P19 : LORAX = "1:G44R0,RP6R0->EC7_A|";
    OV0C0P10 : LORAX = "1:V1C0,HHL22R0,RP2R0->EC6_A|";
    OH0R0P73 : LORAX = "1:G10R0,RP11R0->EC4_A|";
    OD5P43  : LORAX = "1:FB5->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
    EC3_A   : LORAX = "1:RB2R0,RV6,G3R2->OH10R2P28|";
    EC1_A   : LORAX = "1:RB0R0,G60R0->OH12R0P18|";
    EC5_A   : LORAX = "1:RB4R0,G75R0->OH7R0P69|";
    EC8_A   : LORAX = "1:RB7R0,RV21,G92R2->OH14R2P30|";
    EC2_A   : LORAX = "1:RB1R0,RV12,G22R1->OH9R1P22|";
    EC7_A   : LORAX = "1:RB6R0,G35R0,V9C15,HHR17R2->OH3R2P60|";
    EC6_A   : LORAX = "1:RB5R0,G6R0->OH2R0P72|";
    EC4_A   : LORAX = "1:RB3R0,G21R0->OH3R0P71|";
    OD4P1   : LORAX = "1:FB4->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
    OD1P2   : LORAX = "1:FB1->EC3_A,->EC1_A,->EC5_A,->EC8_A,->EC2_A,->EC7_A,->EC6_A,->EC4_A|";
END;

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