⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 atmega16.lis

📁 ADI公司射频芯片7020+ATMEGA16射频模块源程序
💻 LIS
📖 第 1 页 / 共 3 页
字号:
                        .module ATMEGA16.c
                        .area vector(rom, abs)
                        .org 40
 0028 0C940000          jmp _dd_spi_i2c_isr
                        .org 72
 0048 0C940000          jmp _dd_adf7021_sync_isr
                        .org 44
 002C 0C940000          jmp _UART_RECV_DEAL
                        .org 52
 0034 0C940000          jmp _UART_SEND_DEAL
                        .area text(rom, con, rel)
 0000                   .dbfile D:\icc\examples.avr\230M\ATMEGA16.c
 0000                   .dbfunc e dd_initialise _dd_initialise fV
                        .even
 0000           _dd_initialise::
 0000                   .dbline -1
 0000                   .dbline 61
 0000           ; //#include "api.h"
 0000           ; #include "dd.h"
 0000           ; 
 0000           ; 
 0000           ; void dd_initialise(void);
 0000           ; 
 0000           ; 
 0000           ; SLEEP_FLAG_E sleep_flag;
 0000           ; char dd_user_irq_occurred;
 0000           ; 
 0000           ; unsigned char max_transmit_times;
 0000           ; char need_keep_transmitting;
 0000           ; char is_use_crystal;
 0000           ; char is_ADF7021_AFC_ON;
 0000           ; char is_fine_IF_filter_cal;
 0000           ; char is_internal_PA_ramp_used;
 0000           ; char has_set_tx_mode_before;
 0000           ; char has_set_rx_mode_before;
 0000           ; char dd_has_received_whole_frame;
 0000           ; 
 0000           ; 
 0000           ; 
 0000           ; 
 0000           ; //for data port buffer and variable
 0000           ; unsigned char dd_port_data_tx_buffer[max_port_data_buffer_size];
 0000           ; unsigned char dd_port_data_rx_buffer[max_port_data_buffer_size];
 0000           ; unsigned char dd_port_data_tx_frame_idx;
 0000           ; unsigned char dd_port_data_rx_frame_idx;
 0000           ; unsigned char dd_port_data_rx_payload_length;
 0000           ; unsigned char * p_active_data_tx_buffer;
 0000           ; 
 0000           ; DATA_PORT_STATE_E dd_data_port_state;
 0000           ; PACKET_PHASE_E dd_data_packet_phase;
 0000           ; 
 0000           ; 
 0000           ; unsigned char crc_lo, crc_hi;
 0000           ; PHY_STATE_E phy_state;
 0000           ; 
 0000           ; 
 0000           ; //for uart buffer and variable
 0000           ; unsigned char uart_rx_buffer[max_uart_buffer_size];
 0000           ; unsigned char uart_buffer_tx_idx;
 0000           ; unsigned char uart_buffer_rx_idx;
 0000           ; unsigned char * p_active_uart_buffer;
 0000           ; unsigned char uart_rx_payload_length;
 0000           ; unsigned char uart_tx_payload_length;
 0000           ; 
 0000           ; UART_PORT_STATE_E dd_uart_host_state;
 0000           ; UART_CMD_E dd_uart_command;
 0000           ; 
 0000           ; 
 0000           ; //for mac
 0000           ; struct MAC_PACKET_HEADER_T  mac_tx_packet_header;
 0000           ; struct MAC_PACKET_HEADER_T  mac_rx_packet_header;  
 0000           ; 
 0000           ; unsigned char * p_mac_active_tx_frame;                        
 0000           ; 
 0000           ; //!!!!!!!!!new
 0000           ; 
 0000           ; void dd_initialise()
 0000           ; {
 0000                   .dbline 62
 0000           ; CLI();
 0000 F894              cli
 0002                   .dbline 67
 0002           ; //WDR();
 0002           ; //WDR(); //this prevents a timout on enabling
 0002           ; //WDTCR = 0x0D; //WATCHDOG ENABLED - dont forget to issue WDRs
 0002           ; //WDR();
 0002           ; WDR();
 0002 A895              wdr
 0004                   .dbline 69
 0004           ; /* 置位 WDTOE 和 WDE*/
 0004           ; WDTCR |= (1<<WDTOE) | (1<<WDE);
 0004 81B5              in R24,0x21
 0006 8861              ori R24,24
 0008 81BD              out 0x21,R24
 000A                   .dbline 71
 000A           ; /* 关闭WDT */
 000A           ; WDTCR = 0x00;
 000A 2224              clr R2
 000C 21BC              out 0x21,R2
 000E                   .dbline 73
 000E           ; 
 000E           ; ACSR|=0x80;
 000E 479A              sbi 0x8,7
 0010                   .dbline 74
 0010           ; DDRA =0xfD;
 0010 8DEF              ldi R24,253
 0012 8ABB              out 0x1a,R24
 0014                   .dbline 75
 0014           ; DDRB =0x4b;
 0014 8BE4              ldi R24,75
 0016 87BB              out 0x17,R24
 0018                   .dbline 76
 0018           ; DDRC =0xc3;
 0018 83EC              ldi R24,195
 001A 84BB              out 0x14,R24
 001C                   .dbline 77
 001C           ; DDRD =0xf3;
 001C 83EF              ldi R24,243
 001E 81BB              out 0x11,R24
 0020                   .dbline 78
 0020           ; PORTA |=0xBD;
 0020 8BB3              in R24,0x1b
 0022 8D6B              ori R24,189
 0024 8BBB              out 0x1b,R24
 0026                   .dbline 79
 0026           ; PORTB |=0xff;
 0026 88B3              in R24,0x18
 0028 8F6F              ori R24,255
 002A 88BB              out 0x18,R24
 002C                   .dbline 80
 002C           ; PORTC |=0xc3;
 002C 85B3              in R24,0x15
 002E 836C              ori R24,195
 0030 85BB              out 0x15,R24
 0032                   .dbline 81
 0032           ; PORTD |=0xf3;
 0032 82B3              in R24,0x12
 0034 836F              ori R24,243
 0036 82BB              out 0x12,R24
 0038                   .dbline 82
 0038           ; timer1_init();
 0038 0E940000          xcall _timer1_init
 003C                   .dbline 83
 003C           ; USART_Init();
 003C 0E940000          xcall _USART_Init
 0040                   .dbline 85
 0040           ; //RF_spi_INIT();
 0040           ; GIFR=0;
 0040 2224              clr R2
 0042 2ABE              out 0x3a,R2
 0044                   .dbline 86
 0044           ; MCUCR =0x0a;
 0044 8AE0              ldi R24,10
 0046 85BF              out 0x35,R24
 0048                   .dbline 87
 0048           ; MCUCSR|=0x40;
 0048 84B7              in R24,0x34
 004A 8064              ori R24,64
 004C 84BF              out 0x34,R24
 004E                   .dbline 88
 004E           ; GICR |=0x20;
 004E 8BB7              in R24,0x3b
 0050 8062              ori R24,32
 0052 8BBF              out 0x3b,R24
 0054                   .dbline 89
 0054           ; rf_tx_state[0]=0;
 0054 20920000          sts _rf_tx_state,R2
 0058                   .dbline 90
 0058           ; rf_tx_state[1]=0;
 0058 20920100          sts _rf_tx_state+1,R2
 005C                   .dbline 91
 005C           ; rf_tx_state[2]=0;
 005C 20920200          sts _rf_tx_state+2,R2
 0060                   .dbline 93
 0060           ; 
 0060           ;     max_transmit_times = 0;
 0060 20925001          sts _max_transmit_times,R2
 0064                   .dbline 94
 0064           ;       need_keep_transmitting = FALSE;
 0064 20924F01          sts _need_keep_transmitting,R2
 0068                   .dbline 95
 0068           ;       dd_uart_command = HOST_CMD_IDLE;
 0068 20920D00          sts _dd_uart_command,R2
 006C                   .dbline 97
 006C           ; 
 006C           ;       is_use_crystal = FALSE;
 006C 20924E01          sts _is_use_crystal,R2
 0070                   .dbline 98
 0070           ;       is_ADF7021_AFC_ON = FALSE;
 0070 20924D01          sts _is_ADF7021_AFC_ON,R2
 0074                   .dbline 99
 0074           ;       is_fine_IF_filter_cal = TRUE;
 0074 81E0              ldi R24,1
 0076 80934C01          sts _is_fine_IF_filter_cal,R24
 007A                   .dbline 100
 007A           ;       is_internal_PA_ramp_used = TRUE;
 007A 80934B01          sts _is_internal_PA_ramp_used,R24
 007E                   .dbline 101
 007E           ;       dd_set_ADF7021_Power_off();
 007E 0E940000          xcall _dd_set_ADF7021_Power_off
 0082                   .dbline 103
 0082           ; 
 0082           ;       dd_idle();
 0082 02D0              xcall _dd_idle
 0084                   .dbline 105
 0084           ; 
 0084           ;       SEI();
 0084 7894              sei
 0086                   .dbline -2
 0086                   .dbline 110
 0086           ;       
 0086           ; 
 0086           ; 
 0086           ; 
 0086           ; }
 0086           L7:
 0086                   .dbline 0 ; func end
 0086 0895              ret
 0088                   .dbend
 0088                   .dbfunc e dd_idle _dd_idle fV
                        .even
 0088           _dd_idle::
 0088                   .dbline -1
 0088                   .dbline 115
 0088           ; 
 0088           ; 
 0088           ; 
 0088           ; void dd_idle()
 0088           ; {
 0088                   .dbline 117
 0088           ; 
 0088           ;       GICR &= 0x20;             // Disable INT0 interrupt (Connecting ADF7021 INT/LOCK Pin)
 0088 8BB7              in R24,0x3b
 008A 8072              andi R24,32
 008C 8BBF              out 0x3b,R24
 008E                   .dbline 118
 008E           ;       SPCR &= ~0x80;         // Disable I2C/SPI interrupt     
 008E 6F98              cbi 0xd,7
 0090                   .dbline 122
 0090           ;     //SPI初始化
 0090           ;     //SPICON = 0x0E;          // SPI Slave, CPOL=1, CPHA=1. Leave disabled.
 0090           ;       //SPICON &= ~0x20;
 0090           ;     SPCR=0x0e;
 0090 8EE0              ldi R24,14
 0092 8DB9              out 0xd,R24
 0094                   .dbline 124
 0094           ;       
 0094           ;     sleep_flag = AWAKE;
 0094 81E0              ldi R24,1
 0096 80935201          sts _sleep_flag,R24
 009A                   .dbline 125
 009A           ;     dd_user_irq_occurred = FALSE;
 009A 2224              clr R2
 009C 20925101          sts _dd_user_irq_occurred,R2
 00A0                   .dbline 128
 00A0           ; 

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -