atmega16._c

ADI公司射频芯片7020＋ATMEGA16射频模块源程序

//#include "api.h"
#include "dd.h"


void dd_initialise(void);


SLEEP_FLAG_E sleep_flag;
char dd_user_irq_occurred;

unsigned char max_transmit_times;
char need_keep_transmitting;
char is_use_crystal;
char is_ADF7021_AFC_ON;
char is_fine_IF_filter_cal;
char is_internal_PA_ramp_used;
char has_set_tx_mode_before;
char has_set_rx_mode_before;
char dd_has_received_whole_frame;




//for data port buffer and variable
unsigned char dd_port_data_tx_buffer[max_port_data_buffer_size];
unsigned char dd_port_data_rx_buffer[max_port_data_buffer_size];
unsigned char dd_port_data_tx_frame_idx;
unsigned char dd_port_data_rx_frame_idx;
unsigned char dd_port_data_rx_payload_length;
unsigned char * p_active_data_tx_buffer;

DATA_PORT_STATE_E dd_data_port_state;
PACKET_PHASE_E dd_data_packet_phase;


unsigned char crc_lo, crc_hi;
PHY_STATE_E phy_state;


//for uart buffer and variable
unsigned char uart_rx_buffer[max_uart_buffer_size];
unsigned char uart_buffer_tx_idx;
unsigned char uart_buffer_rx_idx;
unsigned char * p_active_uart_buffer;
unsigned char uart_rx_payload_length;
unsigned char uart_tx_payload_length;

UART_PORT_STATE_E dd_uart_host_state;
UART_CMD_E dd_uart_command;


//for mac
struct MAC_PACKET_HEADER_T  mac_tx_packet_header;
struct MAC_PACKET_HEADER_T  mac_rx_packet_header;  

unsigned char * p_mac_active_tx_frame;			

//!!!!!!!!!new

void dd_initialise()
{
CLI();
//WDR();
//WDR(); //this prevents a timout on enabling
//WDTCR = 0x0D; //WATCHDOG ENABLED - dont forget to issue WDRs
//WDR();
WDR();
/* 置位 WDTOE 和 WDE*/
WDTCR |= (1<<WDTOE) | (1<<WDE);
/* 关闭WDT */
WDTCR = 0x00;

ACSR|=0x80;
DDRA =0xfD;
DDRB =0x4b;
DDRC =0xc3;
DDRD =0xf3;
PORTA |=0xBD;
PORTB |=0xff;
PORTC |=0xc3;
PORTD |=0xf3;
timer1_init();
USART_Init();
//RF_spi_INIT();
GIFR=0;
MCUCR =0x0a;
MCUCSR|=0x40;
GICR |=0x20;
rf_tx_state[0]=0;
rf_tx_state[1]=0;
rf_tx_state[2]=0;

    max_transmit_times = 0;
	need_keep_transmitting = FALSE;
	dd_uart_command = HOST_CMD_IDLE;

	is_use_crystal = FALSE;
	is_ADF7021_AFC_ON = FALSE;
	is_fine_IF_filter_cal = TRUE;
	is_internal_PA_ramp_used = TRUE;
	dd_set_ADF7021_Power_off();

	dd_idle();

	SEI();
	



}



void dd_idle()
{

	GICR &= 0x20;             // Disable INT0 interrupt (Connecting ADF7021 INT/LOCK Pin)
	SPCR &= ~0x80;         // Disable I2C/SPI interrupt	
    //SPI初始化
    //SPICON = 0x0E;          // SPI Slave, CPOL=1, CPHA=1. Leave disabled.
	//SPICON &= ~0x20;
    SPCR=0x0e;
	
    sleep_flag = AWAKE;
    dd_user_irq_occurred = FALSE;

	//Initialise extern variable
    dd_data_port_state = DATA_PORT_IDLE;
    dd_data_packet_phase = PACKET_PHASE_IDLE;
	uart_buffer_tx_idx = 0;
	uart_buffer_rx_idx = 0;
	dd_port_data_rx_payload_length = 0;
	p_active_uart_buffer = 0;
	dd_uart_host_state = UART_PORT_RECEIVING;

	uart_rx_payload_length = UART_PAYLOAD_LENGTH;
}


/*****************************************************************************
 * Function:    dd_short_delay
 * Parameters:  Number of units to wait (1 unit = 256/Fcore = 1/24576)
 * Returns:     Nothing
 * ===========================================================================
 * Description:
 *      Short delay function based on high byte of timer 0
 *      (Timer 0 must be configured as a 16 bit timer clocked at CPU core rate)
 *      Max delay = 10.4ms
 ****************************************************************************/
void dd_short_delay(unsigned char count)
{
    while (count-- >0)
	{
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	
	}		
	
}

void my_delay(long length) 
{
	while (length >=0)		length--;
}


void my_delay_1(unsigned int length) 
{
	 while (length-- >0)
	{
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	_NOP();
	
	}		
}



/*****************************************************************************
    				    	Data Functions
 ****************************************************************************/


void dd_data_port_rx_handler(void)		
{
	dd_port_data_tx_frame_idx = 0;
	dd_port_data_rx_payload_length = 0;
	dd_data_port_state = DATA_PORT_IDLE;
    dd_data_packet_phase = PACKET_PHASE_IDLE;
	dd_has_received_whole_frame = FALSE;

	//if crc_lo and crc_hi are now both zero, it manifests that data has been received correctly
	#if 0
	my_delay(100);
	SBUF = crc_lo;
	my_delay(100);
	SBUF = crc_hi;
	#endif
}



/*****************************************************************************
    				    	Uart Functions
 ****************************************************************************/
void dd_uart_port_tx(unsigned char * p_buffer, unsigned char tx_number)
{

	dd_uart_host_state = UART_PORT_TRANSMITTING;

	uart_tx_payload_length = tx_number;
	uart_buffer_tx_idx = 0;
	p_active_uart_buffer = p_buffer;
	UDR = p_active_uart_buffer[uart_buffer_tx_idx++];

    SEI();

}

/*****************************************************************************
  						   uart_rx_data_handler
/****************************************************************************/
#if 0
void uart_rx_data_handler()
{

	uart_rx_buffer[uart_rx_payload_length+2] = 0xFA;

    switch (dd_uart_command )
    {
        case HOST_CMD_IDLE:
			dd_idle();
   	    break;

        case HOST_CMD_TX_FRAME:
			dd_idle();
       		transmit_constant_frame();
   	    break;

        case HOST_CMD_TX_FRAME_FOREVER_STRART:
			need_keep_transmitting = TRUE;
       		max_transmit_times = 0;
   	    break;

        case HOST_CMD_TX_FRAME_FOREVER_STOP:
			need_keep_transmitting = FALSE;
       		max_transmit_times = 0;
   	    break;

        case HOST_CMD_TX_FRAME_MAX_TIMES:
			need_keep_transmitting = FALSE;
       		max_transmit_times = uart_rx_buffer[2];
   	    break;

        case HOST_CMD_RX_FRAME:
			dd_idle();
			receive_constant_frame();
        break;

        case HOST_CMD_POWERON:
			dd_set_ADF7021_Power_on();
		break;

        case HOST_CMD_POWERDOWN:
			dd_set_ADF7021_Power_off();
        break;

        case HOST_CMD_TX_MODE:
			dd_set_ADF7021_Power_on();
			dd_set_TX_mode();
        break;

        case HOST_CMD_RX_MODE:
			dd_set_ADF7021_Power_on();
			if (has_set_rx_mode_before == 1 & phy_state == PHY_IN_TX_MODE)	dd_set_TX_to_RX_mode();
		    else dd_set_RX_mode();
        break;


        case HOST_CMD_READ_AFC:
			dd_idle();
			dd_set_ADF7021_Power_on();
			if (has_set_rx_mode_before == 1 & phy_state == PHY_IN_TX_MODE)	dd_set_TX_to_RX_mode();
		    else dd_set_RX_mode();
   			dd_read_AFC();
         break;

		case HOST_CMD_READ_RSSI:
			dd_idle();
 			dd_set_ADF7021_Power_on();
			if (has_set_rx_mode_before == 1 & phy_state == PHY_IN_TX_MODE)	dd_set_TX_to_RX_mode();
		    else dd_set_RX_mode();
  			dd_read_RSSI();
	        break;

        case HOST_CMD_READ_BATT:
			dd_idle();
  			dd_set_ADF7021_Power_on();
  			dd_ADC_readback(0x15);
	    break;

		case HOST_CMD_READ_TEMP:
			dd_idle();
  			dd_set_ADF7021_Power_on();
  			dd_ADC_readback(0x16);
		break;

        case HOST_CMD_READ_EXT_ADC:
			dd_idle();
 			dd_set_ADF7021_Power_on();
   			dd_ADC_readback(0x17);
        break;

        case HOST_CMD_READ_FILTER:
			dd_idle();
			dd_set_ADF7021_Power_on();
			if (has_set_rx_mode_before == 1 & phy_state == PHY_IN_TX_MODE)	dd_set_TX_to_RX_mode();
		    else dd_set_RX_mode();
   			dd_read_filter_cal();
        break;

        case HOST_CMD_READ_VERSION:
			dd_idle();
  			dd_read_ADF70XX_version();
		break;

	
		case HOST_CMD_LOOPBACK:
			SBUF = HOST_CMD_LOOPBACK;
			dd_uart_host_state = UART_PORT_RECEIVING;
		break;
			
		default:		
		break;
	}// switch

	dd_uart_command = HOST_CMD_IDLE;
}
#endif


/* EOF */