📄 230m.lst
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(0037) dd_port_data_tx_frame_idx++;
052E 9180014A LDS R24,_dd_port_data_tx_frame_idx
0530 5F8F SUBI R24,0xFF
0531 9380014A STS _dd_port_data_tx_frame_idx,R24
(0038)
(0039) }
0533 C029 RJMP 0x055D
(0040) else{
(0041)
(0042) if(dd_port_data_tx_frame_idx==dd_port_data_tx_buffer[8]+9){
0534 918001B7 LDS R24,0x1B7
0536 5F87 SUBI R24,0xF7
0537 9020014A LDS R2,_dd_port_data_tx_frame_idx
0539 1628 CP R2,R24
053A F449 BNE 0x0544
(0043)
(0044) SPDR = crc_lo;
053B 902000CC LDS R2,_crc_lo
053D B82F OUT 0x0F,R2
(0045) dd_port_data_tx_frame_idx++;
053E 9180014A LDS R24,_dd_port_data_tx_frame_idx
0540 5F8F SUBI R24,0xFF
0541 9380014A STS _dd_port_data_tx_frame_idx,R24
(0046)
(0047) }else if(dd_port_data_tx_frame_idx==dd_port_data_tx_buffer[8]+10){
0543 C019 RJMP 0x055D
0544 918001B7 LDS R24,0x1B7
0546 5F86 SUBI R24,0xF6
0547 9020014A LDS R2,_dd_port_data_tx_frame_idx
0549 1628 CP R2,R24
054A F449 BNE 0x0554
(0048)
(0049) SPDR = crc_hi;
054B 902000CB LDS R2,_crc_hi
054D B82F OUT 0x0F,R2
(0050) dd_port_data_tx_frame_idx++;
054E 9180014A LDS R24,_dd_port_data_tx_frame_idx
0550 5F8F SUBI R24,0xFF
0551 9380014A STS _dd_port_data_tx_frame_idx,R24
(0051)
(0052) }else{
0553 C009 RJMP 0x055D
(0053) dd_port_data_tx_frame_idx = 0;
0554 2422 CLR R2
0555 9220014A STS _dd_port_data_tx_frame_idx,R2
(0054) rf_tx_state[2]=1;
0557 E081 LDI R24,1
0558 938000CA STS _rf_tx_state+2,R24
(0055) SPCR &= 0x3f;
055A B18D IN R24,0x0D
055B 738F ANDI R24,0x3F
055C B98D OUT 0x0D,R24
(0056) //IEIP2 &= ~0x01;
(0057) //SPICON &= ~0x20;
(0058)
(0059) }
(0060)
(0061) }
(0062)
(0063)
(0064) }
(0065)
(0066)
(0067)
(0068)
(0069)
(0070)
(0071)
(0072) if (dd_data_port_state == DATA_PORT_RECEIVING)
055D 91800145 LDS R24,_dd_data_port_state
055F 3083 CPI R24,3
0560 F009 BEQ 0x0562
0561 C068 RJMP 0x05CA
(0073) {
(0074) temp = SPDR;
0562 B14F IN R20,0x0F
(0075) //SPDR = 0xFF;
(0076)
(0077) if(dd_port_data_rx_frame_idx==0){
0563 90200149 LDS R2,_dd_port_data_rx_frame_idx
0565 2022 TST R2
0566 F459 BNE 0x0572
(0078)
(0079) crc16(temp);
0567 2F04 MOV R16,R20
0568 940E026B CALL _crc16
(0080) dd_port_data_rx_frame_idx++;
056A 91800149 LDS R24,_dd_port_data_rx_frame_idx
056C 5F8F SUBI R24,0xFF
056D 93800149 STS _dd_port_data_rx_frame_idx,R24
(0081) dd_port_data_rx_payload_length=temp;
056F 93400148 STS _dd_port_data_rx_payload_length,R20
(0082)
(0083) }
0571 C058 RJMP 0x05CA
(0084) //else if(dd_port_data_rx_frame_idx<(dd_port_data_rx_payload_length+1)){
(0085) else if(dd_port_data_rx_frame_idx<6){
0572 91800149 LDS R24,_dd_port_data_rx_frame_idx
0574 3086 CPI R24,6
0575 F488 BCC 0x0587
(0086)
(0087) dd_port_data_rx_buffer[dd_port_data_rx_frame_idx-1]=temp;
0576 E48A LDI R24,0x4A
0577 E091 LDI R25,1
0578 91E00149 LDS R30,_dd_port_data_rx_frame_idx
057A 27FF CLR R31
057B 0FE8 ADD R30,R24
057C 1FF9 ADC R31,R25
057D 8340 STD Z+0,R20
(0088) crc16(temp);
057E 2F04 MOV R16,R20
057F 940E026B CALL _crc16
(0089) dd_port_data_rx_frame_idx++;
0581 91800149 LDS R24,_dd_port_data_rx_frame_idx
0583 5F8F SUBI R24,0xFF
0584 93800149 STS _dd_port_data_rx_frame_idx,R24
(0090) }else {
0586 C043 RJMP 0x05CA
(0091) if(dd_port_data_rx_frame_idx==(dd_port_data_rx_payload_length+1)){
0587 91800148 LDS R24,_dd_port_data_rx_payload_length
0589 5F8F SUBI R24,0xFF
058A 90200149 LDS R2,_dd_port_data_rx_frame_idx
058C 1628 CP R2,R24
058D F461 BNE 0x059A
(0092)
(0093) dd_port_data_rx_buffer[dd_port_data_rx_frame_idx-1]=temp;
058E E48A LDI R24,0x4A
058F E091 LDI R25,1
0590 2DE2 MOV R30,R2
0591 27FF CLR R31
0592 0FE8 ADD R30,R24
0593 1FF9 ADC R31,R25
0594 8340 STD Z+0,R20
(0094) dd_port_data_rx_frame_idx++;
0595 2D82 MOV R24,R2
0596 5F8F SUBI R24,0xFF
0597 93800149 STS _dd_port_data_rx_frame_idx,R24
(0095)
(0096) }
0599 C030 RJMP 0x05CA
(0097) else{
(0098) if((temp==crc_hi)&&(dd_port_data_rx_buffer[dd_port_data_rx_frame_idx-1]==crc_lo)){
059A 902000CB LDS R2,_crc_hi
059C 1542 CP R20,R2
059D F561 BNE 0x05CA
059E E48A LDI R24,0x4A
059F E091 LDI R25,1
05A0 91E00149 LDS R30,_dd_port_data_rx_frame_idx
05A2 27FF CLR R31
05A3 0FE8 ADD R30,R24
05A4 1FF9 ADC R31,R25
05A5 8020 LDD R2,Z+0
05A6 903000CC LDS R3,_crc_lo
05A8 1423 CP R2,R3
05A9 F501 BNE 0x05CA
(0099)
(0100) SPCR &= 0x3f; // Disable SPI,Disable I2C/SPI interrupt
05AA B18D IN R24,0x0D
05AB 738F ANDI R24,0x3F
05AC B98D OUT 0x0D,R24
(0101) //dd_has_received_whole_frame = TRUE;
(0102) uart_tx_payload_length=dd_port_data_rx_payload_length;
05AD 90200148 LDS R2,_dd_port_data_rx_payload_length
05AF 922000DA STS _uart_tx_payload_length,R2
(0103) memcpy(uart_tx_buffer,&dd_port_data_rx_buffer[0], uart_tx_payload_length);
05B1 2433 CLR R3
05B2 8239 STD Y+1,R3
05B3 8228 STD Y+0,R2
05B4 E42B LDI R18,0x4B
05B5 E031 LDI R19,1
05B6 E603 LDI R16,0x63
05B7 E010 LDI R17,0
05B8 940E0743 CALL _memcpy
(0104) uart_buffer_tx_idx=0;
05BA 2422 CLR R2
05BB 922000DF STS _uart_buffer_tx_idx,R2
(0105) UDR = uart_tx_buffer[uart_buffer_tx_idx++];
05BD 2433 CLR R3
05BE 2D82 MOV R24,R2
05BF 5F8F SUBI R24,0xFF
05C0 938000DF STS _uart_buffer_tx_idx,R24
05C2 E683 LDI R24,0x63
05C3 E090 LDI R25,0
05C4 2DE2 MOV R30,R2
05C5 27FF CLR R31
05C6 0FE8 ADD R30,R24
05C7 1FF9 ADC R31,R25
05C8 8020 LDD R2,Z+0
05C9 B82C OUT 0x0C,R2
(0106) }
(0107)
(0108)
(0109)
(0110)
(0111) }
(0112)
(0113) }
(0114)
(0115) }
(0116)
(0117) }
05CA 9622 ADIW R28,2
05CB 940E079C CALL pop_gset1
05CD 940E07D7 CALL pop_lset
05CF 9518 RETI
_dd_adf7021_sync_isr:
byte --> Y+1
j --> Y+1
i --> Y+1
05D0 940E07C0 CALL push_lset
(0118)
(0119)
(0120) /*****************************************************************************
(0121) * Function: dd_adf7021_sync_isr
(0122) ****************************************************************************/
(0123) void dd_adf7021_sync_isr(void) // 8051 vector 0x0003
(0124) {
(0125)
(0126) unsigned char i,j,byte;
(0127) CLI(); // Not needed if we're in an interrupt thread
05D2 94F8 BCLR 7
(0128)
(0129)
(0130) crc16_reset();
05D3 940E0265 CALL _crc16_reset
(0131)
(0132) SPCR |= 0x40; // Enable SPI port now for correct byte sync
05D5 9A6E SBI 0x0D,6
(0133)
(0134) crc16_reset();
05D6 940E0265 CALL _crc16_reset
(0135)
(0136) while((PINB&0x80)==0x80)
05D8 B226 IN R2,0x16
05D9 2433 CLR R3
05DA FC27 SBRC R2,7
05DB CFFC RJMP 0x05D8
(0137) {
(0138) }
(0139) while ((PINB&0x80)!=0x80)
05DC B386 IN R24,0x16
05DD 7880 ANDI R24,0x80
05DE 3880 CPI R24,0x80
05DF F7E1 BNE 0x05DC
(0140) {
(0141) }
(0142)
(0143) SPCR |= 0x80; // Enable I2C/SPI interrupt
05E0 9A6F SBI 0x0D,7
(0144)
(0145) //SPDR = 0xFF;
(0146) SPSR &= ~0x80; //to avoid the first byte 0x00;
05E1 9877 CBI 0x0E,7
(0147)
(0148) dd_data_port_state = DATA_PORT_RECEIVING;
05E2 E083 LDI R24,3
05E3 93800145 STS _dd_data_port_state,R24
(0149) dd_data_packet_phase = PACKET_PHASE_HEADER;
05E5 E084 LDI R24,4
05E6 93800144 STS _dd_data_packet_phase,R24
(0150) dd_port_data_rx_frame_idx=0;
05E8 2422 CLR R2
05E9 92200149 STS _dd_port_data_rx_frame_idx,R2
(0151)
(0152) //P3 ^= 0x10;
(0153) }
05EB 940E07D7 CALL pop_lset
05ED 9518 RETI
_UART_RECV_DEAL:
temp --> R16
05EE 922A ST R2,-Y
05EF 930A ST R16,-Y
05F0 938A ST R24,-Y
05F1 939A ST R25,-Y
05F2 93EA ST R30,-Y
05F3 93FA ST R31,-Y
05F4 B62F IN R2,0x3F
05F5 922A ST R2,-Y
(0154)
(0155)
(0156)
(0157)
(0158)
(0159)
(0160)
(0161)
(0162)
(0163)
(0164)
(0165)
(0166)
(0167)
(0168)
(0169)
(0170)
(0171) void UART_RECV_DEAL (void)
(0172)
(0173) {
(0174) unsigned char temp;
(0175) temp=UDR;
05F6 B10C IN R16,0x0C
(0176) uart_rx_buffer[uart_buffer_rx_idx]=temp;
05F7 EE80 LDI R24,0xE0
05F8 E090 LDI R25,0
05F9 91E000DE LDS R30,_uart_buffer_rx_idx
05FB 27FF CLR R31
05FC 0FE8 ADD R30,R24
05FD 1FF9 ADC R31,R25
05FE 8300 STD Z+0,R16
(0177)
(0178)
(0179) if(uart_buffer_rx_idx>=max_uart_buffer_size){
05FF 918000DE LDS R24,_uart_buffer_rx_idx
0601 3684 CPI R24,0x64
0602 F018 BCS 0x0606
(0180)
(0181) uart_buffer_rx_idx=0;
0603 2422 CLR R2
0604 922000DE STS _uart_buffer_rx_idx,R2
(0182)
(0183) }
(0184)
(0185) time_count=0;
0606 2422 CLR R2
0607 922000C7 STS _time_count,R2
(0186)
(0187) }
0609 9029 LD R2,Y+
060A BE2F OUT 0x3F,R2
060B 91F9 LD R31,Y+
060C 91E9 LD R30,Y+
060D 9199 LD R25,Y+
060E 9189 LD R24,Y+
060F 9109 LD R16,Y+
0610 9029 LD R2,Y+
0611 9518 RETI
_UART_SEND_DEAL:
0612 922A ST R2,-Y
0613 923A ST R3,-Y
0614 938A ST R24,-Y
0615 939A ST R25,-Y
0616 93EA ST R30,-Y
0617 93FA ST R31,-Y
0618 B62F IN R2,0x3F
0619 922A ST R2,-Y
(0188)
(0189) void UART_SEND_DEAL (void)
(0190)
(0191) {
(0192) if (uart_buffer_tx_idx < uart_tx_payload_length)
061A 902000DA LDS R2,_uart_tx_payload_length
061C 903000DF LDS R3,_uart_buffer_tx_idx
061E 1432 CP R3,R2
061F F470 BCC 0x062E
(0193) {
(0194) UDR = uart_tx_buffer[uart_buffer_tx_idx++];
0620 2C23 MOV R2,R3
0621 2433 CLR R3
0622 2D82 MOV R24,R2
0623 5F8F SUBI R24,0xFF
0624 938000DF STS _uart_buffer_tx_idx,R24
0626 E683 LDI R24,0x63
0627 E090 LDI R25,0
0628 2DE2 MOV R30,R2
0629 27FF CLR R31
062A 0FE8 ADD R30,R24
062B 1FF9 ADC R31,R25
062C 8020 LDD R2,Z+0
062D B82C OUT 0x0C,R2
(0195) }
(0196)
(0197) }
062E 9029 LD R2,Y+
062F BE2F OUT 0x3F,R2
0630 91F9 LD R31,Y+
0631 91E9 LD R30,Y+
0632 9199 LD R25,Y+
0633 9189 LD R24,Y+
0634 9039 LD R3,Y+
0635 9029 LD R2,Y+
0636 9518 RETI
(0198)
(0199)
(0200)
(0201)
(0202)
(0203)
(0204)
(0205)
(0206)
(0207)
(0208)
(0209)
(0210)
(0211)
(0212)
(0213)
(0214)
(0215)
(0216)
(0217) void USART_Init(void)
(0218) {
(0219) /* 设置波特率*/
(0220) //CLI();
(0221) U⌨️ 快捷键说明
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