📄 cc2500sample.c
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void halSpiWriteBurstReg(BYTE addr, BYTE *buffer, BYTE count);
void halSpiReadBurstReg(BYTE addr, BYTE *buffer, BYTE count);
void halSpiWriteReg(BYTE addr, BYTE value);
void halSpiStrobe(BYTE strobe);
BYTE halSpiReadReg(BYTE addr);
BYTE halSpiReadStatus(BYTE addr);
void halRfWriteRfSettings(void);
void halRfSendPacket(BYTE *txBuffer, UINT8 size);
BYTE halRfReceivePacket(BYTE *rxBuffer, UINT8 *length);
#define WRITE_BURST 0x40
#define READ_SINGLE 0x80
#define READ_BURST 0xC0
//=============================================================================
unsigned char SPI_Byte(unsigned char di) {
TXBUF0=di;
while(!TXEPT);
Dly1mS(1);
return (RXBUF0);
}
//=============================================================================
unsigned char halSpiReadReg(unsigned char addr) {
unsigned char d;
P3OUT &= ~CSn;
addr|=READ_SINGLE;
SPI_Byte(addr);
d=SPI_Byte(0x00);
P3OUT |= CSn;
return d;
}
//==============================================================================
unsigned char halSpiReadStatus(unsigned char addr)
{
unsigned char d;
P3OUT &= ~CSn;
addr|=READ_BURST;
SPI_Byte(addr);
d=SPI_Byte(0x00);
P3OUT |= CSn;
return d;
}
//==============================================================================
void halSpiWriteReg(unsigned char addr, unsigned char value)
{
P3OUT &= ~CSn;
addr&=0x7F;
SPI_Byte(addr);
SPI_Byte(value);
P3OUT |= CSn;
}
//==============================================================================
void halSpiReadBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count)
{
unsigned char j;
P3OUT &= ~CSn;
addr|=READ_BURST;
SPI_Byte(addr);
for(j=0;j<count;j++)
{
buffer[j]=SPI_Byte(0x00);
}
P3OUT |= CSn;
}
//==============================================================================
void POWER_UP_RESET_CC2500() {
unsigned char i;
//SSPSTAT=0xC0;
//SSPCON=0x20;
P3OUT |= CSn;
for(i=0;i<5;i++); // In 8MHz 6uS
P3OUT &= ~CSn;
for(i=0;i<5;i++); // In 8MHz 6uS
P3OUT |= CSn;
for(i=0;i<40;i++); // In 8MHz 60uS , need 40uS(Min)
P3OUT &= ~CSn;
SPI_Byte(CC2500_SRES);
while(P3IN&SO);
P3OUT |= CSn;
}
//==============================================================================
void halSpiWriteBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count)
{
unsigned char j;
P3OUT &= ~CSn;
addr|=WRITE_BURST;
SPI_Byte(addr);
for(j=0;j<count;j++) {
SPI_Byte(buffer[j]);
}
P3OUT |= CSn;
}
//==============================================================================
void halSpiStrobe(unsigned char strobe) {
P3OUT &= ~CSn;
SPI_Byte(strobe);
P3OUT |= CSn;
}
// mode = 0x80 is 433.92Mhz
// mode = 0x00 is 430.00Mhz
//==============================================================================
void InitCC2500(void)
{
POWER_UP_RESET_CC2500();
halRfWriteRfSettings();
halSpiWriteBurstReg(CC2500_PATABLE,paTable,sizeof(paTable));
}
//==============================================================================
void halRfWriteRfSettings(void)//for 250k
{
halSpiWriteReg(CC2500_FSCTRL1, 0x09);
halSpiWriteReg(CC2500_FSCTRL0, 0x00);
halSpiWriteReg(CC2500_FREQ2, 0x5D);
halSpiWriteReg(CC2500_FREQ1, 0x93);
halSpiWriteReg(CC2500_FREQ0, 0xB1);
halSpiWriteReg(CC2500_MDMCFG4, 0x2D);
halSpiWriteReg(CC2500_MDMCFG3, 0x3B);
halSpiWriteReg(CC2500_MDMCFG2, 0x73);//mach
halSpiWriteReg(CC2500_MDMCFG1, 0x22);// FEC
halSpiWriteReg(CC2500_MDMCFG0, 0xF8);
halSpiWriteReg(CC2500_CHANNR, 0x00); //CHANNEL=0X10//30
halSpiWriteReg(CC2500_DEVIATN, 0x01);
halSpiWriteReg(CC2500_FREND1, 0xB6);
halSpiWriteReg(CC2500_FREND0, 0x10);
//halSpiWriteReg(CC2500_MCSM1, 0x30);//0X00>NO CCA; 0X30>CCA
halSpiWriteReg(CC2500_MCSM0, 0x18);
halSpiWriteReg(CC2500_FOCCFG, 0x1D);
halSpiWriteReg(CC2500_BSCFG, 0x1C);
halSpiWriteReg(CC2500_AGCCTRL2, 0xC7);
halSpiWriteReg(CC2500_AGCCTRL1, 0x00);//cca=0x10
halSpiWriteReg(CC2500_AGCCTRL0, 0xB2);
halSpiWriteReg(CC2500_FSCAL3, 0xEA);
halSpiWriteReg(CC2500_FSCAL2, 0x0A);
halSpiWriteReg(CC2500_FSCAL1, 0x00);
halSpiWriteReg(CC2500_FSCAL0, 0x11);
halSpiWriteReg(CC2500_FSTEST, 0x59);
halSpiWriteReg(CC2500_TEST2, 0x88);
halSpiWriteReg(CC2500_TEST1, 0x31);
halSpiWriteReg(CC2500_TEST0, 0x0B);
halSpiWriteReg(CC2500_IOCFG2, 0x29);//CCA=0x09:1=free
halSpiWriteReg(CC2500_IOCFG0, 0x06);
halSpiWriteReg(CC2500_PKTCTRL1, 0x04);//CRC FLUSH,ADRESS CHECK
halSpiWriteReg(CC2500_PKTCTRL0, 0x05);
halSpiWriteReg(CC2500_ADDR, 0x00); //ADDRESS=01 FOR RECEIVE
halSpiWriteReg(CC2500_PKTLEN, 0xFF);
}// halRfWriteRfSettings
//==============================================================================
void halRfSendPacket(BYTE *txBuffer, UINT8 size) {
halSpiWriteBurstReg(CC2500_TXFIFO, txBuffer, size);
halSpiStrobe(CC2500_STX);
// Wait for GDO0 to be set -> sync transmitted
TAR=0; CCR0=100; TACCTL0 &= ~CCIFG; //count time size 384us
while (!(P2IN&GDO0)) if(TACCTL0&CCIFG) break;
//TAR=0; TACTL &= ~TAIFG;
// while (!(P2IN&GDO0)) if(TACTL&TAIFG) break;
// Wait for GDO0 to be cleared -> end of packet
TAR=0; CCR0=100; TACCTL0 &= ~CCIFG;
while (P2IN&GDO0) if(TACCTL0&CCIFG) break;
halSpiStrobe(CC2500_SFTX);
}// halRfSendPacket
//==============================================================================
BYTE halRfReceivePacket(BYTE *rxBuffer, BYTE *length)
{
BYTE status;
BYTE packetLength;
halSpiStrobe(CC2500_SRX);
Dly1mS(2);
// Wait for GDO0 to be set -> sync received
//TAR=0; TACCTL0 &= ~CCIFG;//CCR0=5000; //count time size 384us
while (!(P2IN&GDO0));// if(TACCTL0&CCIFG) break;
// Wait for GDO2 to be cleared -> end of packet
//TAR=0; TACCTL0 &= ~CCIFG;//CCR0=5000;
while (P2IN&GDO0);// if(TACCTL0&CCIFG) break;//CCR0=1920;
status = halSpiReadStatus(CC2500_PKTSTATUS);
// Read pdata from RX FIFO and store them in rxBuffer
packetLength = halSpiReadReg(CC2500_RXFIFO);
if (!(status & CRC_OK))
{
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 0;
}
if (packetLength == *length)
{
halSpiReadBurstReg(CC2500_RXFIFO, rxBuffer, packetLength);
*length = packetLength;
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 1;
}
else
{
*length = packetLength;
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 0;
}
} // halRfReceivePacket
/*
unsigned char halRfReceivePacket(unsigned char *rxBuffer, unsigned char *length)
{
unsigned char status;
unsigned char packetLength;
unsigned char Pktaddr;//// address for RCVd packet !!
///////////////////// if WOR mode, don't strobe SRX !!
if(!CC2500_Flags.WORRX)
{
halSpiWriteReg(CC2500_MCSM2,0x07);////RX time out untill packet over
halSpiStrobe(CC2500_SRX);
}
else
halSpiWriteReg(CC2500_MCSM2,rfSettings.MCSM2);////RX time out when WOR
///////////////////////////////
///////////////////////////////
cnt_RXtimeout=0;
CC2500_Flags.MYPKT_RCVD=0;
while(BitTst0(P6IN,GDO0))
{
if(cnt_RXtimeout>frq_RXtimeout) break;
}
while(BitTst1(P6IN,GDO0))
{
if(cnt_RXtimeout>frq_RXtimeout) break;
}
if(cnt_RXtimeout>frq_RXtimeout)
{
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 0;
}
//////////////////////////////
status = halSpiReadStatus(CC2500_PKTSTATUS);
// read my rssi and lqi
Rssi = halSpiReadStatus(CC2500_RSSI);
Lqi = halSpiReadStatus(CC2500_LQI);
// Rssi=RSSI_2_ED(Rssi);
// Lqi=ED_2_LQI(Lqi);
// Read pdata from RX FIFO and store them in rxBuffer
if(!(status & CRC_OK))
{
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 0;
}
///////////////////////// for fix length
if(CC2500_Flags.FIXL)
{
Pktaddr = halSpiReadReg(CC2500_RXFIFO);
/////////////////// receive packet
halSpiReadBurstReg(CC2500_RXFIFO, rxBuffer,rfSettings.PKTLEN-1);
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 1;
}
////////////////////// for free length
packetLength = halSpiReadReg(CC2500_RXFIFO);
if (packetLength == *length)
{
halSpiReadBurstReg(CC2500_RXFIFO, rxBuffer, packetLength);
*length = packetLength;
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 1;
}
else
{
*length = packetLength;
halSpiStrobe(CC2500_SFRX);//// Flush RX FIFO
return 0;
}
}*/
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