msp430.c

CHIPCON公司射频芯片CC1100驱动程序

//DCO=1MHZ
void InitMSP430F1232()
void Dly1mS(unsigned short cnt) {
	unsigned char i;
	while(cnt--) {
		for(i=0;i<200;i++);//120 =1ms 
	}
}
void InitMSP430F1232()
{
//  unsigned char i;
  WDTCTL = WDTPW + WDTHOLD;
   
  P1SEL = 0x0000;                            // Setup P1.0 for LED_RUN output
  P1DIR = 0x0000;                         //Set p1.2 p1.4 input
  P1DIR = 0x00f5;
  //P1OUT =  0x0000;                            
   
  P2SEL = 0x0000;                             //   set GDO0 GDO2 input            
  P2DIR = 0xdf; //GDO0;//
  P2OUT |= SDA;
  P2OUT |= SCL;
  
  //for hardware
  P3SEL = 0x0000;
  P3SEL = SO + SI + SCLK;                         // Setup P3.2 SO input for SPI mode
  P3DIR =0x0000;
  P3DIR =0xfb;
  //P3DIR = NOUSE + CSn + SI + SCLK + VALVE_A + VALVE_B+VOICE_A;  // Setup P3.0,1,3 for cs,si,clk output
  P3OUT = CSn;                           // SET CSn
  
 
  DCOCTL|=DCO0+DCO1+DCO2;
  BCSCTL1=XT2OFF+RSEL0+RSEL2+RSEL1; 
  TACTL = TASSEL_2 + MC_2  + ID_0;          // SMCLK, contiue mode, interrupt enabled CLK/8
 //spi setting
  U0CTL = CHAR + SYNC + MM + SWRST;         // 8-bit, SPI, Master
  U0TCTL =  CKPH +SSEL1 +STC;            // stop is high  Polarity, SMCLK, 3-wire
              
  U0BR0 = 0x002;                            // SPICLK = SMCLK/2
  U0BR1 = 0x000;
  U0MCTL = 0x000;
  ME2 = USPIE0;                             // Module enable
  U0CTL &= ~SWRST;                          // SPI enable
  //U0RCTL |= URXIE0;                            // Recieve interrupt enable  
 // _EINT();
  
  
 }

unsigned char EvenCnt(unsigned char da) {
	unsigned char i;
	unsigned char tmp=0;	
	for(i=0;i<8;i++) {
		if(da&0x80) tmp++;
		da<<=1;
	}
	return (tmp%2);
}


void MCLK_HF(void){

  unsigned int i;
  _BIC_SR(OSCOFF);
  BCSCTL1 |= XTS;                           // ACLK = LFXT1 = HF XTAL
  do
  {
  IFG1 &= ~OFIFG;                           // Clear OSCFault flag
  for (i = 0xFF; i > 0; i--);               // Time for flag to set
  }
  while ((IFG1 & OFIFG));                   // OSCFault flag still set?

  BCSCTL2 |= SELM_3+SELS;                        // MCLK = LFXT1 (safe)
 _BIC_SR(SCG0);
  
}