com_inti.c

数字信号处理中的多缓冲口的AD转换编程程序,希望对大家有用

/******************************************************************************/
/*  Copyright 2004 by SEED Electronic Technology LTD.                         */
/*  All rights reserved. SEED Electronic Technology LTD.                      */
/*  Restricted rights to use, duplicate or disclose this code are             */
/*  granted through contract.                                                 */
/*                                                                            */
/*  MODULE NAME... Mcbsp											          */
/*  FILENAME...... comunication.c   										  */
/*  DESCRIPTION:  															  */
/*  This is an fuction which is just for comunication                             */	
/*                                                                            */
/*  作者:黄林生                                                               */
/*  版本:1.0                                                                  */
/*  日期:06.10.24                                                             */
/******************************************************************************/
#include <stdio.h>
#include <csl.h>
#include <csl_irq.h>
#include <csl_mcbsp.h>
#include "mcbsp.h"
#include "DEC5502_MCBSP_inti.h"
#include "DEC5502_MCBSP_work.h"

#define  SYSCNTL0 	(*(volatile unsigned int *)(0x280000))
int datarevlength=0;                // 数据接收个数
uint new_flag=0;                    // 允许接受新帧
int Counter=0;
int timeout=0x8000;
Uint16 EventId0;

MCBSP_Handle hMcbsp;
/**************************************************************/
MCBSP_Config Mcbsp2Config = {
  MCBSP_SPCR1_RMK(    
    MCBSP_SPCR1_DLB_OFF,  	        // DLB=0 
    MCBSP_SPCR1_RJUST_RZF,
    MCBSP_SPCR1_CLKSTP_DISABLE,     // CLKSTP=0 
    MCBSP_SPCR1_DXENA_ON,           // DXENA=1,DX delay enabler on 
    0,             		            // Reserved=0 
    MCBSP_SPCR1_RINTM_RRDY,         // RINTM=0 
    MCBSP_SPCR1_RSYNCERR_NO,        // RSYNCER=0 
    MCBSP_SPCR1_RFULL_NO,           // RFULL=0  
    MCBSP_SPCR1_RRDY_NO,            // RRDY=0  
    MCBSP_SPCR1_RRST_DISABLE
  ),
  
  MCBSP_SPCR2_RMK(  
    MCBSP_SPCR2_FREE_YES,           // FREE=1  
    MCBSP_SPCR2_SOFT_YES,           // SOFT=1
    MCBSP_SPCR2_FRST_RESET,         // FRST=0 
    MCBSP_SPCR2_GRST_RESET,         // GRST=0
    MCBSP_SPCR2_XINTM_XRDY,         // XINTM=0 
    MCBSP_SPCR2_XSYNCERR_NO,        // XSYNCER=0 
    MCBSP_SPCR2_XEMPTY_NO,          // XEMPTY=0 
    MCBSP_SPCR2_XRDY_NO,            // XRDY=0             
    MCBSP_SPCR2_XRST_DISABLE 	    // XRST=0 Disable transimitter 
  ),
   
  MCBSP_RCR1_RMK( 
  	//MCBSP_RCR1_RFRLEN1_OF(127),
  	MCBSP_RCR1_RFRLEN1_OF(0),
  	MCBSP_RCR1_RWDLEN1_16BIT        // RWDLEN1=2 
  ),
  
  MCBSP_RCR2_RMK(    
    MCBSP_RCR2_RPHASE_SINGLE,       // RPHASE=0 
    MCBSP_RCR2_RFRLEN2_OF(0),       // RFRLEN2=0 
    MCBSP_RCR2_RWDLEN2_8BIT,        // RWDLEN2=0 
    MCBSP_RCR2_RCOMPAND_MSB,        // RCOMPAND=0 No companding,any size data, MSB received first
    MCBSP_RCR2_RFIG_NO,             // RFIG=1 Frame-sync ignore
    MCBSP_RCR2_RDATDLY_1BIT  	    // RDATDLY=1 1-bit data delay 
  ),  
 
  MCBSP_XCR1_RMK(    
    //MCBSP_XCR1_XFRLEN1_OF(127),
    MCBSP_XCR1_XFRLEN1_OF(0),
    MCBSP_XCR1_XWDLEN1_16BIT        // XWDLEN1=2   
  ),   
  
  MCBSP_XCR2_RMK(   
    MCBSP_XCR2_XPHASE_SINGLE,       // XPHASE=0 
    MCBSP_XCR2_XFRLEN2_OF(0),
    MCBSP_XCR2_XWDLEN2_8BIT,        // XWDLEN2=0 
    MCBSP_XCR2_XCOMPAND_MSB,        // XCOMPAND=0 
    MCBSP_XCR2_XFIG_NO,             // XFIG=1 Unexpected Frame-sync ignore
    MCBSP_XCR2_XDATDLY_1BIT         // XDATDLY=1 1-bit data delay 
  ),            
 
  MCBSP_SRGR1_RMK( 
    MCBSP_SRGR1_FWID_OF(0),                
    MCBSP_SRGR1_CLKGDV_OF(207)       // 设置SRGR1，MCBSP2的波待率为1.5M
  ),                                // 40M/1.5M=26 26-1=25
  
  MCBSP_SRGR2_RMK(  
    MCBSP_SRGR2_GSYNC_FREE,         // FREE=0 
    MCBSP_SRGR2_CLKSP_RISING,       // CLKSP=0 
    MCBSP_SRGR2_CLKSM_INTERNAL,     // CLKSM=1 
    MCBSP_SRGR2_FSGM_DXR2XSR,       // FSGM=0
    MCBSP_SRGR2_FPER_OF(0x3ff)      // FPER=0x3ff 
  ),  

  MCBSP_MCR1_DEFAULT,
  MCBSP_MCR2_DEFAULT, 
  
  MCBSP_PCR_RMK(
    MCBSP_PCR_IDLEEN_RESET,          // IDLEEN=0   
    MCBSP_PCR_XIOEN_SP,              // XIOEN=0   
    MCBSP_PCR_RIOEN_SP,              // RIOEN=0   
    MCBSP_PCR_FSXM_INTERNAL,
    MCBSP_PCR_FSRM_EXTERNAL,         // FSRM=0 Receive frame-syn is provided by AIC23B
    MCBSP_PCR_SCLKME_NO,             // SCLKME=0 CLKG is taken from the McBSP internal input clock  
    MCBSP_PCR_CLKSSTAT_0,            // The signal on the CLKS pin is low   
    MCBSP_PCR_DXSTAT_0,              // Drive the signal on the DX pin low   
    MCBSP_PCR_DRSTAT_0,              // The signal on the DR pin is low   
    MCBSP_PCR_CLKXM_OUTPUT,
    MCBSP_PCR_CLKRM_INPUT,
    MCBSP_PCR_FSXP_ACTIVEHIGH,  		  
    MCBSP_PCR_FSRP_ACTIVEHIGH,
    MCBSP_PCR_CLKXP_RISING,
    MCBSP_PCR_CLKRP_FALLING
  ),
 
  MCBSP_RCERA_DEFAULT, 
  MCBSP_RCERB_DEFAULT, 
  MCBSP_RCERC_DEFAULT, 
  MCBSP_RCERD_DEFAULT, 
  MCBSP_RCERE_DEFAULT, 
  MCBSP_RCERF_DEFAULT, 
  MCBSP_RCERG_DEFAULT,
  MCBSP_RCERH_DEFAULT, 
  MCBSP_XCERA_DEFAULT,
  MCBSP_XCERB_DEFAULT,
  MCBSP_XCERC_DEFAULT,
  MCBSP_XCERD_DEFAULT,  
  MCBSP_XCERE_DEFAULT,
  MCBSP_XCERF_DEFAULT,  
  MCBSP_XCERG_DEFAULT,
  MCBSP_XCERH_DEFAULT
};
/***********************************************************************/
/*	函数声明：	MCBSP初始化                                            */
/***********************************************************************/
extern void Com_open()
{  
	SYSCNTL0 = 0x10;   
// Open McBSP port 2 and get a McBSP type handle
    hMcbsp = MCBSP_open(MCBSP_PORT0,MCBSP_OPEN_RESET);
// Config McBSP	port 2 by use previously defined structure
	MCBSP_reset(hMcbsp);
    MCBSP_config(hMcbsp,&Mcbsp2Config);
    MCBSP_start(hMcbsp, 
    	MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC |\
        MCBSP_RCV_START  | MCBSP_XMIT_START, 
    	0x300
  		);
    /* Temporarily disable all maskable interrupts */
	IRQ_globalDisable();   
	/* Clear extern user interrupt 2 interrupt enable bit */
	IRQ_disable(IRQ_EVT_RINT0);
	/* Clear any pending extern interrupt 2 */
	IRQ_clear(IRQ_EVT_RINT0);	
	/* Place interrupt service routine address at */
	/* associated vector location */
	IRQ_plug(IRQ_EVT_RINT0, &McbspRevIsr);
	/* Enable External User Interrupt #2 */
	IRQ_enable(IRQ_EVT_RINT0);	
	/* Enable all maskable interrupts */
	IRQ_globalEnable();
	/* Start Timer */
}

/***********************************************************************/
//	No	more
/***********************************************************************/