429_enc_dec.tan.qmsg

Quartus开发环境下开发的Arinc 429总线收发器工程

{ "Warning" "WHDB_CLOCK_SETTING_NOT_FOUND" "clk3 " "Warning: Can't find clock settings clk3 in current project -- ignoring clock settings" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "rdclk " "Info: Assuming node rdclk is an undefined clock" {  } { { "E:/王云山资料/fpga/429_enc_dec/429_enc_dec.bdf" "" "" { Schematic "E:/王云山资料/fpga/429_enc_dec/429_enc_dec.bdf" { { 1144 536 704 1160 "rdclk" "" } { 1122 688 704 1152 "rdclk" "" } } } } { "d:/altera/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/bin/Assignment Editor.qase" 1 { { 0 "rdclk" } } } }  } 0}  } {  } 0}