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📄 alt_synch_pipe_h62.tdf

📁 Quartus开发环境下开发的Arinc 429总线收发器工程
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--dffpipe WIDTH=5 clock d q
--VERSION_BEGIN 4.1 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:03:05:02:46:42:SJ cbx_altdpram 2004:05:14:13:10:08:SJ cbx_altsyncram 2004:06:23:18:19:30:SJ cbx_cycloneii 2004:05:18:11:27:16:SJ cbx_dcfifo 2004:06:03:11:08:42:SJ cbx_fifo_common 2003:08:19:18:07:00:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_lpm_add_sub 2004:06:23:12:24:04:SJ cbx_lpm_compare 2004:04:12:17:30:12:SJ cbx_lpm_counter 2004:04:21:01:21:20:SJ cbx_lpm_decode 2004:03:10:10:44:06:SJ cbx_lpm_mux 2004:03:10:10:50:34:SJ cbx_mgl 2004:06:17:17:30:06:SJ cbx_scfifo 2004:06:03:11:12:32:SJ cbx_stratix 2004:04:28:15:20:14:SJ cbx_stratixii 2004:05:18:11:28:28:SJ cbx_util 2004:03:29:17:03:30:SJ  VERSION_END


--  Copyright (C) 1988-2002 Altera Corporation
--  Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
--  support information,  device programming or simulation file,  and any other
--  associated  documentation or information  provided by  Altera  or a partner
--  under  Altera's   Megafunction   Partnership   Program  may  be  used  only
--  to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
--  other  use  of such  megafunction  design,  netlist,  support  information,
--  device programming or simulation file,  or any other  related documentation
--  or information  is prohibited  for  any  other purpose,  including, but not
--  limited to  modification,  reverse engineering,  de-compiling, or use  with
--  any other  silicon devices,  unless such use is  explicitly  licensed under
--  a separate agreement with  Altera  or a megafunction partner.  Title to the
--  intellectual property,  including patents,  copyrights,  trademarks,  trade
--  secrets,  or maskworks,  embodied in any such megafunction design, netlist,
--  support  information,  device programming or simulation file,  or any other
--  related documentation or information provided by  Altera  or a megafunction
--  partner, remains with Altera, the megafunction partner, or their respective
--  licensors. No other licenses, including any licenses needed under any third
--  party's intellectual property, are provided herein.


FUNCTION dffpipe_h62 (clock, d[4..0])
RETURNS ( q[4..0]);

--synthesis_resources = lut 5 
OPTIONS ALTERA_INTERNAL_OPTION = "X_ON_VIOLATION_OPTION=OFF";

SUBDESIGN alt_synch_pipe_h62
( 
	clock	:	input;
	d[4..0]	:	input;
	q[4..0]	:	output;
) 
VARIABLE 
	dffpipe2 : dffpipe_h62;

BEGIN 
	dffpipe2.clock = clock;
	dffpipe2.d[] = d[];
	q[] = dffpipe2.q[];
END;
--VALID FILE

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