429_enc_dec.hif

Quartus开发环境下开发的Arinc 429总线收发器工程

q2
q3
q4
}
# end
# entity
R_SY_D_FF
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
R_SY_D_FF.v
1205220994
7
# storage
db|429_enc_dec.(9).cnf
db|429_enc_dec.(9).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
clk_div
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
clk_div.v
1205221237
7
# storage
db|429_enc_dec.(2).cnf
db|429_enc_dec.(2).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
bclk_gen
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
clk_div.v
1205221237
7
# storage
db|429_enc_dec.(5).cnf
db|429_enc_dec.(5).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
null1sfr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
null1sfr.v
1205225329
7
# storage
db|429_enc_dec.(7).cnf
db|429_enc_dec.(7).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
R_SY_D_FF1
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
bit_cnt.v
1205226353
7
# storage
db|429_enc_dec.(12).cnf
db|429_enc_dec.(12).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
bit_cnt
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
bit_cnt.v
1205226353
7
# storage
db|429_enc_dec.(19).cnf
db|429_enc_dec.(19).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
parity_check
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
parity_check.v
1205280802
7
# storage
db|429_enc_dec.(23).cnf
db|429_enc_dec.(23).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
word_gap_timer
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
word_gap_timer.v
1205285672
7
# storage
db|429_enc_dec.(10).cnf
db|429_enc_dec.(10).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
lpm_fifo0
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_fifo0.v
1205716333
7
# storage
db|429_enc_dec.(25).cnf
db|429_enc_dec.(25).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
dcfifo
# case_insensitive
# source_file
d:|altera|libraries|megafunctions|dcfifo.tdf
1088009420
6
# storage
db|429_enc_dec.(26).cnf
db|429_enc_dec.(26).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
32
PARAMETER_DEC
USR
LPM_NUMWORDS
32
PARAMETER_DEC
USR
LPM_WIDTHU
5
PARAMETER_DEC
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
USE_EAB
ON
PARAMETER_UNKNOWN
USR
ADD_RAM_OUTPUT_REGISTER
OFF
PARAMETER_UNKNOWN
DEF
DELAY_RDUSEDW
1
PARAMETER_UNKNOWN
DEF
DELAY_WRUSEDW
1
PARAMETER_UNKNOWN
DEF
RDSYNC_DELAYPIPE
3
PARAMETER_UNKNOWN
DEF
WRSYNC_DELAYPIPE
3
PARAMETER_UNKNOWN
DEF
CLOCKS_ARE_SYNCHRONIZED
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
dcfifo_vos
PARAMETER_UNKNOWN
USR
}
# used_port {
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
data
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
rdclk
rdempty
rdreq
wrclk
wrfull
wrreq
wrusedw
wrusedw
wrusedw
wrusedw
wrusedw
}
# include_file {
d:|altera|libraries|megafunctions|lpm_counter.inc
1081478574
d:|altera|libraries|megafunctions|lpm_add_sub.inc
1081478464
d:|altera|libraries|megafunctions|altdpram.inc
1081477328
d:|altera|libraries|megafunctions|a_graycounter.inc
1088018006
d:|altera|libraries|megafunctions|a_fefifo.inc
1081476470
d:|altera|libraries|megafunctions|a_gray2bin.inc
1081476492
d:|altera|libraries|megafunctions|dffpipe.inc
1081478274
d:|altera|libraries|megafunctions|alt_sync_fifo.inc
1081477028
d:|altera|libraries|megafunctions|lpm_compare.inc
1081478538
d:|altera|libraries|megafunctions|altsyncram_fifo.inc
1081477670
d:|altera|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
dcfifo_vos
# case_insensitive
# source_file
db|dcfifo_vos.tdf
1205717772
6
# storage
db|429_enc_dec.(27).cnf
db|429_enc_dec.(27).cnf
# used_port {
data0
data1
data2
data3
data4
data5
data6
data7
data8
data9
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data20
data21
data22
data23
data24
data25
data26
data27
data28
data29
data30
data31
rdclk
rdreq
wrclk
wrreq
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
q10
q11
q12
q13
q14
q15
q16
q17
q18
q19
q20
q21
q22
q23
q24
q25
q26
q27
q28
q29
q30
q31
rdempty
wrfull
wrusedw0
wrusedw1
wrusedw2
wrusedw3
wrusedw4
}
# end
# entity
a_gray2bin_8cb
# case_insensitive
# source_file
db|a_gray2bin_8cb.tdf
1205717771
6
# storage
db|429_enc_dec.(28).cnf
db|429_enc_dec.(28).cnf
# used_port {
gray0
gray1
gray2
gray3
gray4
bin0
bin1
bin2
bin3
bin4
}
# end
# entity
a_graycounter_aq5
# case_insensitive
# source_file
db|a_graycounter_aq5.tdf
1205717771
6
# storage
db|429_enc_dec.(29).cnf
db|429_enc_dec.(29).cnf
# used_port {
clock
cnt_en
q0
q1
q2
q3
q4
}
# end
# entity
a_graycounter_5j6
# case_insensitive
# source_file
db|a_graycounter_5j6.tdf
1205717772
6
# storage
db|429_enc_dec.(30).cnf
db|429_enc_dec.(30).cnf
# used_port {
clock
cnt_en
q0
q1
q2
q3
q4
}
# end
# entity
alt_synch_pipe_h62
# case_insensitive
# source_file
db|alt_synch_pipe_h62.tdf
1205717772
6
# storage
db|429_enc_dec.(32).cnf
db|429_enc_dec.(32).cnf
# used_port {
clock
d0
d1
d2
d3
d4
q0
q1
q2
q3
q4
}
# end
# entity
dffpipe_h62
# case_insensitive
# source_file
db|dffpipe_h62.tdf
1205717772
6
# storage
db|429_enc_dec.(33).cnf
db|429_enc_dec.(33).cnf
# used_port {
clock
d0
d1
d2
d3
d4
q0
q1
q2
q3
q4
}
# end
# entity
dffpipe_er2
# case_insensitive
# source_file
db|dffpipe_er2.tdf
1205717772
6
# storage
db|429_enc_dec.(34).cnf
db|429_enc_dec.(34).cnf
# used_port {
clock
d0
d1
d2
d3
d4
q0
q1
q2
q3
q4
}
# end
# entity
add_sub_u5c
# case_insensitive
# source_file
db|add_sub_u5c.tdf
1205717772
6
# storage
db|429_enc_dec.(35).cnf
db|429_enc_dec.(35).cnf
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
datab0
datab1
datab2
datab3
datab4
result0
result1
result2
result3
result4
}
# end
# entity
data_sfr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
data_sfr.v
1205719142
7
# storage
db|429_enc_dec.(22).cnf
db|429_enc_dec.(22).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
data_lath
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
data_sfr.v
1205719142
7
# storage
db|429_enc_dec.(24).cnf
db|429_enc_dec.(24).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
429_enc_dec
# case_insensitive
# source_file
429_enc_dec.bdf
1205721766
23
# storage
db|429_enc_dec.(0).cnf
db|429_enc_dec.(0).cnf
# end
# entity
altsyncram_2hp
# case_insensitive
# source_file
db|altsyncram_2hp.tdf
1205717772
6
# storage
db|429_enc_dec.(31).cnf
db|429_enc_dec.(31).cnf
# used_port {
address_a0
address_a1
address_a2
address_a3
address_a4
address_b0
address_b1
address_b2
address_b3
address_b4
addressstall_b
clock0
clock1
clocken1
data_a0
data_a1
data_a2
data_a3
data_a4
data_a5
data_a6
data_a7
data_a8
data_a9
data_a10
data_a11
data_a12
data_a13
data_a14
data_a15
data_a16
data_a17
data_a18
data_a19
data_a20
data_a21
data_a22
data_a23
data_a24
data_a25
data_a26
data_a27
data_a28
data_a29
data_a30
data_a31
wren_a
q_b0
q_b1
q_b2
q_b3
q_b4
q_b5
q_b6
q_b7
q_b8
q_b9
q_b10
q_b11
q_b12
q_b13
q_b14
q_b15
q_b16
q_b17
q_b18
q_b19
q_b20
q_b21
q_b22
q_b23
q_b24
q_b25
q_b26
q_b27
q_b28
q_b29
q_b30
q_b31
}
# memory_file {
none
0
}
# end
# complete