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📄 memory.c.s

📁 ADSV1.2可以编译的早期linux版本
💻 S
字号:
; generated by ARM C Compiler, ADS1.2 [Build 805]

; commandline [-O0 -browseinfo "0xff
" -S   -g+ -apcs /interwork -fk -J:cw:]
        CODE32

        AREA ||.text||, CODE, READONLY

ms_memory_pool_desc_init PROC
|L1.0|
        MOV      r1,#0x10
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0]  ; poolDesc
        MOV      r1,#0xc8
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#2]  ; poolDesc
        LDR      r1,|L1.1312|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#4]  ; poolDesc
        MOV      r0,#0
|L1.40|
        CMP      r0,#0x960
        BCS      |L1.80|
        B        |L1.60|
|L1.52|
        ADD      r0,r0,#1
        B        |L1.40|
|L1.60|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        STRH     r1,[r2,#0]
        B        |L1.52|
|L1.80|
        MOV      r1,#0x20
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#8]  ; poolDesc
        MOV      r1,#0xc8
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0xa]  ; poolDesc
        LDR      r1,|L1.1316|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0xc]  ; poolDesc
        MOV      r0,#0
|L1.120|
        CMP      r0,#0xfa0
        BCS      |L1.164|
        B        |L1.140|
|L1.132|
        ADD      r0,r0,#1
        B        |L1.120|
|L1.140|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x1200
        STRH     r1,[r2,#0xc0]
        B        |L1.132|
|L1.164|
        MOV      r1,#0x40
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x10]  ; poolDesc
        MOV      r1,#0x32
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x12]  ; poolDesc
        LDR      r1,|L1.1320|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0x14]  ; poolDesc
        MOV      r0,#0
|L1.204|
        SUBS     r12,r0,#0x400
        SUBCSS   r12,r12,#0x308
        BCS      |L1.252|
        B        |L1.228|
|L1.220|
        ADD      r0,r0,#1
        B        |L1.204|
|L1.228|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x3200
        STRH     r1,[r2,#0]
        B        |L1.220|
|L1.252|
        MOV      r1,#0x80
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x18]  ; poolDesc
        MOV      r1,#0x32
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x1a]  ; poolDesc
        LDR      r1,|L1.1324|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0x1c]  ; poolDesc
        MOV      r0,#0
|L1.292|
        SUBS     r12,r0,#0xc00
        SUBCSS   r12,r12,#0x148
        BCS      |L1.340|
        B        |L1.316|
|L1.308|
        ADD      r0,r0,#1
        B        |L1.292|
|L1.316|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x4000
        STRH     r1,[r2,#0x10]
        B        |L1.308|
|L1.340|
        MOV      r1,#0x100
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x20]  ; poolDesc
        MOV      r1,#0x32
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x22]  ; poolDesc
        LDR      r1,|L1.1328|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0x24]  ; poolDesc
        MOV      r0,#0
|L1.380|
        SUBS     r12,r0,#0x1800
        SUBCSS   r12,r12,#0x1c8
        BCS      |L1.428|
        B        |L1.404|
|L1.396|
        ADD      r0,r0,#1
        B        |L1.380|
|L1.404|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x5a00
        STRH     r1,[r2,#0xa0]
        B        |L1.396|
|L1.428|
        MOV      r1,#0x200
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x28]  ; poolDesc
        MOV      r1,#0x3c
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x2a]  ; poolDesc
        LDR      r1,|L1.1332|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0x2c]  ; poolDesc
        MOV      r0,#0
|L1.468|
        SUBS     r12,r0,#0x3000
        SUBCSS   r12,r12,#0xcf0
        BCS      |L1.516|
        B        |L1.492|
|L1.484|
        ADD      r0,r0,#1
        B        |L1.468|
|L1.492|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x8e00
        STRH     r1,[r2,#0x30]
        B        |L1.484|
|L1.516|
        MOV      r1,#0x400
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x30]  ; poolDesc
        MOV      r1,#0x32
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x32]  ; poolDesc
        LDR      r1,|L1.1336|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0x34]  ; poolDesc
        MOV      r0,#0
|L1.556|
        SUBS     r12,r0,#0x6400
        SUBCSS   r12,r12,#0xc8
        BCS      |L1.604|
        B        |L1.580|
|L1.572|
        ADD      r0,r0,#1
        B        |L1.556|
|L1.580|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x10800
        STRH     r1,[r2,#0x10]
        B        |L1.572|
|L1.604|
        MOV      r1,#0x800
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x38]  ; poolDesc
        MOV      r1,#0x32
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x3a]  ; poolDesc
        LDR      r1,|L1.1340|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0x3c]  ; poolDesc
        MOV      r0,#0
|L1.644|
        SUBS     r12,r0,#0xc800
        SUBCSS   r12,r12,#0xc8
        BCS      |L1.696|
        B        |L1.668|
|L1.660|
        ADD      r0,r0,#1
        B        |L1.644|
|L1.668|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x10000
        ADD      r2,r2,#0xd100
        STRH     r1,[r2,#0xa0]
        B        |L1.660|
|L1.696|
        MOV      r1,#0x1000
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x40]  ; poolDesc
        MOV      r1,#0x14
        LDR      r2,|L1.1308|
        STRH     r1,[r2,#0x42]  ; poolDesc
        LDR      r1,|L1.1344|
        LDR      r2,|L1.1308|
        STR      r1,[r2,#0x44]  ; poolDesc
        MOV      r0,#0
|L1.736|
        SUBS     r12,r0,#0xa000
        SUBCSS   r12,r12,#0x50
        BCS      |L1.788|
        B        |L1.760|
|L1.752|
        ADD      r0,r0,#1
        B        |L1.736|
|L1.760|
        MOV      r1,#0
        LDR      r2,|L1.1312|
        ADD      r2,r2,r0,LSL #1
        ADD      r2,r2,#0x30000
        ADD      r2,r2,#0x6300
        STRH     r1,[r2,#0x30]
        B        |L1.752|
|L1.788|
        BX       lr
        ENDP

ms_init_cluster PROC
        MOV      r2,r0
        MOV      r1,#0
        CMP      r2,#9
        BLS      |L1.816|
        LDR      r0,|L1.1348|
|L1.812|
        BX       lr
|L1.816|
        LDR      r0,|L1.1308|
        ADD      r0,r0,r2,LSL #3
        LDRH     r12,[r0,#0]
        LDR      r0,|L1.1308|
        ADD      r0,r0,r2,LSL #3
        LDR      r1,[r0,#4]
        MOV      r3,#0
|L1.844|
        LDR      r0,|L1.1308|
        ADD      r0,r0,r2,LSL #3
        LDRH     r0,[r0,#2]
        CMP      r0,r3
        BLE      |L1.920|
        B        |L1.876|
|L1.868|
        ADD      r3,r3,#1
        B        |L1.844|
|L1.876|
        LDR      r0,|L1.1352|
        STRH     r0,[r1,#0]
        LDR      r0,|L1.1356|
        STRH     r0,[r1,#6]
        MOV      r0,#0
        STRH     r0,[r1,#4]
        ORR      r0,r3,r2,LSL #8
        STRH     r0,[r1,#2]
        ADD      r0,r1,r12
        ADD      r1,r0,#8
        B        |L1.868|
|L1.920|
        MOV      r0,#0
        B        |L1.812|
        ENDP

ms_init_all_cluster PROC
        STMFD    sp!,{r4,r5,lr}
        MOV      r4,#0
|L1.936|
        CMP      r4,#9
        BGE      |L1.1000|
        B        |L1.956|
|L1.948|
        ADD      r4,r4,#1
        B        |L1.936|
|L1.956|
        MOV      r0,r4,LSL #16
        MOV      r0,r0,LSR #16
        BL       ms_init_cluster
        MOV      r5,r0
        CMP      r5,#0
        BEQ      |L1.996|
        MOV      r0,r5,LSL #16
        MOV      r0,r0,LSR #16
|L1.988|
        LDMFD    sp!,{r4,r5,lr}
        BX       lr
|L1.996|
        B        |L1.948|
|L1.1000|
        MOV      r0,#0
        B        |L1.988|
        ENDP

ms_get_total_pool_nb PROC
        MOV      r0,#9
        BX       lr
        ENDP

ms_get_pool_len PROC
        MOV      r1,r0
        CMP      r1,#9
        BCC      |L1.1036|
        LDR      r0,|L1.1348|
|L1.1032|
        BX       lr
|L1.1036|
        LDR      r0,|L1.1308|
        ADD      r0,r0,r1,LSL #3
        LDRH     r0,[r0,#0]
        B        |L1.1032|
        ENDP

ms_get_pool_nb PROC
        MOV      r1,r0
        CMP      r1,#9
        BCC      |L1.1072|
        LDR      r0,|L1.1348|
|L1.1068|
        BX       lr
|L1.1072|
        LDR      r0,|L1.1308|
        ADD      r0,r0,r1,LSL #3
        LDRH     r0,[r0,#2]
        B        |L1.1068|
        ENDP

ms_get_pool PROC
        STMFD    sp!,{r4-r8,lr}
        MOV      r8,r0
        MOV      r4,#0
        MOV      r5,#0
|L1.1104|
        CMP      r5,#9
        BGE      |L1.1300|
        B        |L1.1124|
|L1.1116|
        ADD      r5,r5,#1
        B        |L1.1104|
|L1.1124|
        LDR      r0,|L1.1308|
        ADD      r0,r0,r5,LSL #3
        LDRH     r0,[r0,#0]
        CMP      r0,r8
        BCC      |L1.1296|
        LDR      r0,|L1.1308|
        ADD      r0,r0,r5,LSL #3
        LDR      r4,[r0,#4]
        LDR      r0,|L1.1308|
        ADD      r0,r0,r5,LSL #3
        LDRH     r7,[r0,#0]
        MOV      r6,#0
|L1.1172|
        LDR      r0,|L1.1308|
        ADD      r0,r0,r5,LSL #3
        LDRH     r0,[r0,#2]
        CMP      r0,r6
        BLE      |L1.1296|
        B        |L1.1204|
|L1.1196|
        ADD      r6,r6,#1
        B        |L1.1172|
|L1.1204|
        LDRH     r0,[r4,#0]
        SUB      r12,r0,#0x5500
        SUBS     r12,r12,#0xaa
        BNE      |L1.1268|
        LDRH     r0,[r4,#6]
        SUB      r12,r0,#0xaa00
        SUBS     r12,r12,#0x55
        BNE      |L1.1268|
        LDRH     r0,[r4,#4]
        CMP      r0,#0
        BNE      |L1.1284|
        MOV      r0,#1
        STRH     r0,[r4,#4]
        ADD      r0,r4,#8
|L1.1260|
        LDMFD    sp!,{r4-r8,lr}
        BX       lr
|L1.1268|
        ADR      r0,|L1.1360|
        BL       out
        NOP      
|L1.1280|
        B        |L1.1280|
|L1.1284|
        ADD      r0,r4,r7
        ADD      r4,r0,#8
        B        |L1.1196|
|L1.1296|
        B        |L1.1116|
|L1.1300|
        MOV      r0,#0
        B        |L1.1260|
|L1.1308|
        DCD      ||.bss$2|| + 304080
|L1.1312|
        DCD      ||.bss$2||
|L1.1316|
        DCD      ||.bss$2|| + 4800
|L1.1320|
        DCD      ||.bss$2|| + 12800
|L1.1324|
        DCD      ||.bss$2|| + 16400
|L1.1328|
        DCD      ||.bss$2|| + 23200
|L1.1332|
        DCD      ||.bss$2|| + 36400
|L1.1336|
        DCD      ||.bss$2|| + 67600
|L1.1340|
        DCD      ||.bss$2|| + 119200
|L1.1344|
        DCD      ||.bss$2|| + 222000
|L1.1348|
        DCD      0x0000ffff
|L1.1352|
        DCD      0x000055aa
|L1.1356|
        DCD      0x0000aa55
|L1.1360|
        DCB      "memo"
        DCB      "ry o"
        DCB      "ver "
        DCB      "foll"
        DCB      "ow!!"
        DCB      "\r\n\0\0"
        ENDP

ms_free_pool PROC
        STMFD    sp!,{r3-r5,lr}
        MOV      r5,r0
        MOV      r4,#0
        SUB      r4,r5,#8
        LDRH     r0,[r4,#0]
        SUB      r12,r0,#0x5500
        SUBS     r12,r12,#0xaa
        BNE      |L1.1444|
        LDRH     r0,[r4,#6]
        SUB      r12,r0,#0xaa00
        SUBS     r12,r12,#0x55
        BNE      |L1.1444|
        MOV      r0,#0
        STRH     r0,[r4,#4]
        B        |L1.1452|
|L1.1444|
        ADR      r0,|L1.1360|
        BL       out
|L1.1452|
        LDMFD    sp!,{r3-r5,lr}
        BX       lr
        ENDP

mem_init PROC
        STR      lr,[sp,#-4]!
        BL       ms_memory_pool_desc_init
        BL       ms_init_all_cluster
        LDR      lr,[sp],#4
        BX       lr
        ENDP



        AREA ||.bss||, NOINIT, ALIGN=2

pool
||.bss$2||
        % 304080
poolDesc
        % 72


        EXPORT mem_init
        EXPORT ms_free_pool
        EXPORT ms_get_pool
        EXPORT ms_get_pool_nb
        EXPORT ms_get_pool_len
        EXPORT ms_get_total_pool_nb
        EXPORT ms_init_all_cluster
        EXPORT ms_init_cluster
        EXPORT ms_memory_pool_desc_init
        EXPORT poolDesc
        EXPORT pool

        IMPORT out
        IMPORT ||Lib$$Request$$armlib||, WEAK

        KEEP ||BuildAttributes$$THUMB_ISAv1$M$PE$A:L22$X:L11$S22$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$PRES8||
||BuildAttributes$$THUMB_ISAv1$M$PE$A:L22$X:L11$S22$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$PRES8|| EQU 0

        ASSERT {ENDIAN} = "little"
        ASSERT {SWST} = {FALSE}
        ASSERT {NOSWST} = {TRUE}
        ASSERT {INTER} = {TRUE}
        ASSERT {ROPI} = {FALSE}
        ASSERT {RWPI} = {FALSE}
        ASSERT {NOT_SHL} = {TRUE}
        ASSERT {FULL_IEEE} = {FALSE}
        ASSERT {SHL1} = {FALSE}
        ASSERT {SHL2} = {FALSE}
        END

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